Patents by Inventor Takayuki Yamagishi

Takayuki Yamagishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7276123
    Abstract: A semiconductor-processing apparatus comprises a susceptor and removable placing blocks detachably placed at a periphery of the susceptor for transferring a substrate. Retractable supporting members are provided for detaching/attaching the placing blocks from/to the susceptor.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: October 2, 2007
    Assignee: ASM Japan K.K.
    Inventors: Akira Shimizu, Hideaki Fukuda, Hiroki Arai, Baiei Kawano, Takayuki Yamagishi
  • Publication number: 20070160507
    Abstract: A semiconductor processing apparatus includes: a reaction chamber; a susceptor disposed in the reaction chamber for placing a substrate thereon and having through-holes in an axial direction of the susceptor; lift pins slidably disposed in the respective through-holes for lifting the substrate over the susceptor; and a means for reducing contact resistance between the lift pins and the respective through-holes.
    Type: Application
    Filed: January 12, 2006
    Publication date: July 12, 2007
    Applicant: ASM JAPAN K.K.
    Inventors: Kiyoshi Satoh, Takayuki Yamagishi
  • Publication number: 20060204356
    Abstract: A wafer transfer apparatus includes: (A) a mini environment that connects to a wafer storage part and a load lock chamber and is equipped with a transfer robot inside, in order to transfer wafers between the wafer storage part and load lock chamber in the presence of air flows; and (B) a cooling stage that opens and connects to the mini environment from the outside of the mini environment in the vicinity of the connection port on the load lock chamber, in order to temporarily hold a wafer so that the wafer cooled by the air taken in from the mini environment.
    Type: Application
    Filed: March 8, 2005
    Publication date: September 14, 2006
    Applicant: ASM JAPAN K.K.
    Inventors: Takayuki Yamagishi, Takeshi Watanabe
  • Patent number: 7021881
    Abstract: Semiconductor processing equipment that has increased efficiency, throughput, and stability, as well as reduced operating cost, footprint, and faceprint is provided. Other than during deposition, the atmosphere of both the reaction chamber and the transfer chamber are evacuated using the transfer chamber exhaust port, which is located below the surface of the semiconductor wafer. This configuration prevents particles generated during wafer transfer or during deposition from adhering to the surface of the semiconductor wafer. Additionally, by introducing a purge gas into the transfer chamber during deposition, and by using an insulation separating plate 34, the atmospheres of the transfer and reaction chambers can be effectively isolated from each other, thereby preventing deposition on the walls and components of the transfer chamber.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: April 4, 2006
    Assignee: ASM Japan K.K.
    Inventors: Takayuki Yamagishi, Masaei Suwada, Takeshi Watanabe
  • Patent number: 6955741
    Abstract: The present application provides a PECVD reaction chamber for processing semiconductor wafers comprising a susceptor for supporting a semiconductor wafer inside the reaction chamber wherein the susceptor comprises a plurality vertical through-bores, a moving means for moving the susceptor vertically between at least a first position and a second position, wafer-lift pins passing through the through-bores wherein the lower end of each wafer pin is attached to a lift member, and a lift member linked with an elevating mechanism for moving the wafer-lift pins vertically. The disclosed apparatus reduces contamination on the underside of the semiconductor wafer.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: October 18, 2005
    Assignee: ASM Japan K.K.
    Inventor: Takayuki Yamagishi
  • Patent number: 6945746
    Abstract: The equipment comprises a semiconductor-processing device in which a load-lock chamber, a transfer chamber and a reaction chamber are modularized into, a main frame, a stand-alone chamber frame on which the semiconductor-processing device is placed, a sliding mechanism for enabling attaching/removing of the chamber frame to/from the main frame smoothly, and a positioning mechanism for fixing a position of the chamber frame. This enables the processing device to be attached and removed at will. The method comprises pulling out from the main frame the chamber frame, on which the modularized semiconductor-processing device is placed; forming a maintenance space inside the main frame; maintaining the semiconductor-processing device and peripherals attached in the vicinity of the main frame, and putting the chamber frame with the processing device back into the main frame.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: September 20, 2005
    Assignee: ASM Japan K.K.
    Inventors: Takayuki Yamagishi, Takeshi Watanabe, Masaei Suwada
  • Publication number: 20050118001
    Abstract: Semiconductor processing equipment that has increased efficiency, throughput, and stability, as well as reduced operating cost, footprint, and faceprint is provided. Other than during deposition, the atmosphere of both the reaction chamber and the transfer chamber are evacuated using the transfer chamber exhaust port, which is located below the surface of the semiconductor wafer. This configuration prevents particles generated during wafer transfer or during deposition from adhering to the surface of the semiconductor wafer. Additionally, by introducing a purge gas into the transfer chamber during deposition, and by using an insulation separating plate 34, the atmospheres of the transfer and reaction chambers can be effectively isolated from each other, thereby preventing deposition on the walls and components of the transfer chamber.
    Type: Application
    Filed: December 23, 2004
    Publication date: June 2, 2005
    Inventors: Takayuki Yamagishi, Masaei Suwada, Takeshi Watanabe
  • Patent number: 6899507
    Abstract: Semiconductor processing equipment that has increased efficiency, throughput, and stability, as well as reduced operating cost, footprint, and faceprint is provided. Other than during deposition, the atmosphere of both the reaction chamber and the transfer chamber are evacuated using the transfer chamber exhaust port, which is located below the surface of the semiconductor wafer. This configuration prevents particles generated during wafer transfer or during deposition from adhering to the surface of the semiconductor wafer. Additionally, by introducing a purge gas into the transfer chamber during deposition, and by using an insulation separating plate 34, the atmospheres of the transfer and reaction chambers can be effectively isolated from each other, thereby preventing deposition on the walls and components of the transfer chamber.
    Type: Grant
    Filed: February 8, 2002
    Date of Patent: May 31, 2005
    Assignee: ASM Japan K.K.
    Inventors: Takayuki Yamagishi, Masaei Suwada, Takeshi Watanabe
  • Patent number: 6860711
    Abstract: A semiconductor-manufacturing device is equipped with a load-lock chamber and a reactor, which are directly connected, wherein a semiconductor wafer is transferred by a transferring arm provided inside the load-lock chamber from the load-lock chamber onto a susceptor provided inside the reactor. The device includes a buffer mechanism for keeping a semiconductor wafer standing by inside the reactor. The buffer mechanism includes at least two supporting means, which are provided around the susceptor to support the semiconductor wafer and which rotate in a horizontal direction, a shaft means for supporting the supporting means in a vertical direction, a rotating mechanism for rotating the supporting means coupled to the shaft means, and an elevating means for moving the shaft means up and down.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: March 1, 2005
    Assignee: ASM Japan K.K.
    Inventor: Takayuki Yamagishi
  • Publication number: 20050022737
    Abstract: A semiconductor-processing apparatus comprises a susceptor and removable placing blocks detachably placed at a periphery of the susceptor for transferring a substrate. Retractable supporting members are provided for detaching/attaching the placing blocks from/to the susceptor.
    Type: Application
    Filed: July 22, 2004
    Publication date: February 3, 2005
    Applicant: ASM JAPAN K.K.
    Inventors: Akira Shimizu, Hideaki Fukuda, Hiroki Arai, Baiei Kawano, Takayuki Yamagishi
  • Publication number: 20040194709
    Abstract: A plasma treatment apparatus for thin-film deposition includes a reactor chamber; a pair of parallel-plate electrodes disposed inside the chamber; and a radio-frequency power supply system used for transmitting radio-frequency power to one of the parallel-plate electrodes via multiple supply points provided on the one of the parallel-electrodes. The radio-frequency power supply system includes a radio-frequency transmission unit which includes an inlet transmission path and multiple branches branched off from the inlet transmission path multiple times. Each branch is connected to the supply point and has a substantially equal characteristic impedance value.
    Type: Application
    Filed: March 23, 2004
    Publication date: October 7, 2004
    Applicant: ASM JAPAN K.K.
    Inventors: Takayuki Yamagishi, Hiroki Arai, Kiyoshi Satoh
  • Patent number: 6743329
    Abstract: In a multi-chamber load-locking device which is placed between a loading station which places a wafer cassette which houses semiconductor wafers and a transfer chamber which conveys the semiconductor wafers and in which lock-loading device chamber space is divided into two by the vertical motion of a plate, a device which comprises: sealing means by which the chamber space is selectively divided into two by contacting the plate and a state of no airflow is caused; a cylindrical cam provided with the same axis as that of the chamber; and a rotary actuator dynamically connected with the cylindrical cam, wherein the turning moment of the rotary actuator is converted into the vertical thrust of the axis and the plate rises and descends.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: June 1, 2004
    Assignee: ASM Japan K.K.
    Inventors: Mitsusuke Kyogoku, Takayuki Yamagishi
  • Publication number: 20040026041
    Abstract: The present application provides a PECVD reaction chamber for processing semiconductor wafers comprising a susceptor for supporting a semiconductor wafer inside the reaction chamber wherein the susceptor comprises a plurality vertical through-bores, a moving means for moving the susceptor vertically between at least a first position and a second position, wafer-lift pins passing through the through-bores wherein the lower end of each wafer pin is attached to a lift member, and a lift member linked with an elevating mechanism for moving the wafer-lift pins vertically. The disclosed apparatus reduces contamination on the underside of the semiconductor wafer.
    Type: Application
    Filed: August 7, 2002
    Publication date: February 12, 2004
    Inventor: Takayuki Yamagishi
  • Patent number: 6662817
    Abstract: A gas-line system used for a semiconductor-manufacturing apparatus with at least two reactors, includes at least one gas source; a flow-divider means including an input port on the primary side, which receives a source gas from the gas source, and an output port on the secondary side, which outputs an inputted source gas by equally distributing it. The input port on the primary side is connected with the gas source and the output port on the secondary side is connected with the reactors; and one exhaust pump for exhausting gases within the reactors, which is connected with the reactors. It is desirable that the gas-line system is provided between the reactors and the exhaust pump, and an APC is included for controlling pressure for each reactor.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: December 16, 2003
    Assignee: ASM Japan K.K.
    Inventors: Takayuki Yamagishi, Masaei Suwada
  • Patent number: 6630053
    Abstract: A compact single-wafer-processing semiconductor-manufacturing apparatus for processing semiconductor substrates is characterized in that at least two units, each of which comprises a reactor for growing a film on a semiconductor substrate and a load lock chamber for having the semiconductor substrate wait in a vacuum and which is directly connected with the reactor via a gate valve, are modularized and these modularized reactor units can be configured as a cluster through an atmospheric front end (AFE). Inside the load lock chamber, a substrate transfer mechanism comprising a thin link arm for transferring a semiconductor substrate into the reactor is provided.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: October 7, 2003
    Assignee: ASM Japan K.K.
    Inventors: Takayuki Yamagishi, Masaei Suwada, Takeshi Watanabe
  • Publication number: 20030168948
    Abstract: The equipment comprises a semiconductor-processing device in which a load-lock chamber, a transfer chamber and a reaction chamber are modularized into, a main frame, a stand-alone chamber frame on which the semiconductor-processing device is placed, a sliding mechanism for enabling attaching/removing of the chamber frame to/from the main frame smoothly, and a positioning mechanism for fixing a position of the chamber frame. This enables the processing device to be attached and removed at will. The method comprises pulling out from the main frame the chamber frame, on which the modularized semiconductor-processing device is placed; forming a maintenance space inside the main frame; maintaining the semiconductor-processing device and peripherals attached in the vicinity of the main frame, and putting the chamber frame with the processing device back into the main frame.
    Type: Application
    Filed: February 20, 2003
    Publication date: September 11, 2003
    Inventors: Takayuki Yamagishi, Takeshi Watanabe, Masaei Suwada
  • Publication number: 20030152445
    Abstract: Semiconductor processing equipment that has increased efficiency, throughput, and stability, as well as reduced operating cost, footprint, and faceprint is provided. Other than during deposition, the atmosphere of both the reaction chamber and the transfer chamber are evacuated using the transfer chamber exhaust port, which is located below the surface of the semiconductor wafer. This configuration prevents particles generated during wafer transfer or during deposition from adhering to the surface of the semiconductor wafer. Additionally, by introducing a purge gas into the transfer chamber during deposition, and by using an insulation separating plate 34, the atmospheres of the transfer and reaction chambers can be effectively isolated from each other, thereby preventing deposition on the walls and components of the transfer chamber.
    Type: Application
    Filed: February 8, 2002
    Publication date: August 14, 2003
    Inventors: Takayuki Yamagishi, Masaei Suwada, Takeshi Watanabe
  • Publication number: 20030021657
    Abstract: A semiconductor-manufacturing device is equipped with a load-lock chamber and a reactor, which are directly connected, wherein a semiconductor wafer is transferred by a transferring arm provided inside the load-lock chamber from the load-lock chamber onto a susceptor provided inside the reactor. The device includes a buffer mechanism for keeping a semiconductor wafer standing by inside the reactor. The buffer mechanism includes at least two supporting means, which are provided around the susceptor to support the semiconductor wafer and which rotate in a horizontal direction, a shaft means for supporting the supporting means in a vertical direction, a rotating mechanism for rotating the supporting means coupled to the shaft means, and an elevating means for moving the shaft means up and down.
    Type: Application
    Filed: July 1, 2002
    Publication date: January 30, 2003
    Applicant: ASM JAPAN K.K.
    Inventor: Takayuki Yamagishi
  • Patent number: 6454516
    Abstract: There is provided an aligner apparatus and method which can align a semiconductor substrate without contaminating a rear surface. The aligner apparatus for arbitrarily aligning the circular semiconductor substrate having a notch or “orifla” at an edge portion includes at least three spindle units rotatably axially supported by a plate, holding units for holding the semiconductor substrate, attached to respective tip ends of the spindle units, a rotation mechanism for rotating the spindle units, and a sensor for detecting the notch or “orifla”. An edge portion of the semiconductor substrate is brought into contact with the respective holding units, so that the semiconductor substrate is held. When the spindle units rotate, the semiconductor substrate held by the holding units rotates around its axial line.
    Type: Grant
    Filed: July 10, 2000
    Date of Patent: September 24, 2002
    Assignee: ASM Japan K.K.
    Inventor: Takayuki Yamagishi
  • Publication number: 20020038669
    Abstract: A gas-line system used for a semiconductor-manufacturing apparatus with at least two reactors, includes at least one gas source; a flow-divider means including an input port on the primary side, which receives a source gas from the gas source, and an output port on the secondary side, which outputs an inputted source gas by equally distributing it. The input port on the primary side is connected with the gas source and the output port on the secondary side is connected with the reactors; and one exhaust pump for exhausting gases within the reactors, which is connected with the reactors. Tt is desirable that the gas-line system is provided between the reactors and the exhaust pump, and an APC is included for controlling pressure for each reactor.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 4, 2002
    Inventors: Takayuki Yamagishi, Masaei Suwada