Patents by Inventor Takayuki Yuasa

Takayuki Yuasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6620238
    Abstract: A nitride semiconductor structure includes: a substrate having a growth surface, a convex portion and a concave portion being formed on the growth surface; and a nitride semiconductor film grown on the growth surface. A cavity is formed between the nitride semiconductor film and the substrate in the concave portion.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: September 16, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yuhzoh Tsuda, Takayuki Yuasa
  • Publication number: 20030136957
    Abstract: A nitride semiconductor light emitting device includes an emission layer (106) having a multiple quantum well structure where a plurality of quantum well layers and a plurality of barrier layers are alternately stacked. The quantum well layer is formed of XN1-x-yAsxPySbz (0≦x≦0.15, 0≦y≦0.2, 0≦z≦0.05, x+y+z>0) where X represents one or more kinds of group III elements. The barrier layer is formed of a nitride semiconductor layer containing at least Al.
    Type: Application
    Filed: November 14, 2002
    Publication date: July 24, 2003
    Inventors: Yuhzoh Tsuda, Takayuki Yuasa, Shigetoshi Ito
  • Publication number: 20030132441
    Abstract: A nitride semiconductor laser device using a group III nitride semiconductor also as a substrate offers excellent operation characteristics and a long laser oscillation life. In a layered structure of a group III nitride semiconductor formed on a GaN substrate, a laser optical waveguide region is formed elsewhere than right above a dislocation-concentrated region extending so as to vertically penetrate the substrate, and electrodes are formed on the top surface of the layered structure and on the bottom surface of the substrate elsewhere than right above or below the dislocation-concentrated region. In a portion of the top surface of the layered structure and in a portion of the bottom surface of the substrate right above and below the dislocation-concentrated region, dielectric layers may be formed to prevent the electrodes from making contact with those regions.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 17, 2003
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kunihiro Takatani, Shigetoshi Ito, Takayuki Yuasa, Mototaka Taneya, Kensaku Motoki
  • Patent number: 6586777
    Abstract: The present nitride semiconductor light emitting device includes a nitride semiconductor thick film substrate and a light emitting layered structure including a plurality of nitride semiconductor layers stacked on the substrate. The nitride semiconductor substrate includes at least two layer regions including a first layer region of a high impurity concentration and a second layer region of an impurity concentration lower than the first layer region. The light emitting layered structure is formed on the first layer region of the substrate.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: July 1, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takayuki Yuasa, Atsushi Ogawa, Masahiro Araki, Yoshihiro Ueta, Yuhzoh Tsuda, Mototaka Taneya
  • Patent number: 6518602
    Abstract: A nitride compound semiconductor light emitting device of the present invention includes: a nitride compound semiconductor substrate; and a light emitting device section including a nitride compound semiconductor provided on the nitride compound semiconductor substrate. The nitride compound semiconductor substrate contains a group VII element as an impurity.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: February 11, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takayuki Yuasa, Masaya Ishida, Yuhzoh Tsuda, Mototaka Taneya
  • Patent number: 6455877
    Abstract: A GaN light-emitting device is provided having a low specific contact resistance of an n-type electrode as well as a low threshold voltage or threshold current density. The GaN light-emitting device has an electrode formed on a nitrogen-terminated surface of a GaN substrate. Specifically, the GaN light-emitting device includes the GaN substrate, a plurality of GaN compound semiconductor layers formed on the GaN substrate, and the n-type electrode and a p-type electrode, wherein the semiconductor substrate is of n-type and the n-type electrode is formed on the nitrogen-terminated surface of the semiconductor substrate. The concentration of n-type impurities in the substrate preferably ranges from 1×1017 cm−3 to 1×1021 cm−3.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: September 24, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsushi Ogawa, Takayuki Yuasa, Yoshihiro Ueta, Yuhzoh Tsuda, Masahiro Araki, Mototaka Taneya
  • Patent number: 6452216
    Abstract: A nitride semiconductor light emitting device includes a worked substrate including grooves and lands formed on a main surface of a nitride semiconductor substrate, a nitride semiconductor underlayer covering the grooves and the lands of the worked substrate and a nitride semiconductor multilayer emission structure including an emission layer including a quantum well layer or both a quantum well layer and a barrier layer in contact with the quantum well layer between an n-type layer and a p-type layer over the nitride semiconductor underlayer, while the width of the grooves is within the range of 11 to 30 &mgr;m and the width of the lands is within the range of 1 to 20 &mgr;m.
    Type: Grant
    Filed: September 11, 2001
    Date of Patent: September 17, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yuhzoh Tsuda, Takayuki Yuasa, Shigetoshi Ito, Mototaka Taneya
  • Patent number: 6434025
    Abstract: The invention relates to a power supply unit which can fail-safely monitor not only for an excessive power supply output but also for an abnormal drop in output level. At the time of start-up, with the start signal from a start circuit, an AC signal is supplied to a primary side of a transformer and based on an AC output from a secondary side of the transformer, an output for supplying to an external load is generated and this output is monitored with a monitoring circuit. If the output level is within a set upper and lower limit threshold value range the output is judged to be normal and a high level normal verification signal is generated from the monitoring circuit, and with the high level normal verification signal, an AC signal is supplied to the primary side of the transformer, and the output supply to the external load is continued.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: August 13, 2002
    Assignee: The Nippon Signal Co., Ltd.
    Inventors: Toshihito Shirai, Masayoshi Sakai, Koichi Futsuhara, Takayuki Yuasa
  • Patent number: 6420283
    Abstract: Methods are provided for producing a compound semiconductor substrate including: a mica substrate; and a III-V group compound semiconductor layer containing nitrogen as its main component grown on the mica substrate.
    Type: Grant
    Filed: October 26, 1998
    Date of Patent: July 16, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsushi Ogawa, Takayuki Yuasa
  • Publication number: 20020056846
    Abstract: A nitride semiconductor light emitting device includes a worked substrate including grooves and lands formed on a main surface of a nitride semiconductor substrate, a nitride semiconductor underlayer covering the grooves and the lands of the worked substrate and a nitride semiconductor multilayer emission structure including an emission layer including a quantum well layer or both a quantum well layer and a barrier layer in contact with the quantum well layer between an n-type layer and a p-type layer over the nitride semiconductor underlayer, while the width of the grooves is within the range of 11 to 30 &mgr;m and the width of the lands is within the range of 1 to 20 &mgr;m.
    Type: Application
    Filed: September 11, 2001
    Publication date: May 16, 2002
    Inventors: Yuhzoh Tsuda, Takayuki Yuasa, Shigetoshi Ito, Mototaka Taneya
  • Patent number: 6380051
    Abstract: A method for forming a nitride compound semiconductor film of the present invention includes the steps of: providing a substrate having a portion which acts as a growth suppressing film on a outermost surface thereof; forming a growth promoting film partially on the substrate; and forming a nitride compound semiconductor on the growth promoting film.
    Type: Grant
    Filed: June 21, 1999
    Date of Patent: April 30, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takayuki Yuasa, Yoshihiro Ueta
  • Publication number: 20020048964
    Abstract: A method for forming a nitride compound semiconductor film of the present invention includes the steps of: providing a substrate having a portion which acts as a growth suppressing film on a outermost surface thereof; forming a growth promoting film partially on the substrate; and forming a nitride compound semiconductor on the growth promoting film.
    Type: Application
    Filed: June 21, 1999
    Publication date: April 25, 2002
    Inventors: TAKAYUKI YUASA, YOSHIHIRO UETA
  • Publication number: 20020014681
    Abstract: A nitride semiconductor structure includes: a substrate having a growth surface, a convex portion and a concave portion being formed on the growth surface; and a nitride semiconductor film grown on the growth surface. A cavity is formed between the nitride semiconductor film and the substrate in the concave portion.
    Type: Application
    Filed: October 2, 2001
    Publication date: February 7, 2002
    Inventors: Yuhzoh Tsuda, Takayuki Yuasa
  • Publication number: 20020006045
    Abstract: The invention relates to a power supply unit which can fail-safely monitor not only for an excessive power supply output but also for an abnormal drop in output level. At the time of start-up, with the start signal from a start circuit, an AC signal is supplied to a primary side of a transformer and based on an AC output from a secondary side of the transformer, an output for supplying to an external load is generated and this output is monitored with a monitoring circuit. If the output level is within a set upper and lower limit threshold value range the output is judged to be normal and a high level normal verification signal is generated from the monitoring circuit, and with the high level normal verification signal, an AC signal is supplied to the primary side of the transformer, and the output supply to the external load is continued.
    Type: Application
    Filed: October 8, 1999
    Publication date: January 17, 2002
    Inventors: TOSHIHITO SHIRAI, MASAYOSHI SAKAI, KOICHI FUTSUHARA, TAKAYUKI YUASA
  • Patent number: 6335546
    Abstract: A nitride semiconductor structure includes: a substrate having a growth surface, a convex portion and a concave portion being formed on the growth surface; and a nitride semiconductor film grown on the growth surface. A cavity is formed between the nitride semiconductor film and the substrate in the concave portion.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: January 1, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yuhzoh Tsuda, Takayuki Yuasa
  • Publication number: 20010030329
    Abstract: A nitride compound semiconductor light emitting device includes: a GaN substrate having a crystal orientation which is tilted away from a <0001> direction by an angle which is equal to or greater than about 0.05° and which is equal to or less than about 2°, and a semiconductor multilayer structure formed on the GaN substrate, wherein the semiconductor multilayer structure includes: an acceptor doping layer containing a nitride compound semiconductor; and an active layer including a light emitting region.
    Type: Application
    Filed: January 12, 2001
    Publication date: October 18, 2001
    Inventors: Yoshihiro Ueta, Takayuki Yuasa, Atsushi Ogawa, Yuhzoh Tsuda, Masahiro Araki
  • Publication number: 20010023946
    Abstract: A crystal growth method for growing a nitride semiconductor crystal on a sapphire substrate in a vapor phase, includes the steps of: providing a sapphire substrate having a substrate orientation inclined by about 0.05° to about 0.2° from a <0001>orientation; and allowing a nitride semiconductor crystal to grow on the surface of the sapphire substrate.
    Type: Application
    Filed: May 3, 2001
    Publication date: September 27, 2001
    Inventors: Yoshihiro Ueta, Takayuki Yuasa
  • Patent number: 6252255
    Abstract: A crystal growth method for growing a nitride semiconductor crystal on a sapphire substrate in a vapor phase, includes the steps of: providing a sapphire substrate having a substrate orientation inclined by about 0.05° to about 0.2° from a <0001> orientation; and allowing a nitride semiconductor crystal to grow on the surface of the sapphire substrate.
    Type: Grant
    Filed: June 25, 1999
    Date of Patent: June 26, 2001
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihiro Ueta, Takayuki Yuasa
  • Patent number: 6017774
    Abstract: The present invention provides a method for producing a group III-V compound semiconductor including nitrogen as a group V element by an organometallic vapor phase growth method. An organometallic as a group III material, an amine type material or ammonia as a group V material and an organic compound which is decomposed by heating so as to generate radicals are used to perform crystal growth.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: January 25, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takayuki Yuasa, Kazuhiko Inoguchi
  • Patent number: 5995527
    Abstract: A semiconductor laser device including Ga.sub.x Al.sub.y In.sub.1-x-y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1)) layers has an InN contact layer, which has a thickness ranging, preferably, from 0.1 .mu.m to 1.0 .mu.m inclusive. The contact layer is formed by a MOCVD method. When materials for formation of the InN contact layer are fed into a reactor, an organic radical material is also fed and a substrate temperature is controlled to be about 800.degree. C. during the process of growth of the InN layer.
    Type: Grant
    Filed: February 20, 1997
    Date of Patent: November 30, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihiro Ueta, Kazuhiko Inoguchi, Takayuki Yuasa