Patents by Inventor Takehiko Kikuchi

Takehiko Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230420910
    Abstract: A bonding device includes an irradiator that irradiates a surface of a first component with ultraviolet rays, and a conveyor that conveys the first component, wherein the irradiator irradiates the first component held by the conveyor with the ultraviolet ray, and the conveyor conveys the first component irradiated with the ultraviolet rays to a surface of a second component, and brings the surface of the first component and the surface of the second component into contact with each other to bond the first component and the second component.
    Type: Application
    Filed: June 13, 2023
    Publication date: December 28, 2023
    Applicants: Sumitomo Electric Industries, Ltd., FOUR TECHNOS Co., Ltd.
    Inventors: Munetaka KUROKAWA, Naoki FUJIWARA, Takehiko KIKUCHI, Kazuo KASAYA, Takeshi MARUYAMA
  • Publication number: 20230275400
    Abstract: A method for producing a semiconductor optical device includes the steps of bonding a semiconductor chip to an SOI substrate having a waveguide, the semiconductor chip having an optical gain and including a first cladding layer, a core layer, and a second cladding layer that contain III-V group compound semiconductors and are sequentially stacked in this order, forming a covered portion with a first insulating layer on the second cladding layer, etching partway in the thickness direction the second cladding layer exposed from the first insulating film, forming a second insulating film covering from the covered portion to a part of a remaining portion of the second cladding layer, and forming a first tapered portion that is disposed on the waveguide and tapered along the extending direction of the waveguide by etching the core layer and the second cladding layer exposed from the second insulating film.
    Type: Application
    Filed: May 4, 2023
    Publication date: August 31, 2023
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoki FUJIWARA, Hideki YAGI, Takuo HIRATANI, Takehiko KIKUCHI, Toshiyuki NITTA
  • Patent number: 11735888
    Abstract: A method for producing a semiconductor optical device includes the steps of bonding a semiconductor chip to an SOI substrate having a waveguide, the semiconductor chip having an optical gain and including a first cladding layer, a core layer, and a second cladding layer that contain III-V group compound semiconductors and are sequentially stacked in this order, forming a covered portion with a first insulating layer on the second cladding layer, etching partway in the thickness direction the second cladding layer exposed from the first insulating film, forming a second insulating film covering from the covered portion to a part of a remaining portion of the second cladding layer, and forming a first tapered portion that is disposed on the waveguide and tapered along the extending direction of the waveguide by etching the core layer and the second cladding layer exposed from the second insulating film.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: August 22, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoki Fujiwara, Hideki Yagi, Takuo Hiratani, Takehiko Kikuchi, Toshiyuki Nitta
  • Publication number: 20230100618
    Abstract: A lock mechanism of a storage box can secure and release a lock pin of a lid member with a rotational operation of a cam member, and includes a cam support member for supporting the cam member, and a rotation lock plate for restricting the rotational movement of the cam member, in which the rotation lock plate is configured to restrict the rotational movement of the cam member in a case that the rotation lock plate is at a position along a contact part provided on the cam support member.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 30, 2023
    Inventors: Tsuyoshi Yamada, Takehiko Kikuchi
  • Publication number: 20230060877
    Abstract: A semiconductor optical device includes a substrate having an optical waveguide, a gain section formed of a compound semiconductor having an optical gain and bonded to an upper surface of the substrate, the gain section having a first mesa, and a first wiring line electrically connected to the gain section. The first mesa of the gain section is optically coupled to the optical waveguide. The substrate includes a first layer, a second layer, and a third layer. The first layer has a higher thermal conductivity than the second layer. The second layer is stacked on the first layer. The third layer is stacked on the second layer. A recess provided in the substrate extends through the third layer to the second layer in the thickness direction. The first wiring line extends from the first mesa of the gain section to the recess.
    Type: Application
    Filed: August 29, 2022
    Publication date: March 2, 2023
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Naoko KONISHI, Takehiko KIKUCHI, Hideki YAGI, Nobuhiko NISHIYAMA
  • Patent number: 11527866
    Abstract: A semiconductor optical device includes an SOI substrate having a waveguide of silicon, and at least one gain region of a group III-V compound semiconductor having an optical gain bonded to the SOI substrate. The waveguide has a bent portion and multiple linear portions extending linearly and connected to each other through the bent portion. The gain region is disposed on each of the multiple linear portions.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: December 13, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoki Fujiwara, Hideki Yagi, Hajime Shoji, Takuo Hiratani, Takehiko Kikuchi, Toshiyuki Nitta
  • Patent number: 11492058
    Abstract: A grab rail of a saddle riding vehicle is secured to a rear portion of a body frame. The grab rail includes: a grip that extends in a vehicle longitudinal direction; a grip extension that extends downward from a front end of the grip; a front side fixation portion that is connected to a lower end of the grip extension and is attached to the body frame; and a coupler that couples the grip extension and the front side fixation portion. The grab rail includes a luggage hook that is formed by an opening. The opening is defined by the grip extension, the front side fixation portion and the coupler.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: November 8, 2022
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Yoichi Nishida, Takehiko Kikuchi
  • Publication number: 20220278503
    Abstract: A method of manufacturing a semiconductor optical device includes a step of bonding a semiconductor element to a substrate that includes silicon, the semiconductor element being made of a III-V compound semiconductor and having optical gain; after the step of bonding the semiconductor element, a step of molding the semiconductor element by wet-etching; and after the step of molding the semiconductor element, a step of forming a mesa at the semiconductor element. The substrate includes a waveguide, a groove that extends along the waveguide, a terrace that is positioned on a side of the groove opposite to the waveguide, and a wall that covers the groove. The step of bonding the semiconductor element is a step of bonding the semiconductor element to the waveguide, the groove, the terrace, and the wall of the substrate.
    Type: Application
    Filed: February 8, 2022
    Publication date: September 1, 2022
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Takehiko KIKUCHI, Naoki FUJIWARA, Nobuhiko NISHIYAMA
  • Publication number: 20220247155
    Abstract: A semiconductor optical device includes a substrate containing silicon, and a semiconductor element bonded to the substrate, the semiconductor element being formed of a compound semiconductor and having an optical gain. The substrate includes a waveguide and a first region connected to the waveguide in an extension direction of the waveguide. The first region includes a plurality of recesses and a plurality of protrusions. Each of the plurality of recesses is recessed in a thickness direction of the substrate compared to a surface of the substrate to which the semiconductor element is bonded. Each of the plurality of protrusions protrudes in the thickness direction of the substrate from bottom surfaces of the plurality of recesses. The plurality of recesses and the plurality of protrusions are alternately disposed in a direction intersecting with the extension direction of the waveguide. The semiconductor element is bonded to the first region.
    Type: Application
    Filed: January 26, 2022
    Publication date: August 4, 2022
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Takuo HIRATANI, Naoki FUJIWARA, Takehiko KIKUCHI
  • Patent number: 11270907
    Abstract: A method for producing a semiconductor device includes a step of bonding a chip to a SOI wafer, the chip being formed of a III-V group compound semiconductor and including a substrate and a first semiconductor layer; and a step of removing the substrate and the first semiconductor layer from the chip after the step of bonding. In the producing method, the first semiconductor layer has a tensile strain, and the SOI wafer and the chip are heated to a first temperature in the step of bonding, and are cooled to a second temperature lower than the first temperature after the step of bonding.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: March 8, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takehiko Kikuchi, Hideki Yagi, Nobuhiko Nishiyama
  • Patent number: 11251143
    Abstract: A semiconductor device includes: a semiconductor layer formed on a substrate; a first resin layer formed on the semiconductor layer; a second resin layer formed on the first resin layer; a first wiring layer that is formed on the semiconductor layer and is buried in the second resin layer; a second wiring layer that is formed on the second resin layer and the first wiring layer, and is electrically connected to the first wiring layer; and a first inorganic insulating film covering the second resin layer and the second wiring layer, wherein an area of the first wiring layer is larger than an area of the second wiring layer.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: February 15, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masataka Watanabe, Naoya Kono, Takehiko Kikuchi
  • Patent number: 11148742
    Abstract: A link mechanism includes a first link connected to an operation element, and a second link for connecting the first link and a hook member. The hook member includes a hook portion disposed on a distal end portion of the hook member and engaged with the vehicle body, and a link mechanism connecting portion disposed on a base end portion of the hook member and connected to a first connecting shaft on one end portion of the second link. The hook member is pivotably supported by a turning shaft disposed between the hook portion and the link mechanism connecting portion. When the hook portion is engaged with the vehicle body, a straight line L1 connecting the turning shaft and the first connecting shaft is substantially orthogonal to a straight line connecting the first connecting shaft and a second connecting shaft, which is connected to the first link.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: October 19, 2021
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Takehiko Kikuchi, Shun Niijima
  • Publication number: 20210249840
    Abstract: A method for producing a semiconductor optical device includes the steps of bonding a semiconductor chip to an SOI substrate having a waveguide, the semiconductor chip having an optical gain and including a first cladding layer, a core layer, and a second cladding layer that contain III-V group compound semiconductors and are sequentially stacked in this order, forming a covered portion with a first insulating layer on the second cladding layer, etching partway in the thickness direction the second cladding layer exposed from the first insulating film, forming a second insulating film covering from the covered portion to a part of a remaining portion of the second cladding layer, and forming a first tapered portion that is disposed on the waveguide and tapered along the extending direction of the waveguide by etching the core layer and the second cladding layer exposed from the second insulating film.
    Type: Application
    Filed: January 21, 2021
    Publication date: August 12, 2021
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoki FUJIWARA, Hideki YAGI, Takuo HIRATANI, Takehiko KIKUCHI, Toshiyuki NITTA
  • Patent number: 11056341
    Abstract: A method of manufacturing an optical semiconductor element includes: stacking a plurality of compound semiconductor layers on a first substrate containing a compound semiconductor; dividing the first substrate into small pieces; forming terraces, grooves, walls, and a first mesa for a waveguide on a second substrate containing silicon; jointing at least one small piece to the second substrate after the forming; wet-etching the first substrate so as to expose the compound semiconductor layers after the jointing; and forming a second mesa opposite to the first mesa from the compound semiconductor layers; wherein the grooves are formed on both sides of the first mesa, the terraces are formed on both sides of the first mesa and the grooves, and the walls are arranged in an extending direction of each groove.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: July 6, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takehiko Kikuchi, Morihiro Seki, Nobuhiko Nishiyama
  • Publication number: 20210126428
    Abstract: A semiconductor optical device includes an SOI substrate having a waveguide of silicon, and at least one gain region of a group III-V compound semiconductor having an optical gain bonded to the SOI substrate. The waveguide has a bent portion and multiple linear portions extending linearly and connected to each other through the bent portion. The gain region is disposed on each of the multiple linear portions.
    Type: Application
    Filed: October 23, 2020
    Publication date: April 29, 2021
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoki FUJIWARA, Hideki YAGI, Hajime SHOJI, Takuo HIRATANI, Takehiko KIKUCHI, Toshiyuki NITTA
  • Publication number: 20210066117
    Abstract: A method for producing a semiconductor device includes a step of bonding a chip to a SOI wafer, the chip being formed of a III-V group compound semiconductor and including a substrate and a first semiconductor layer; and a step of removing the substrate and the first semiconductor layer from the chip after the step of bonding. In the producing method, the first semiconductor layer has a tensile strain, and the SOI wafer and the chip are heated to a first temperature in the step of bonding, and are cooled to a second temperature lower than the first temperature after the step of bonding.
    Type: Application
    Filed: August 21, 2020
    Publication date: March 4, 2021
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takehiko KIKUCHI, Hideki YAGI, Nobuhiko NISHIYAMA
  • Publication number: 20200365445
    Abstract: A susceptor includes a first metal plate and a second metal plate bonded to a surface of the first metal plate. The second metal plate has a plurality of first openings. The surface of the first metal plate is exposed from the plurality of first openings.
    Type: Application
    Filed: April 27, 2020
    Publication date: November 19, 2020
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takehiko KIKUCHI, Nobuhiko NISHIYAMA
  • Publication number: 20200290696
    Abstract: A link mechanism includes a first link connected to an operation element, and a second link for connecting the first link and a hook member. The hook member includes a hook portion disposed on a distal end portion of the hook member and engaged with the vehicle body, and a link mechanism connecting portion disposed on a base end portion of the hook member and connected to a first connecting shaft on one end portion of the second link. The hook member is pivotably supported by a turning shaft disposed between the hook portion and the link mechanism connecting portion. When the hook portion is engaged with the vehicle body, a straight line L1 connecting the turning shaft and the first connecting shaft is substantially orthogonal to a straight line connecting the first connecting shaft and a second connecting shaft, which is connected to the first link.
    Type: Application
    Filed: February 21, 2020
    Publication date: September 17, 2020
    Inventors: Takehiko Kikuchi, Shun Niijima
  • Publication number: 20200164939
    Abstract: A grab rail of a saddle riding vehicle is secured to a rear portion of a body frame. The grab rail includes: a grip that extends in a vehicle longitudinal direction; a grip extension that extends downward from a front end of the grip; a front side fixation portion that is connected to a lower end of the grip extension and is attached to the body frame; and a coupler that couples the grip extension and the front side fixation portion. The grab rail includes a luggage hook that is formed by an opening. The opening is defined by the grip extension, the front side fixation portion and the coupler.
    Type: Application
    Filed: October 9, 2019
    Publication date: May 28, 2020
    Inventors: Yoichi Nishida, Takehiko Kikuchi
  • Publication number: 20200105691
    Abstract: A semiconductor device includes: a semiconductor layer formed on a substrate; a first resin layer formed on the semiconductor layer; a second resin layer formed on the first resin layer; a first wiring layer that is formed on the semiconductor layer and is buried in the second resin layer; a second wiring layer that is formed on the second resin layer and the first wiring layer, and is electrically connected to the first wiring layer; and a first inorganic insulating film covering the second resin layer and the second wiring layer, wherein an area of the first wiring layer is larger than an area of the second wiring layer.
    Type: Application
    Filed: September 17, 2019
    Publication date: April 2, 2020
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masataka Watanabe, Naoya Kono, Takehiko Kikuchi