Patents by Inventor Takehiko Nakahara

Takehiko Nakahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130258505
    Abstract: A method of manufacturing an optical apparatus having an optical element, a holding member, and a base member includes preparing the holding member and fixing the optical element to the first member. The method further includes fixing a second member of the holding member to the base member and plastically deforming a first member of the holding member and the second member to adjust the position of the optical element.
    Type: Application
    Filed: February 27, 2013
    Publication date: October 3, 2013
    Inventors: Nobuyuki YASUI, Takehiko Nakahara, Masaya Shimono, Keiichi Fukuda, Keita Mochizuki, Hiroshi Aruga, Kenichi Uto, Tadashi Murao, Hidekazu Kodera
  • Patent number: 8294236
    Abstract: A semiconductor device having a memory cell area and a peripheral circuit area includes a silicon substrate and an isolation structure implemented by a silicon oxide film formed on a surface of the silicon substrate. A depth of the isolation structure in the memory cell area is smaller than a depth of the isolation structure in the peripheral circuit area, and an isolation height of the isolation structure in the memory cell area is substantially the same as an isolation height of the isolation structure in the peripheral circuit area. Reliability of the semiconductor device can thus be improved.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: October 23, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Noriyuki Mitsuhira, Takehiko Nakahara, Yasusuke Suzuki, Jun Sumino
  • Publication number: 20110057287
    Abstract: A semiconductor device having a memory cell area and a peripheral circuit area includes a silicon substrate and an isolation structure implemented by a silicon oxide film formed on a surface of the silicon substrate. A depth of the isolation structure in the memory cell area is smaller than a depth of the isolation structure in the peripheral circuit area, and an isolation height of the isolation structure in the memory cell area is substantially the same as an isolation height of the isolation structure in the peripheral circuit area. Reliability of the semiconductor device can thus be improved.
    Type: Application
    Filed: November 15, 2010
    Publication date: March 10, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Noriyuki MITSUHIRA, Takehiko NAKAHARA, Yasusuke SUZUKI, Jun SUMINO
  • Patent number: 7858490
    Abstract: A semiconductor device having a memory cell area and a peripheral circuit area includes a silicon substrate and an isolation structure implemented by a silicon oxide film formed on a surface of the silicon substrate. A depth of the isolation structure in the memory cell area is smaller than a depth of the isolation structure in the peripheral circuit area, and an isolation height of the isolation structure in the memory cell area is substantially the same as an isolation height of the isolation structure in the peripheral circuit area. Reliability of the semiconductor device can thus be improved.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: December 28, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Noriyuki Mitsuhira, Takehiko Nakahara, Yasusuke Suzuki, Jun Sumino
  • Publication number: 20080213971
    Abstract: A semiconductor device having a memory cell area and a peripheral circuit area includes a silicon substrate and an isolation structure implemented by a silicon oxide film formed on a surface of the silicon substrate. A depth of the isolation structure in the memory cell area is smaller than a depth of the isolation structure in the peripheral circuit area, and an isolation height of the isolation structure in the memory cell area is substantially the same as an isolation height of the isolation structure in the peripheral circuit area. Reliability of the semiconductor device can thus be improved.
    Type: Application
    Filed: March 13, 2008
    Publication date: September 4, 2008
    Applicant: RENESAS TECHNOLOGY CORP
    Inventors: Noriyuki Mitsuhira, Takehiko Nakahara, Yasusuke Suzuki, Jun Sumino
  • Publication number: 20060035437
    Abstract: A semiconductor device having a memory cell area and a peripheral circuit area includes a silicon substrate and an isolation structure implemented by a silicon oxide film formed on a surface of the silicon substrate. A depth of the isolation structure in the memory cell area is smaller than a depth of the isolation structure in the peripheral circuit area, and an isolation height of the isolation structure in the memory cell area is substantially the same as an isolation height of the isolation structure in the peripheral circuit area. Reliability of the semiconductor device can thus be improved.
    Type: Application
    Filed: August 10, 2005
    Publication date: February 16, 2006
    Inventors: Noriyuki Mitsuhira, Takehiko Nakahara, Yasusuke Suzuki, Jun Sumino
  • Patent number: 6620306
    Abstract: A method of manufacturing electrode foil for aluminum electrolytic capacitors and an AC power supply unit used therewith are disclosed. An etching is performed on an aluminum foil immersed in an electrolytic solution by applying an AC current to a pair of electrodes in the electrolytic solution. A waveform of the AC current is a deformed sine wave including a period of time (a) when an electric current rises from zero to a peak value, and another period of time (b) when the electric current falls from the peak value to zero. With the periods of time (a) and (b) made different from each other, the surface area of the aluminum foil is efficiently expanded by the etching and an enhancement of electric capacity of the electrode foil is obtained.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: September 16, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsuhisa Yoshimura, Takehiko Nakahara, Kazunari Hayashi, Hiromi Nakanishi, Naomi Kurihara
  • Patent number: 6519137
    Abstract: The present invention relates to a solid electrolytic capacitor having a large capacitance and a higher resistance to heat and adapted as a surface-mount device and a method of producing the same. The invention may include the followings features: (1) a layer containing an electroconductive polymer and a less conductive polymer is provided on a dielectric oxide film on the positive electrode foil; (2) a separator of a polyester resin based unwoven fabric made by span bonding and/or wet processing a resin material is sandwiched between the positive electrode foil and the negative electrode foil and rolled together to form a capacitor element which also include a solid electrolyte; (3) a separator is sandwiched between the positive electrode foil and the negative electrode foil coated with a dielectric oxide film exhibiting a withstand voltage of 0.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: February 11, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yukihiro Nitta, Yoshiyuki Mori, Munehiro Morokuma, Yuki Murata, Kazuyo Saito, Tsuyoshi Yoshino, Yoshihiro Watanabe, Hideki Masumi, Takehiko Nakahara, Ichiro Yamashita
  • Publication number: 20020092777
    Abstract: A method of manufacturing electrode foil for aluminum electrolytic capacitors and an AC power supply unit used therewith. An etching is performed on an aluminum foil immersed in a electrolytic solution by applying an AC current to a pair of electrodes in the electrolytic solution. A waveform of the AC current is a deformed sine wave including a period of time (a) when an electric current rises from zero to a peak value, and another period of time (b) when the electric current falls from the peak value to zero. With the periods of time (a) and (b) made different from each other, the surface area of the aluminum foil is expanded by the etching efficiently and an enhancement of electric capacity of the electrode foil is obtained.
    Type: Application
    Filed: November 27, 2001
    Publication date: July 18, 2002
    Inventors: Mitsuhisa Yoshimura, Takehiko Nakahara, Kazunari Hayashi, Hiromi Nakanishi, Naomi Kurihara
  • Patent number: 5317618
    Abstract: A light transmission type vacuum separating window for separating a vacuum area into a plurality of vacuum areas through a film that transmits the light of a wavelength area such as an X-ray area and an infrared ray area. This vacuum separating window includes a thin film that transmits the light. The vacuum area is separated into the plurality of vacuum areas through this thin film. The light is any one of an X-ray, an infrared ray, a visible ray and an ultraviolet ray. A metal or an alloy that turns out a liquid in a range of temperature of a using environment may be provided between the thin film and the support member for supporting the thin film. This metal is preferably gallium. The alloy preferably contains gallium and, more preferably, consists of 75.5 weight % gallium and 24.5 weight % indium.
    Type: Grant
    Filed: January 14, 1993
    Date of Patent: May 31, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takehiko Nakahara, Masao Koshinaka, Nobuyuki Kosaka
  • Patent number: 5305366
    Abstract: This invention relates to a method and apparatus for analyzing a plurality of elements that are present on the surface of a material of interest or in its neighborhood, as well as a thin-film forming apparatus that is capable of measuring the composition of a sample during thin film formation in the process of semi-conductor fabrication. The apparatus are characterized in that a detector is isolated from the light and heat generated in a sample making mechanism by means of a shield which is not only heat-resistant but also transmissive of fluorescent X-ray containing soft X-rays of 1 Kev and below and that a mirror for total reflection of X-rays which is equipped with slits capable of adjusting the incident and exit angles of fluorescent X-rays from the sample excited with an excitation source as well as the ranges of those angles is provided either at the entrance or exit of said shield or at both.
    Type: Grant
    Filed: January 7, 1992
    Date of Patent: April 19, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takehiko Nakahara, Masao Koshinaka, Nobuyuki Kosaka, Toshimasa Tomoda