Patents by Inventor Takeo Takahashi

Takeo Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100133169
    Abstract: A hollow-fiber porous membrane, comprising a hollow fiber-form porous membrane of vinylidene fluoride resin providing: a ratio F (L=200 mm, v=70%)/Pm4 of at least 7×105 (m/day·?m4), wherein the ratio F (L=200 mm, v=70%)/Pm4 denotes a ratio between F (L=200 mm, v=70%) which is a value normalized to a porosity v=70% of a water permeation rate F (100 kPa, L=200 mm) measured at a test length L=200 mm under the conditions of a pressure difference of 100 kPa and a water temperature of 25° C. and a 4-th order value Pm4 of an average pore size Pm. The hollow-fiber porous membrane has an average pore size smaller than before leading to an improved ability of removing fine particles, while suppressing the lowering in water permeability.
    Type: Application
    Filed: March 21, 2008
    Publication date: June 3, 2010
    Inventors: Yasuhiro Tada, Takeo Takahashi, Toshiya Mizuno
  • Publication number: 20100080055
    Abstract: Disclosed herein is a semiconductor memory device which prevents the voltage of a select bit line from being reduced due to the action of coupling capacitance between the select bit line and a non-select bit line, reduces current consumption, and enables high speed reading of bit lines. The semiconductor memory device includes a plurality of memory banks, a plurality of second bit lines, a plurality of selector circuits, a voltage supply circuit. Each of the memory banks includes a plurality of first bit lines, a plurality of word lines, and a plurality of memory banks which are installed between the first bit lines and the word lines. The voltage supply circuit holds non-select bit lines of the first bit lines at the GND level at all times.
    Type: Application
    Filed: December 3, 2009
    Publication date: April 1, 2010
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventor: Takeo TAKAHASHI
  • Patent number: 7651318
    Abstract: A super steam turbine (100) into which high-temperature steam of 650° C. or more is introduced is provided with an inner steam pipe (120) which is disposed through an inner casing (110) and an outer casing (111), an outer steam pipe (130) which is welded to the outer casing (111) and disposed outside of the inner steam pipe (120) along the inner steam pipe (120) with a prescribed space therebetween, and a radiation heat shielding pipe (140) which is disposed along the inner steam pipe (120) between the inner steam pipe (120) and the outer steam pipe (130) to face a welded portion of at least the outer steam pipe (130), wherein cooling steam (160) is flown between the inner steam pipe (120) and the outer steam pipe (130), respective component parts are made of a suitable heat-resisting steel having prescribed chemical composition ranges.
    Type: Grant
    Filed: April 6, 2007
    Date of Patent: January 26, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeo Suga, Ryuichi Ishii, Takeo Takahashi, Masafumi Fukuda
  • Patent number: 7643367
    Abstract: Disclosed herein is a semiconductor memory device which prevents the voltage of a select bit line from being reduced due to the action of coupling capacitance between the select bit line and a non-select bit line, reduces current consumption, and enables high speed reading of bit lines. The semiconductor memory device includes a plurality of memory banks, a plurality of second bit lines, a plurality of selector circuits, a voltage supply circuit. Each of the memory banks includes a plurality of first bit lines, a plurality of word lines, and a plurality of memory banks which are installed between the first bit lines and the word lines. The voltage supply circuit holds non-select bit lines of the first bit lines at the GND level at all times.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: January 5, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Takeo Takahashi
  • Publication number: 20090297785
    Abstract: There is provided a method for manufacturing an electronic device including: printing a conductive pattern on a first surface of a first green sheet having a multilayer structure, the conductive pattern being electrically connected to an internal interconnection formed in the first green sheet; superposing a second green sheet on the first surface of the first green sheet, the second green sheet having an opening located in an area corresponding to the conductive pattern; pressurizing the first green sheet and the second green sheet superposed thereon in directions in which the second green sheet is superposed on the first green sheet; burning the first green sheet and the second green sheet superimposed thereon to thus form a multilayer ceramic substrate; and mounting an electronic element on a second surface of the multilayer ceramic substrate opposite to the first surface, the electronic element being electrically connected to the internal interconnection.
    Type: Application
    Filed: May 29, 2009
    Publication date: December 3, 2009
    Applicants: FUJITSU MEDIA DEVICES LIMITED, FUJITSU LIMITED
    Inventors: Satoshi UEDA, Xiaoyu MI, Takeo TAKAHASHI
  • Publication number: 20090285692
    Abstract: An Ni-base alloy for a turbine rotor of a steam turbine contains in percent by weight C: 0.01 to 0.15, Cr: 15 to 28, Co: 10 to 15, Mo: 8 to 12, Al: 1.5 to 2, Ti: 0.1 to 0.6, B: 0.001 to 0.006, Re: 0.5 to 3, and the balance of Ni and unavoidable impurities.
    Type: Application
    Filed: March 13, 2009
    Publication date: November 19, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kuniyoshi NEMOTO, Kiyoshi IMAI, Yomei YOSHIOKA, Masayuki YAMADA, Reki TAKAKU, Shigekazu MIYASHITA, Takeo SUGA, Takeo TAKAHASHI, Kenichi OKUNO, Akihiro TAKAKUWA
  • Publication number: 20090261034
    Abstract: A hollow-fiber porous membrane comprising a hollow-fiber form of vinylidene fluoride resin and satisfying the following properties (A) and (B), is provided as a hollow-fiber porous membrane of vinylidene fluoride resin having an average pore size and a further uniform pore size distribution (A) and a large water permeation rate regardless of good efficiency of blocking minute particles (bacteria) (B), as represented by: (A) a ratio Pmax (1 m)/Pm of at most 4.0 between a maximum pore size Pmax (1 m) measured at a test length of 1 m according to the bubble point method and an average pore size Pm of 0.05-0.
    Type: Application
    Filed: September 12, 2006
    Publication date: October 22, 2009
    Inventors: Takeo Takahashi, Yasuhiro Tada, Kenichi Suzuki, Masayuki Hino, Toshiya Mizuno
  • Publication number: 20090237894
    Abstract: An electronic device includes a substrate, a coil that has a spiral shape and is provided on the substrate, and a conductive pattern that is provided inside of the coil, has optical reflectivity higher than that of a surface of the coil, and is divided into pieces.
    Type: Application
    Filed: September 26, 2008
    Publication date: September 24, 2009
    Applicants: FUJITSU MEDIA DEVICES LIMITED, FUJITSU LIMITED
    Inventors: Satoshi UEDA, Takeo TAKAHASHI, Tsuyoshi MATSUMOTO, Tsuyoshi YOKOYAMA, Xiaoyu Mi
  • Publication number: 20090219670
    Abstract: A method of fabricating an electronic device includes selectively forming a glass layer on a ceramic substrate by printing, baking the glass layer, and forming a capacitor on the glass layer, the capacitor including metal electrodes and a dielectric layer interposed between the metal electrodes.
    Type: Application
    Filed: February 27, 2009
    Publication date: September 3, 2009
    Applicants: FUJITSU MEDIA DEVICES LIMITED, FUJITSU LIMITED
    Inventors: Takeo TAKAHASHI, Xiaoyu Mi, Satoshi Ueda
  • Patent number: 7582353
    Abstract: Monofilaments comprising resin compositions which contain 1% by mass or more of a comonomer component (for example, hexafluoropropylene), have an intrinsic viscosity of 1.3 dl/g or more and a melting point of 165° C. or higher and contain a PVDF-based resin. Owing to the above composition and physical properties, the crystallinity and elastic modulus of the PVDF-based resin are altered. As a result, an appropriate flexibility can be imparted to the monofilaments while preventing deterioration in the mechanical properties.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: September 1, 2009
    Assignee: Kureha Corporation
    Inventors: Satoshi Hashimoto, Shingo Taniguchi, Yasuhiro Tada, Masayuki Hino, Masaru Satou, Takeo Takahashi
  • Publication number: 20090213561
    Abstract: An electronic device includes an insulative substrate, a spiral inductor formed by an interconnection layer provided on a first surface of the insulative layer, a first chip that is mounted on a second surface of the insulative layer opposite to the first surface and is electrically connected to a passive circuit including the spiral inductor, the first chip having an electrically conductive substrate, and a first protrusion that is provided on one of the first and second surface of the insulative substrate and protrudes therefrom, the first protrusion being electrically connected to one of the passive circuit and the first chip to an external circuit.
    Type: Application
    Filed: February 24, 2009
    Publication date: August 27, 2009
    Applicants: FUJITSU MEDIA DEVICES LIMITED, FUJITSU LIMITED
    Inventors: Xiaoyu Mi, Takeo Takahashi, Satoshi Ueda, Tatsuya Kakehashi, Hidehiko Ishiguro, Shinya Yamamoto
  • Publication number: 20090206035
    Abstract: A hollow-fiber porous membrane, comprising a hollow fiber-form porous membrane in a network texture of vinylidene fluoride resin showing a pore size distribution in a direction of its membrane thickness including an outer surface-average pore size P1 as measured by a scanning electron microscope and a membrane layer-average pore size P2 as measured by half-dry method giving a ratio P1/P2 of at least 2.5. The hollow-fiber porous membrane is excellent in long-term water filtration performance including efficiency of regeneration by air scrubbing. The hollow-fiber porous membrane is produced through a process, wherein a mixture of vinylidene fluoride resin, a plasticizer and a good solvent for vinylidene fluoride resin, is melt-extruded in a hollow-fiber film and cooled and formed into a solidified film within a cooling medium containing at least a certain proportion of a good solvent for vinylidene fluoride resin.
    Type: Application
    Filed: February 9, 2006
    Publication date: August 20, 2009
    Applicant: KUREHA CORPORATION
    Inventors: Takeo Takahashi, Yasuhiro Tada, Kenichi Suzuki, Masayuki Hino, Shingo Taniguchi, Toshiya Mizuno
  • Patent number: 7569145
    Abstract: There is provided a porous hollow fiber of vinylidene fluoride resin which has a water permeation rate that is large per fiber and little dependent on the length, has a large treatment capacity per volume of a filtering module, and is therefore suitable as a microfilter element. That is, a porous hollow fiber, comprising a vinylidene fluoride resin having a weight-average molecular weight of at least 3×105, having a water permeation rate F (m3/m2·day) measured at a pressure difference of 100 kPa and at a water temperature of 25° C. in a range of test length L=0.2-0.8 (m) and expressed in a linear relationship with the test length L of: F=C·L+F0 (formula 1) and satisfying requirements (a)-(d) shown below: (a) a average slope C (/day) of: ?20?C?0, (b) an intercept (basic permeability) F0 (m3/m2·day) of: F0?30, (c) a relation between F0 (m3/m2·day) and an average pore diameter P (?m) according to half-dry method of F0/P?300, and (d) an outer diameter of at most 3 mm.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: August 4, 2009
    Assignee: Kureha Corporation
    Inventors: Yasuhiro Tada, Takeo Takahashi, Masayuki Hino, Toshiya Mizuno, Kosuke Abe
  • Publication number: 20090166068
    Abstract: An electronic component includes: a multilayer ceramic substrate that has a penetration electrode formed therein, and has a passive element provided on the upper face thereof; an insulating film that is provided on the multilayer ceramic substrate, and has an opening above the penetration electrode; a first connecting terminal that is provided on the insulating film so as to cover the opening, and is electrically connected to the penetration electrode; and a second connecting terminal that is provided on a region of the insulating film other than the opening region.
    Type: Application
    Filed: December 24, 2008
    Publication date: July 2, 2009
    Applicants: FUJITSU MEDIA DEVICES LIMITED, FUJITSU LIMITED
    Inventors: Takeo Takahashi, Xiaoyu Mi, Tsuyoshi Yokoyama, Tokihiro Nishihara, Satoshi Ueda
  • Publication number: 20090170032
    Abstract: A method of manufacturing an electronic device includes forming a photosensitive SOG oxide layer on a multi-layer ceramics substrate having a penetrating electrode, forming an opening by subjecting the photosensitive SOG oxide layer to an exposure treatment and developing treatment so that an upper face of the penetrating electrode is exposed, and forming a passive element on the photosensitive SOG oxide layer, the passive element being connected to the penetrating electrode through the opening.
    Type: Application
    Filed: December 24, 2008
    Publication date: July 2, 2009
    Applicants: FUJITSU MEDIA DEVICES LIMITED, FUJITSU LIMITED
    Inventors: Takeo Takahashi, Xiaoyu Mi, Tsuyoshi Yokohama, Satoshi Ueda
  • Patent number: 7551054
    Abstract: An electronic device includes: an insulating substrate; at least one capacitor and an inductor that are formed directly on the insulating substrate; a line that connects the capacitor and the inductor from the above; and an external connecting pad unit that is made of the same conductor as the line and is disposed on the insulating substrate.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: June 23, 2009
    Assignees: Fujitsu Limited, Fujitsu Media Devices Limited
    Inventors: Yoshihiro Mizuno, Xiaoyu Mi, Hisao Okuda, Hiromitsu Soneda, Satoshi Ueda, Takeo Takahashi
  • Publication number: 20090085707
    Abstract: An electronic device includes a substrate, a first coil that has a spiral shape and is provided on the substrate, a second coil that has a spiral shape, is provided above the first coil, and is spaced from the first coil, a first connection portion that electrically couples the first coil and the second coil, a wire that is provided on the substrate and connects one of the first coil and the second coil to outside, and a second connection portion that is mechanically connected to an outer side face of outermost circumference of the second coil and is mechanically connected on the substrate where one of the wire and the first coil is not provided.
    Type: Application
    Filed: September 25, 2008
    Publication date: April 2, 2009
    Applicants: FUJITSU MEDIA DEVICES LIMITED, FUJITSU LIMITED
    Inventors: Xiaoyu MI, Takeo Takahashi, Tsuyoshi Matsumoto, Satoshi Ueda
  • Publication number: 20090085708
    Abstract: An electronic device includes a substrate, two ellipse spiral coils that are provided on the substrate, are spaced from each other in a longitudinal direction thereof, and are electrically connected to each other, two wires that are electrically connected to outermost circumference of the two coils respectively and extract the two coils to outside, and a connection portion that electrically connects each end of innermost circumference of the two coils. A ratio of inner diameter against outer diameter of the two coils in a long axis direction and in a short axis direction thereof is respectively 0.5 to 0.8.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 2, 2009
    Applicants: FUJITSU MEDIA DEVICES LIMITED, FUJITSU LIMITED
    Inventors: Tsuyoshi MATSUMOTO, Xiaoyu Mi, Takeo Takahashi, Satoshi Ueda
  • Publication number: 20090046494
    Abstract: Disclosed herein is a semiconductor memory device which prevents the voltage of a select bit line from being reduced due to the action of coupling capacitance between the select bit line and a non-select bit line, reduces current consumption, and enables high speed reading of bit lines. The semiconductor memory device includes a plurality of memory banks, a plurality of second bit lines, a plurality of selector circuits, a voltage supply circuit. Each of the memory banks includes a plurality of first bit lines, a plurality of word lines, and a plurality of memory banks which are installed between the first bit lines and the word lines. The voltage supply circuit holds non-select bit lines of the first bit lines at the GND level at all times.
    Type: Application
    Filed: August 15, 2007
    Publication date: February 19, 2009
    Applicant: OKI ELECTRIC INDUSTRY CO., LTD.
    Inventor: Takeo TAKAHASHI
  • Patent number: 7484926
    Abstract: A steam turbine power plant which is provided with an extra-high-pressure turbine 100, a high-pressure turbine 200, an intermediate-pressure turbine 300 and a low-pressure turbine 400, and has high-temperature steam of 650° C. or more introduced into the extra-high-pressure turbine 100, wherein the extra-high-pressure turbine 100 has an outer casing cooling unit which cools an outer casing 111, and a turbine rotor 112, an inner casing 110 and a nozzle box 115 of the extra-high-pressure turbine 100 are formed of an Ni base heat-resisting alloy, and the outer casing 111 is formed of a ferrite-based alloy.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: February 3, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeo Suga, Ryuichi Ishii, Takeo Takahashi, Masafumi Fukuda