Patents by Inventor Takeshi Fukunaga

Takeshi Fukunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8956895
    Abstract: An inexpensive light emitting device and inexpensive electric equipment are provided. A substrate on which a semiconductor element or a light emitting element is formed and a color filter are manufactured by separate manufacturing processes, and they are bonded to each other to complete the light emitting device. Thus, the yield of the light emitting device is improved and the manufacture period is shortened.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: February 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Fukunaga, Jun Koyama, Kazutaka Inukai
  • Publication number: 20150034936
    Abstract: To provide a bright and highly reliable light-emitting device. An anode (102), an EL layer (103), a cathode (104), and an auxiliary electrode (105) are formed sequentially in lamination on a reflecting electrode (101). Further, the anode (102), the cathode (104), and the auxiliary electrode (105) are either transparent or semi-transparent with respect to visible radiation. In such a structure, lights generated in the EL layer (103) are almost all irradiated to the side of the cathode (104), whereby an effect light emitting area of a pixel is drastically enhanced.
    Type: Application
    Filed: August 15, 2014
    Publication date: February 5, 2015
    Inventors: Takeshi Fukunaga, Junya Maruyama
  • Patent number: 8941565
    Abstract: An EL display device capable of performing clear multi-gradation color display and electronic equipment provided with the EL display device are provided, wherein gradation display is performed according to a time-division driving method in which the luminescence and non-luminescence of an EL element (109) disposed in a pixel (104) are controlled by time, and the influence by the characteristic variability of a current controlling TFT (108) is prevented. When this method is used, a data signal side driving circuit (102) and a gate signal side driving circuit (103) are formed with TFTs that use a silicon film having a peculiar crystal structure and exhibit an extremely high operation speed.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: January 27, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukio Yamauchi, Takeshi Fukunaga
  • Publication number: 20140347254
    Abstract: An EL display device capable of performing clear multi-gradation color display and electronic equipment provided with the EL display device are provided, wherein gradation display is performed according to a time-division driving method in which the luminescence and non-luminescence of an EL element (109) disposed in a pixel (104) are controlled by time, and the influence by the characteristic variability of a current controlling TFT (108) is prevented. When this method is used, a data signal side driving circuit (102) and a gate signal side driving circuit (103) are formed with TFTs that use a silicon film having a peculiar crystal structure and exhibit an extremely high operation speed.
    Type: Application
    Filed: August 11, 2014
    Publication date: November 27, 2014
    Inventors: Yukio YAMAUCHI, Takeshi FUKUNAGA
  • Patent number: 8884301
    Abstract: To provide a high throughput film deposition means for film depositing an organic EL material made of polymer accurately and without any positional shift. A pixel portion is divided into a plurality of pixel rows by a bank, and a head portion of a thin film deposition apparatus is scanned along a pixel row to thereby simultaneously apply a red light emitting layer application liquid, a green light emitting layer application liquid, and a blue light emitting layer application liquid in stripe shapes. Heat treatment is then performed to thereby form light emitting layers luminescing each of the colors red, green, and blue.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kunitaka Yamamoto, Masaaki Hiroki, Takeshi Fukunaga
  • Patent number: 8830146
    Abstract: An EL display device capable of performing clear multi-gradation color display and electronic equipment provided with the EL display device are provided, wherein gradation display is performed according to a time-division driving method in which the luminescence and non-luminescence of an EL element (109) disposed in a pixel (104) are controlled by time, and the influence by the characteristic variability of a current controlling TFT (108) is prevented. When this method is used, a data signal side driving circuit (102) and a gate signal side driving circuit (103) are formed with TFTs that use a silicon film having a peculiar crystal structure and exhibit an extremely high operation speed.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: September 9, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukio Yamauchi, Takeshi Fukunaga
  • Patent number: 8815331
    Abstract: A cleaning method of removing a vapor-deposition material adhering to equipments without exposure to the atmosphere is provided. A vapor-deposition material adhering to equipments (components of a film-forming apparatus) such as a substrate holder, a vapor-deposition mask, a mask holder, or an adhesion preventing shield provided in a film-forming chamber are subjected to heat treatment. Because of this, the adhering vapor-deposition material is re-sublimated, and removed by exhaust through a vacuum pump. By including such a cleaning method in the steps of manufacturing an electro-optical device, the manufacturing steps are shortened, and an electro-optical device with high reliability can be realized.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: August 26, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Takeshi Fukunaga
  • Patent number: 8810130
    Abstract: To provide a bright and highly reliable light-emitting device. An anode (102), an EL layer (103), a cathode (104), and an auxiliary electrode (105) are formed sequentially in lamination on a reflecting electrode (101). Further, the anode (102), the cathode (104), and the auxiliary electrode (105) are either transparent or semi-transparent with respect to visible radiation. In such a structure, lights generated in the EL layer (103) are almost all irradiated to the side of the cathode (104), whereby an effect light emitting area of a pixel is drastically enhanced.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: August 19, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Fukunaga, Junya Maruyama
  • Publication number: 20140225130
    Abstract: A light-emitting device having the quality of an image high in homogeneity is provided. A printed wiring board (second substrate) (107) is provided facing a substrate (first substrate) (101) that has a luminous element (102) formed thereon. A PWB side wiring (second group of wirings) (110) on the printed wiring board (107) is electrically connected to element side wirings (first group of wirings) (103, 104) by anisotropic conductive films (105a, 105b). At this point, because a low resistant copper foil is used to form the PWB side wiring (110), a voltage drop of the element side wirings (103, 104) and a delay of a signal can be reduced. Accordingly, the homogeneity of the quality of an image is improved, and the operating speed of a driver circuit portion is enhanced.
    Type: Application
    Filed: April 17, 2014
    Publication date: August 14, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Fukunaga
  • Patent number: 8716933
    Abstract: A light-emitting device having the quality of an image high in homogeneity is provided. A printed wiring board (second substrate) (107) is provided facing a substrate (first substrate) (101) that has a luminous element (102) formed thereon. A PWB side wiring (second group of wirings) (110) on the printed wiring board (107) is electrically connected to element side wirings (first group of wirings) (103, 104) by anisotropic conductive films (105a, 105b). At this point, because a low resistant copper foil is used to form the PWB side wiring (110), a voltage-drop of the element side wirings (103, 104) and a delay of a signal can be reduced. Accordingly, the homogeneity of the quality of an image is improved, and the operating speed of a driver circuit portion is enhanced.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: May 6, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Fukunaga
  • Patent number: 8643015
    Abstract: In a CMOS circuit formed on a substrate 100, a subordinate gate wiring line (a first wiring line) 102a and main gate wiring line (a second wiring line) 113a are provided in an n-channel TFT. The LDD regions 107a and 107b overlap the first wiring line 102a and not overlap the second wiring line 113a. Thus, applying a gate voltage to the first wiring line forms the GOLD structure, while not applying forms the LLD structure. In this way, the GOLD structure and the LLD structure can be used appropriately in accordance with the respective specifications required for the circuits.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: February 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yu Yamazaki, Jun Koyama, Takayuki Ikeda, Hiroshi Shibata, Hidehito Kitakado, Takeshi Fukunaga
  • Patent number: 8642405
    Abstract: A process for producing an adhered SOI substrate without causing cracking and peeling of a single-crystal silicon thin film. The process consists of selectively forming a porous silicon layer in a single-crystal semiconductor substrate, adding hydrogen into the single-crystal semiconductor substrate to form a hydrogen-added layer, adhering the single-crystal semiconductor substrate to a supporting substrate, separating the single-crystal semiconductor substrate at the hydrogen-added layer by thermal annealing, performing thermal annealing again to stabilize the adhering interface, and selectively removing the porous silicon layer to give single-crystal silicon layer divided into islands.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: February 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takeshi Fukunaga
  • Publication number: 20140015872
    Abstract: An EL display device capable of performing clear multi-gradation color display and electronic equipment provided with the EL display device are provided, wherein gradation display is performed according to a time-division driving method in which the luminescence and non-luminescence of an EL element (109) disposed in a pixel (104) are controlled by time, and the influence by the characteristic variability of a current controlling TFT (108) is prevented. When this method is used, a data signal side driving circuit (102) and a gate signal side driving circuit (103) are formed with TFTs that use a silicon film having a peculiar crystal structure and exhibit an extremely high operation speed.
    Type: Application
    Filed: September 19, 2013
    Publication date: January 16, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukio YAMAUCHI, Takeshi FUKUNAGA
  • Patent number: 8603870
    Abstract: A semiconductor device having a CMOS structure, wherein, in manufacturing a CMOS circuit, an impurity element which imparts p-type conductivity to the active layer of the p-channel type semiconductor device is added before forming the gate insulating film. Then, by applying thermal oxidation treatment to the active layer, the impurity element is subjected to redistribution, and the concentration of the impurity element in the principal surface of the active layer is minimized. The precise control of threshold voltage is enabled by the impurity element that is present in a trace quantity.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: December 10, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Takeshi Fukunaga
  • Patent number: 8564575
    Abstract: There is disclosed an electrooptical device capable of achieving a large area display by making full use of the size of the substrate. An active matrix substrate acts as a driver portion for the reflection-type electrooptical device. A pixel matrix circuit and logic circuitry are formed on the active matrix substrate. At this time, the logic circuitry is disposed, by making use of a dead space in the pixel matrix circuit. The area occupied by the pixel matrix circuit, or image display region, can be enlarged without being limited by the area occupied by the logic circuitry.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: October 22, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Takeshi Fukunaga
  • Patent number: 8558773
    Abstract: An EL display device capable of performing clear multi-gradation color display and electronic equipment provided with the EL display device are provided, wherein gradation display is performed according to a time-division driving method in which the luminescence and non-luminescence of an EL element (109) disposed in a pixel (104) are controlled by time, and the influence by the characteristic variability of a current controlling TFT (108) is prevented. When this method is used, a data signal side driving circuit (102) and a gate signal side driving circuit (103) are formed with TFTs that use a silicon film having a peculiar crystal structure and exhibit an extremely high operation speed.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: October 15, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukio Yamauchi, Takeshi Fukunaga
  • Patent number: 8482069
    Abstract: An active region, a source region, and a drain region are formed on a single crystal semiconductor substrate or a single crystal semiconductor thin film. Impurity regions called pinning regions are formed in striped form in the active region so as to reach both of the source region and the drain region. Regions interposed between the pinning regions serve as channel forming regions. A tunnel oxide film, a floating gate, a control gate, etc. are formed on the above structure. The impurity regions prevent a depletion layer from expanding from the source region toward the drain region.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: July 9, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Jun Koyama, Takeshi Fukunaga
  • Patent number: 8405594
    Abstract: An EL display device capable of performing clear multi-gradation color display and electronic equipment provided with the EL display device are provided, wherein gradation display is performed according to a time-division driving method in which the luminescence and non-luminescence of an EL element (109) disposed in a pixel (104) are controlled by time, and the influence by the characteristic variability of a current controlling TFT (108) is prevented. When this method is used, a data signal side driving circuit (102) and a gate signal side driving circuit (103) are formed with TFTs that use a silicon film having a peculiar crystal structure and exhibit an extremely high operation speed.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: March 26, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukio Yamauchi, Takeshi Fukunaga
  • Publication number: 20130037884
    Abstract: An active region, a source region, and a drain region are formed on a single crystal semiconductor substrate or a single crystal semiconductor thin film. Impurity regions called pinning regions are formed in striped form in the active region so as to reach both of the source region and the drain region. Regions interposed between the pinning regions serve as channel forming regions. A tunnel oxide film, a floating gate, a control gate, etc. are formed on the above structure. The impurity regions prevent a depletion layer from expanding from the source region toward the drain region.
    Type: Application
    Filed: July 16, 2012
    Publication date: February 14, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hisashi OHTANI, Jun KOYAMA, Takeshi FUKUNAGA
  • Patent number: 8368142
    Abstract: A semiconductor device having performance comparable with a MOSFET is provided. An active layer of the semiconductor device is formed by a crystalline silicon film crystallized by using a metal element for promoting crystallization, and further by carrying out a heat treatment in an atmosphere containing a halogen element to carry out gettering of the metal element. The active layer after this process is constituted by an aggregation of a plurality of needle-shaped or column-shaped crystals. A semiconductor device manufactured by using this crystalline structure has extremely high performance.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: February 5, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Jun Koyama, Takeshi Fukunaga