Patents by Inventor Takeshi Honda

Takeshi Honda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7887705
    Abstract: Improvements on a system for treating residual water, presents a new solution for the conformation of a system for treating residual water and for such purpose, it basically consists of a lower blanket (1), preferably produced in PVC, and of a cover blanket (2), which is also preferably produced in PVC, in any color, which may be double-faced, including, in the present model still features a reactor (3), a deep chamber (4) and an anaerobic pond (5), and such elements may be excavated in the soil (S) or made of stonemasonry or any kind of suitable material for this purpose.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: February 15, 2011
    Assignee: Sansuy S/A Industria De Plasticos
    Inventors: Takeshi Honda, Julia Takako Honda
  • Patent number: 7885095
    Abstract: A magnetic random access memory of the present invention includes: a plurality of first wirings and a plurality of second wirings extending in a first direction; a plurality of third wirings and a plurality of fourth wirings extending in a second direction; and a plurality of memory cells provided at intersections of the plurality of first wirings and the plurality of third wirings, respectively. Each of the plurality of memory cells includes: a first transistor and a second transistor connected in series between one of the plurality of first wirings and one of the plurality of second wirings and controlled in response to a signal on one of the plurality of third wirings, a first magnetic resistance element having one end connected to a write wiring through which the first transistor and the second transistor are connected, and the other end grounded; and a second magnetic resistance element having one end connected to the write wiring, and the other end connected to the fourth wiring.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: February 8, 2011
    Assignee: NEC Corporation
    Inventors: Noboru Sakimura, Takeshi Honda, Tadahiko Sugibayashi
  • Patent number: 7885131
    Abstract: A semiconductor memory device of the present invention comprises a memory array and a read circuit that reads data of a selected cell. The memory array includes a plurality of memory cells and a reference cell each having a memory element that stores data based on change in resistance value. The read circuit includes: a voltage comparison unit that compares a value corresponding to a sense current from the selected cell with a value corresponding to a reference current from the reference cell; a first switch; and a second switch. Both of the first and second switches are provided at a subsequent stage of a decoder and at a preceding stage of the voltage comparison unit. The second switch circuit controls input of the value corresponding to the sense current to the voltage comparison unit, while the first switch circuit controls input of the value corresponding to the reference current to the voltage comparison unit.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: February 8, 2011
    Assignee: NEC Corporation
    Inventors: Noboru Sakimura, Takeshi Honda, Tadahiko Sugibayashi
  • Publication number: 20110003787
    Abstract: The present invention relates to a compound or a pharmacologically acceptable salt thereof having superior glucokinase activating activity, and is a compound represented by general formula (I), or pharmacologically acceptable salt thereof: [wherein, A represents, for example, an oxygen atom or sulfur atom, R1 represents, for example, a C1-C6 alkyl group, a C1-C6 alkoxy group or a C1-C6 halogenated alkyl group, A and R1 together with the carbon atom bonded thereto form a heterocyclic group that may be substituted with 1 to 3 group(s) independently selected from Substituent Group ?, R2 represents a phenyl group that may be substituted with 1 to 5 group(s) independently selected from Substituent Group ? or a heterocyclic group that may be substituted with 1 to 3 group(s) independently selected from Substituent Group ?, R3 represents a hydroxy group or a C1-C6 alkoxy group, and Substituent Group ? consists of, for example, a halogen atom, a C1-C6 alkyl group, a C1-C6 alkyl group substituted with 1 or 2 hyd
    Type: Application
    Filed: July 26, 2010
    Publication date: January 6, 2011
    Inventors: Akihiro Furukawa, Takehiro Fukuzaki, Yukari Onishi, Hideki Kobayashi, Takeshi Honda, Yumi Matsui, Masahiro Konishi, Kenjiro Ueda, Tetsuyoshi Matsufuji
  • Patent number: 7813164
    Abstract: A magneto-resistance element includes a free layer, a fixed layer and a non-magnetic layer interposed between the free layer and the fixed layer. The free layer has a first magnetic layer, a second magnetic layer, a third magnetic layer, a first non-magnetic layer interposed between the first magnetic layer and the second magnetic layer, and a second non-magnetic layer interposed between the second magnetic layer and the third magnetic layer. The first magnetic layer, the second magnetic layer and the third magnetic layer are coupled such that spontaneous magnetizations have a helical structure.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: October 12, 2010
    Assignee: NEC Corporation
    Inventors: Tadahiko Sugibayashi, Takeshi Honda, Noboru Sakimura
  • Patent number: 7773405
    Abstract: A magnetic random access memory includes: a first and second wirings, a plurality of third wirings, a plurality of memory cells and a terminating unit. The first and second wirings extend in a Y direction. The plurality of third wirings extends in an X direction. The memory cell is provided correspondingly to an intersection between the first and second wirings and the third wiring. The terminating unit is provided between the plurality of memory cells and connected to the first and second wirings. The memory cell includes transistors and a magnetoresistive element. The transistors are connected in series between the first and second wirings and controlled based on a signal of the third wiring. The magnetoresistive element is connected to a wiring through which the transistors are connected. At a time of a writing operation, when the write current 1w is supplied from one of the first and second wiring to the other through the transistors, the terminating unit grounds the other.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: August 10, 2010
    Assignee: NEC Corporation
    Inventors: Noboru Sakimura, Takeshi Honda, Tadahiko Sugibayashi
  • Patent number: 7771764
    Abstract: A method for producing an extract and/or a squeezed liquid, which includes: feeding a food to be extracted and/or squeezed into a crushing apparatus; adding a solvent into the crushing apparatus immediately after and/or while milling the food; extracting and/or squeezing a useful food component of the food into the solvent; and carrying out liquid-solid separation by removing the resulting extracted residue and/or squeezed residue with a continuous solid-liquid separation apparatus.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: August 10, 2010
    Assignee: Meiji Dairies Corporation
    Inventors: Takeshi Honda, Takeshi Imazawa, Takamune Tanaka, Takao Tomita, Yasushi Kubota, Naoki Orii, Tadashi Nakatsubo
  • Patent number: 7764552
    Abstract: A semiconductor integrated circuit is provided that can prevent an internal voltage from the voltage generating circuit from varying during a long term. The semiconductor integrated circuit of the present invention includes a voltage generating circuit configured to generate a reference voltage; a function circuit configured to operate by using the reference voltage; a first capacitance connected to a first node between the voltage generating circuit and the function circuit; and a switch provided between the voltage generating circuit and the first node. The switch is in a turned-off state at least for a period during which the function circuit is in an activated state.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: July 27, 2010
    Assignee: NEC Corporation
    Inventors: Takeshi Honda, Noboru Sakimura, Tadahiko Sugibayashi
  • Publication number: 20100177558
    Abstract: An MRAM of a spin transfer type according to the invention is provided with a memory cell 10 and a word driver 30. The memory cell 10 has a magnetic resistance element 1 and a selection transistor TR having one of source/drain electrodes which is connected with one end of the magnetic resistance element 1. The word driver 30 drives a word line WL connected with a gate electrode of the selection transistor TR. The word driver 30 changes a drive voltage of the word line WL according to the write data DW to be written in the magnetic resistance element 1.
    Type: Application
    Filed: July 13, 2007
    Publication date: July 15, 2010
    Applicant: NEC Corporation
    Inventors: Noboru Sakimura, Takeshi Honda, Tadahiko Sugibayashi
  • Publication number: 20100136203
    Abstract: Disclosed is a fermented whey preparation produced by carrying out high-temperature sterilization of an aqueous whey protein solution having a solid content of 11 to 35% by weight and a pH value adjusted to 6.5 to 8.0, then subjecting the aqueous whey protein solution to lactic acid fermentation, and homogenizing the resultant fermentation liquor as such. The fermented whey preparation has a fermentation-derived unique and good flavor and, at the same time, has a refreshed and invigorating flavor and further has a velvety texture. The fermented whey preparation is also excellent in thermal stability and safety.
    Type: Application
    Filed: April 22, 2008
    Publication date: June 3, 2010
    Applicant: MEIJIDAIRIES CORPORATION
    Inventors: Tadashi Sakata, Ayumi Akamatsu, Takeshi Honda
  • Patent number: 7692956
    Abstract: An MRAM is provided with a memory main body (2) having at least one cell array, and a magnetic field detecting section (4) which detects a magnetic field in the vicinity of the memory main body (2) and outputs the detection signal to the memory main body (2). In the cell array, a memory main body (2), which has a plurality of magnetic memory cells including a multilayer ferri-structure as a free layer, stops a prescribed operation of the memory main body (2), based on the detection signal.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: April 6, 2010
    Assignee: NEC Corporation
    Inventors: Tadahiko Sugibayashi, Takeshi Honda, Noboru Sakimura
  • Patent number: 7688617
    Abstract: An operation method of an MRAM of the present invention is an operation method of the MRAM in which a data write operation is carried out in a toggle write.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: March 30, 2010
    Assignee: NEC Corporation
    Inventors: Noboru Sakimura, Takeshi Honda, Tadahiko Sugibayashi
  • Publication number: 20100067292
    Abstract: A semiconductor integrated circuit is provided that can prevent an internal voltage from the voltage generating circuit from varying during a long term. The semiconductor integrated circuit of the present invention includes a voltage generating circuit configured to generate a reference voltage; a function circuit configured to operate by using the reference voltage; a first capacitance connected to a first node between the voltage generating circuit and the function circuit; and a switch provided between the voltage generating circuit and the first node. The switch is in a turned-off state at least for a period during which the function circuit is in an activated state.
    Type: Application
    Filed: November 7, 2006
    Publication date: March 18, 2010
    Inventor: Takeshi Honda
  • Publication number: 20100046284
    Abstract: An MRAM comprises: a plurality of magnetic memory cells each having a magnetoresistive element; and a magnetic field application section. The magnetic field application section applies an offset adjustment magnetic field in a certain direction to the plurality of magnetic memory cells from outside the plurality of magnetic memory cells. Respective data stored in the plurality of magnetic memory cells become the same when the offset adjustment magnetic field is removed.
    Type: Application
    Filed: November 12, 2007
    Publication date: February 25, 2010
    Inventors: Tadahiko Sugibayshi, Takeshi Honda, Noboru Sakimura, Nobuyuki Ishiwata, Shuichi Tahara
  • Publication number: 20100046283
    Abstract: A magnetic random access memory of the present invention includes: a plurality of first wirings and a plurality of second wirings extending in a first direction; a plurality of third wirings and a plurality of fourth wirings extending in a second direction; and a plurality of memory cells provided at intersections of the plurality of first wirings and the plurality of third wirings, respectively. Each of the plurality of memory cells includes: a first transistor and a second transistor connected in series between one of the plurality of first wirings and one of the plurality of second wirings and controlled in response to a signal on one of the plurality of third wirings, a first magnetic resistance element having one end connected to a write wiring through which the first transistor and the second transistor are connected, and the other end grounded; and a second magnetic resistance element having one end connected to the write wiring, and the other end connected to the fourth wiring.
    Type: Application
    Filed: June 1, 2007
    Publication date: February 25, 2010
    Applicant: NEC CORPORATION
    Inventors: Noboru Sakimura, Takeshi Honda, Tadahiko Sugibayashi
  • Patent number: 7646628
    Abstract: A toggle magnetic random access memory includes a first memory array, a second memory array and a controller. The first memory array includes a plurality of first memory cells including magnetoresistive elements. The second memory array includes a plurality of second memory cells including magnetoresistive elements and differs from the first memory array in write wirings used for writing. The controller controls the first memory array and the second memory array such that a first state in which a first burst write operation in the first memory array is executed and a second state in which a second burst write operation in the second memory array is executed are alternately executed in a continuous burst write mode. Accordingly, the continuous burst write operation can be executed at the high speed without any drop in the reliability and any increase in the circuit area.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: January 12, 2010
    Assignee: NEC Corporation
    Inventors: Noboru Sakimura, Takeshi Honda, Tadahiko Sugibayashi
  • Patent number: 7632930
    Abstract: Compounds having the formula (I): wherein A represents a group such as a cyclic group, R1 and R2 represent groups such as alkyl groups or hydroxymethyl groups, and n represents 1 or 2, or pharmacologically acceptable salts thereof or pharmacologically acceptable esters thereof have superior activity and stability, and are useful for the treatment and/or prevention of diabetes mellitus, or the like.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: December 15, 2009
    Assignee: Sankyo Company Limited
    Inventors: Takeshi Honda, Akira Okuno, Masanori Izumi, Xiaoliu Li
  • Patent number: 7630234
    Abstract: An MRAM having a first cell array group (2-0)and a second cell array group (2-1) containing a plurality of cell arrays (21) is used. Each of the first cell array group (2-0) and the second cell array group (2-1) includes a first current source unit for supplying a first write current IWBL to a bit line WBL of the cell array (21) and a first current waveform shaping unit having a first capacitor requiring precharge and shaping the waveform of the first write current IWBL. When the cell array (21) performs write into a magnetic memory (24), the first current waveform shaping unit of the first cell array group (2-0) and the first current waveform shaping unit of the second cell array group (2-1) charges and discharges electric charge accumulated in the first capacitor to wiring toward the bit line WBL at different periods from each other.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventors: Tadahiko Sugibayashi, Takeshi Honda, Noboru Sakimura
  • Publication number: 20090296454
    Abstract: A magnetic memory cell 1 is provided with a magnetic recording layer 10 which is a ferromagnetic layer and a pinned layer 30 connected with the magnetic recording layer 10 through a non-magnetic layer 20. The magnetic recording layer 10 has a magnetization inversion region 13, a first magnetization fixed region 11 and a second magnetization fixed region 12. The magnetization inversion region 13 has a magnetization whose orientation is invertible and overlaps the pinned layer 30. The first magnetization fixed region 11 is connected with a first boundary B1 in the magnetization inversion region 13 and a magnetization orientation is fixed on a first direction. The second magnetization fixed region 12 is connected with a second boundary B2 in magnetization inversion region 13 and a magnetization orientation is fixed on a second direction. The first direction and the second direction are opposite to each other.
    Type: Application
    Filed: September 25, 2007
    Publication date: December 3, 2009
    Inventors: Takeshi Honda, Noboru Sakimura, Tadahiko Sugibayashi, Hideaki Numata, Norikazu Ohshima
  • Patent number: 7611741
    Abstract: A food objective for extraction and/or squeezing is charged into a colloid mill or a twin-screw extruder; immediately after and/or while milling, a low-temperature solvent (for example, water or milk of from ?3 to 50° C.) is added; and after treating the food using the extruder, grounds are removed to produce an extract and/or a squeezed liquid.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: November 3, 2009
    Assignee: Meiji Dairies Corporaiton
    Inventors: Takeshi Honda, Takeshi Imazawa, Yasushi Kubota, Tadashi Nakatsubo