Patents by Inventor Takeshi Imamura

Takeshi Imamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10646094
    Abstract: A novel wipe set and a novel wiping method in which the wipe set is used are provided. With the wipe set comprising a first wipe impregnated with 50 to 200 mg of a sodium hypochlorite aqueous solution per gram of the wipe, a second wipe impregnated with 30 to 110 mg of a sodium thiosulfate aqueous solution per gram of the wipe, and a third wipe impregnated with 4 to 110 mg of a sodium hydroxide aqueous solution per gram of the wipe as well as by the wiping method in which the wipe set of the present invention is used, an anticancer agent spilled on a working table, for example, can be removed effectively.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: May 12, 2020
    Assignees: MS DREAM CO., LTD., NIPRO CORPORATION
    Inventors: Mika Asano, Takeshi Oguro, Tomonori Imamura, Masaru Fujimura
  • Patent number: 10643770
    Abstract: When a steel sheet containing Si: 2-5 mass % after cold rolling is subjected to a primary recrystallization annealing and a finishing annealing for secondary recrystallization to form a grain-oriented electrical steel sheet, the primary recrystallization annealing is performed by rapid heating in the heating process and temperature keeping treatment at a certain temperature in the course of the heating to thereby obtain a grain-oriented electrical steel sheet having plural peaks in a distribution of misorientation angle between crystal orientation of secondary recrystallized grains and Goss orientation, wherein misorientation angle of the second smallest peak among the plural peaks is preferably not less than 5° and a grain size of secondary recrystallized grains is not more than 15 mm.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: May 5, 2020
    Assignee: JFE STEEL CORPORATION
    Inventors: Takeshi Imamura, Yukihiro Shingaki, Ryuichi Suehiro, Toshito Takamiya
  • Patent number: 10636906
    Abstract: A semiconductor device in chip size package includes first and second metal oxide semiconductor transistors both vertical transistors formed in first and second regions obtained by dividing the semiconductor device into halves. The first metal oxide semiconductor transistor includes one or more first gate electrodes and four or more first source electrodes provided in one major surface, each of the first gate electrodes is surrounded, in top view, by the first source electrodes, and for any combination of a first gate electrode and a first source electrode, closest points between the first gate and first source electrodes are on a line inclined to a chip side. The second metal oxide semiconductor transistor includes the same structure as the first metal oxide semiconductor transistor. A conductor that connects the drains of the first and second metal oxide semiconductor transistors is provided in the other major surface of the semiconductor device.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: April 28, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tomonari Ota, Shigetoshi Sota, Eiji Yasuda, Takeshi Imamura, Toshikazu Imai, Ryosuke Okawa, Kazuma Yoshida, Masaaki Hirako, Dohwan Ahn
  • Patent number: 10636885
    Abstract: A semiconductor device includes a first gate electrode, a plurality of first source electrodes, a second gate electrode, and a plurality of second source electrodes. The first gate electrode is arranged with no other electrode between the first gate electrode and a first short side of the semiconductor substrate. The plurality of first source electrodes include a plurality of approximately rectangular first source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate. The second gate electrode is arranged with no other electrode between the second gate electrode and a second short side of the semiconductor substrate. The plurality of second source electrodes include a plurality of approximately rectangular second source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: April 28, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kazuma Yoshida, Takeshi Imamura, Toshikazu Imai, Ryosuke Okawa, Ryou Kato
  • Publication number: 20200111809
    Abstract: According to one embodiment, it includes a stacked body including N-number of layers (N is an integer of 2 or more) stacked on a semiconductor substrate, opening portions penetrating the stacked body in a stacking direction, columnar bodies respectively disposed in the opening portions, and a slit dividing M-number of layers (M is an integer of 1 or more and (N-2) or less) of the stacked body in a horizontal direction from above, wherein the slit is formed with lateral surfaces respectively having a spatial periodicity in a horizontal plane.
    Type: Application
    Filed: December 3, 2019
    Publication date: April 9, 2020
    Applicant: Toshiba Memory Corporation
    Inventors: Genki KAWAGUCHI, Masanari FUJITA, Hideki INOKUMA, Osamu MATSUURA, Takeshi IMAMURA, Hideo WADA, Makoto WATANABE, Hajime KANEKO, Kenichi FUJII, Takanobu ITOH
  • Patent number: 10584406
    Abstract: An electrical steel sheet has a composition including C: less than 0.010 mass %, Si: 1.5˜10 mass % and the balance being Fe and incidental impurities, wherein a main orientation in a texture of a steel sheet is <111>//ND and an intensity ratio relative to randomly oriented specimen of the main orientation is not less than 5 and, preferably an intensity ratio relative to randomly oriented specimen of {111}<112> orientation is not less than 10, an intensity ratio relative to randomly oriented specimen of {310}<001> orientation is not more than 3 and Si concentration has a gradient that it is high at a side of a surface layer and low at a central portion in the thickness direction and a maximum value of the Si concentration is not less than 5.5 mass % and a difference between maximum and minimum values is not less than 0.5 mass %.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: March 10, 2020
    Assignee: JFE Steel Corporation
    Inventors: Takeshi Imamura, Minoru Takashima, Tatsuhiko Hiratani
  • Publication number: 20200072922
    Abstract: According to one embodiment, a magnetic resonance imaging apparatus includes: a cylindrical magnetic pole for generating a static magnetic field in an imaging region; a cylindrical gradient magnetic field coil arranged on a radially inner side of the magnetic pole, coaxially with the magnetic pole to generate a dynamic magnetic field having a linear magnetic field strength in the imaging region; a cylindrical high frequency coil arranged on a radially inner side of the gradient magnetic field coil, coaxially with the magnetic pole and the gradient magnetic field coil to generate a high frequency magnetic field in the imaging region; and a computer system for processing signals to obtain images. The magnetic resonance imaging apparatus further includes at least two loop-shaped additional coils arranged on the radially outer side of the gradient magnetic field coil and having different electric current circulating direction.
    Type: Application
    Filed: April 15, 2019
    Publication date: March 5, 2020
    Applicant: Hitachi, Ltd.
    Inventors: Yukinobu IMAMURA, Akira KUROME, Takeshi YATSUO
  • Publication number: 20200066852
    Abstract: A semiconductor device includes a first gate electrode, a plurality of first source electrodes, a second gate electrode, and a plurality of second source electrodes. The first gate electrode is arranged with no other electrode between the first gate electrode and a first short side of the semiconductor substrate. The plurality of first source electrodes include a plurality of approximately rectangular first source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate. The second gate electrode is arranged with no other electrode between the second gate electrode and a second short side of the semiconductor substrate. The plurality of second source electrodes include a plurality of approximately rectangular second source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate.
    Type: Application
    Filed: October 31, 2019
    Publication date: February 27, 2020
    Inventors: Kazuma YOSHIDA, Takeshi IMAMURA, Toshikazu IMAI, Ryosuke OKAWA, Ryou KATO
  • Publication number: 20200040419
    Abstract: In a grain-oriented electrical steel sheet which is manufactured from a thin slab without using an inhibitor forming component, excellent magnetic properties are stably achieved. In a method for manufacturing a grain-oriented electrical steel sheet, a slab heating and annealing are performed under specific conditions.
    Type: Application
    Filed: February 19, 2018
    Publication date: February 6, 2020
    Applicant: JFE STEEL CORPORATION
    Inventors: Masanori TAKENAKA, Takeshi IMAMURA, Yuiko EHASHI, Hiroi YAMAGUCHI
  • Patent number: 10541251
    Abstract: According to one embodiment, it includes a stacked body including N-number of layers (N is an integer of 2 or more) stacked on a semiconductor substrate, opening portions penetrating the stacked body in a stacking direction, columnar bodies respectively disposed in the opening portions, and a slit dividing M-number of layers (M is an integer of 1 or more and (N?2) or less) of the stacked body in a horizontal direction from above, wherein the slit is formed with lateral surfaces respectively having a spatial periodicity in a horizontal plane.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: January 21, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Genki Kawaguchi, Masanari Fujita, Hideki Inokuma, Osamu Matsuura, Takeshi Imamura, Hideo Wada, Makoto Watanabe, Hajime Kaneko, Kenichi Fujii, Takanobu Itoh
  • Patent number: 10541310
    Abstract: A semiconductor device includes a first gate electrode, a plurality of first source electrodes, a second gate electrode, and a plurality of second source electrodes. The first gate electrode is arranged with no other electrode between the first gate electrode and a first short side of the semiconductor substrate. The plurality of first source electrodes include a plurality of approximately rectangular first source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate. The second gate electrode is arranged with no other electrode between the second gate electrode and a second short side of the semiconductor substrate. The plurality of second source electrodes include a plurality of approximately rectangular second source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: January 21, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kazuma Yoshida, Takeshi Imamura, Toshikazu Imai, Ryosuke Okawa, Ryou Kato
  • Publication number: 20200015770
    Abstract: Disclosed is a technique capable of enhancing usability of a radiographic image capturing apparatus, system, control method of the radiographic image capturing apparatus and a non-transitory computer readable recording medium recorded with a control program, for a user. A radiographic image capturing apparatus includes: an I/F unit and an imaging control unit that function as a communication unit that selectively performs communication with any one of a portable information terminal and a console which are plural control apparatuses that have different image processing capacities with respect to a radiographic image and respectively perform a control relating to capturing of the radiographic image; and an imaging control unit that functions as a selection unit that selects any one of plural imaging modes predetermined with respect to the capturing of the radiographic image according to the image processing capacity of the control apparatus that performs communication with the communication unit.
    Type: Application
    Filed: September 25, 2019
    Publication date: January 16, 2020
    Inventors: Yasufumi ODA, Jun Enomoto, Ryo Imamura, Takashi Tajima, Takeshi Koishi, Kentaro Noma, Takeshi Kuwabara, Tetsuya Tsuji, Hiroaki Yasuda, Harusayu Nakatsugawa
  • Patent number: 10519534
    Abstract: A iron-based amorphous alloy thin strip having a chemical composition represented by a chemical formula of FexBySiz (wherein x is 78-83 at %, y is 8-15 at % and z is 6-13 at %), wherein the number of air pockets at a surface contacting with a cooling roll is not more than 8 pockets/mm2 and an average length in a circumferential direction of the roll is not more than 0.5 mm.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: December 31, 2019
    Assignee: JFE Steel Corporation
    Inventors: Seiji Okabe, Nobuo Shiga, Takeshi Imamura
  • Patent number: 10509562
    Abstract: An electronic device includes a touch sensor that, by operating in a predetermined operation direction, inputs a predetermined instruction to the electronic device, and a frame-like member that is provided so as to surround the touch sensor. A predetermined first processing is carried out on a first region of the frame-like member corresponding to the predetermined operation direction, and second processing, which is different from the first processing, is carried out on a second region, which is a region of the frame-like member other than the first region.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: December 17, 2019
    Assignee: CASIO COMPUTER CO., LTD.
    Inventors: Koji Kachi, Shigeru Hanagata, Keiichi Imamura, Takeshi Okada
  • Patent number: 10485506
    Abstract: Disclosed is a technique capable of enhancing usability of a radiographic image capturing apparatus, system, control method of the radiographic image capturing apparatus and a non-transitory computer readable recording medium recorded with a control program, for a user. A radiographic image capturing apparatus includes: an I/F unit and an imaging control unit that function as a communication unit that selectively performs communication with any one of a portable information terminal and a console which are plural control apparatuses that have different image processing capacities with respect to a radiographic image and respectively perform a control relating to capturing of the radiographic image; and an imaging control unit that functions as a selection unit that selects any one of plural imaging modes predetermined with respect to the capturing of the radiographic image according to the image processing capacity of the control apparatus that performs communication with the communication unit.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: November 26, 2019
    Assignee: FUJIFILM Corporation
    Inventors: Yasufumi Oda, Jun Enomoto, Ryou Imamura, Takashi Tajima, Kentaro Noma, Takeshi Kuwabara, Tetsuya Tsuji, Hiroaki Yasuda, Haruyasu Nakatsugawa, Takeshi Koishi
  • Publication number: 20190348227
    Abstract: A method for manufacturing a capacitor includes a step of forming a case integrated with a terminal unit designed to be connected with an external terminal, and a step of housing a capacitor element in the case so that the terminal unit is electrically connected to the capacitor element. The step of forming the case includes heating a metal mold to a temperature less than or equal to a glass transition temperature of a thermoplastic resin that is a material for the case. The metal mold internally has a mold part that is a hollow part having a shape of the case. And the step of forming the case further includes, after the heating of the metal mold and inserting the terminal unit into the mold part, injecting the thermoplastic resin in a molten state into the mold part of the metal mold.
    Type: Application
    Filed: July 29, 2019
    Publication date: November 14, 2019
    Inventors: TAKESHI IMAMURA, TOSHIHISA MIURA
  • Publication number: 20190323100
    Abstract: Excellent magnetic properties can be stably obtained in grain-oriented electrical steel sheets produced from thin slabs without using inhibitor forming components. Provided is a method for producing a grain-oriented electrical steel sheet comprising: subjecting a molten steel to continuous casting to form a slab with 25 to 100 mm in thickness, the molten steel having a chemical composition containing, in mass %, C: 0.002 to 0.100%, Si: 2.00 to 8.00%, Mn: 0.005 to 1.000%, Al: <0.0100%, N: <0.0050%, S: <0.0050% and Se: <0.0050%, and the balance being Fe and inevitable impurities; heating and then hot rolling the slab to form a hot-rolled steel sheet; wherein the step of heating the slab is performed at 1000 to 1300° C. for 10 to 600 seconds.
    Type: Application
    Filed: November 1, 2017
    Publication date: October 24, 2019
    Applicant: JFE STEEL CORPORATION
    Inventors: Takeshi IMAMURA, Yuiko EHASHI, Masanori TAKENAKA, Hiroi YAMAGUCHI
  • Publication number: 20190316963
    Abstract: An automatic analysis apparatus comprises: a light source generating light having a center wavelength equal to or shorter than 340 nm; a fluorescent substance excited by the light source light, and generates light together with transmitted light from the light source, having a wavelength of 340 nm to 800 nm; a condenser lens; at least one slit; a reaction cell holding a reaction solution where a specimen and reagent are mixed, and that the light source light and the light from the fluorescent substance enter; and a detector that detects light transmitted through the reaction cell. The light source, fluorescent substance, condenser lens, and slit are provided along a straight light corresponding to the optical axis. The width of the slit's opening is equal to or narrower than the width of a ray forming an image of the light source at the position of the slit.
    Type: Application
    Filed: October 24, 2017
    Publication date: October 17, 2019
    Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Takeshi ISHIDA, Isao YAMAZAKI, Sakuichiro ADACHI, Shin IMAMURA
  • Patent number: 10431359
    Abstract: In a method for producing a grain-oriented electrical steel sheet by hot rolling a steel slab comprising C: 0.04-0.12 mass %, Si: 1.5-5.0 mass %, Mn: 0.01-1.0 mass %, sol. Al: 0.010-0.040 mass %, N: 0.004-0.02 mass %, one or two of S and Se: 0.005-0.05 mass % in total of S and Se, cold rolling, and subjecting to primary recrystallization annealing and further to final annealing, a content ratio of sol. Al to N in the steel slab (sol. Al/N) and a final thickness d (mm) satisfy an equation of 4d+1.52?sol. Al/N?4d+2.32, and the steel sheet in the heating process of the final annealing is held at a temperature of 775-875° C. for 40-200 hours and then heated in a temperature region of 875-1050° C. at a heating rate of 10-60° C./hr to preform secondary recrystallization and purification treatment, whereby an extremely-thin grain-oriented electrical steel sheet having a low iron loss and a small deviation in coil is produced.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: October 1, 2019
    Assignee: JFE Steel Corporation
    Inventors: Masanori Uesaka, Minoru Takashima, Takeshi Imamura
  • Publication number: 20190273141
    Abstract: A semiconductor device includes a first gate electrode, a plurality of first source electrodes, a second gate electrode, and a plurality of second source electrodes. The first gate electrode is arranged with no other electrode between the first gate electrode and a first short side of the semiconductor substrate. The plurality of first source electrodes include a plurality of approximately rectangular first source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate. The second gate electrode is arranged with no other electrode between the second gate electrode and a second short side of the semiconductor substrate. The plurality of second source electrodes include a plurality of approximately rectangular second source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate.
    Type: Application
    Filed: May 21, 2019
    Publication date: September 5, 2019
    Inventors: Kazuma YOSHIDA, Takeshi IMAMURA, Toshikazu IMAI, Ryosuke OKAWA, Ryou KATO