Abstract: A semiconductor device includes a first transistor disposed in a first region of a semiconductor layer and a second transistor disposed in a second region of the semiconductor layer, and includes, on the surface of the semiconductor layer, first source pads, a first gate pad, second source pads, and a second gate pad. In the plan view of the semiconductor layer, the first and second transistors are aligned in a first direction; the first gate pad is disposed such that none of the first source pads is disposed between the first gate pad and a side parallel to the first direction and located closest to the first gate pad; and the second gate pad is disposed such that none of the second source pads is disposed between the second gate pad and a side parallel to the first direction and located closest to the second gate pad.

Abstract: A method for manufacturing a capacitor includes a step of forming a case integrated with a terminal unit designed to be connected with an external terminal, and a step of housing a capacitor element in the case so that the terminal unit is electrically connected to the capacitor element. The step of forming the case includes heating a metal mold to a temperature less than or equal to a glass transition temperature of a thermoplastic resin that is a material for the case. The metal mold internally has a mold part that is a hollow part having a shape of the case. And the step of forming the case further includes, after the heating of the metal mold and inserting the terminal unit into the mold part, injecting the thermoplastic resin in a molten state into the mold part of the metal mold.

Abstract: In the production of a grain-oriented electrical steel sheet by hot rolling a slab containing Si: 2.0-8.0 mass % and no inhibitor-forming ingredients, cold rolling, subjecting to a decarburization annealing, applying an annealing separator composed mainly of MgO and containing a Ti compound(s) and subjecting to a finish annealing, an atmosphere in the heating process of the decarburization annealing is rendered into a dry atmosphere having a dew point of not higher than 0° C. and a Ti amount (Ti(a)) and a N amount (N(a)) contained in an iron matrix after the removal of a forsterite coating and a Ti amount (Ti(b)) and a N amount (N(b)) contained in the steel sheet having a forsterite coating are made to satisfy relationships as N(b)?0.0050 mass %, N(b)/N(a)?4, and Ti(b)/Ti(a)?4.

Abstract: A semiconductor device includes a first transistor disposed in a first region of a semiconductor layer and a second transistor disposed in a second region of the semiconductor layer, and includes, on the surface of the semiconductor layer, first source pads, a first gate pad, second source pads, and a second gate pad. In the plan view of the semiconductor layer, the first and second transistors are aligned in a first direction; the first gate pad is disposed such that none of the first source pads is disposed between the first gate pad and a side parallel to the first direction and located closest to the first gate pad; and the second gate pad is disposed such that none of the second source pads is disposed between the second gate pad and a side parallel to the first direction and located closest to the second gate pad.

Abstract: A system for generating an advertisement includes: a memory; and a processor coupled to the memory, the processor configured to execute a process including: obtaining an address of a content related to a product to be advertised, the product being determined by referring to at least one of an operation history of a user terminal operated by a user, an attribute of the user, and activity information of the user; obtaining a still image or a moving image related to the product; generating advertisement data by associating the address with the still image or the moving image; and displaying the advertisement data on the user terminal.

Abstract: A semiconductor device includes a semiconductor substrate including a first conductivity-type impurity, a low-concentration impurity layer including a first conductivity-type impurity having a concentration lower than a concentration of the first conductivity-type impurity in the semiconductor substrate, a backside electrode including a metal material, and first and second transistors in the low-concentration impurity layer. The first transistor includes a first source electrode and a first gate electrode on a surface of the low-concentration impurity layer, the second transistor includes a second source electrode and a second gate electrode on the surface of the low-concentration impurity layer. The semiconductor substrate serves as a common drain region of the transistors.

Abstract: To provide a grain-oriented electrical steel sheet that has better magnetic property than conventional ones, in hot band annealing of the hot rolled steel sheet obtained by a predetermined step, an average heating rate from ordinary temperature to 400° C. is set to 50° C./s or more, and a time to reach 900° C. from 400° C. is set to 100 sec or less.

Abstract: There is provided an amorphous alloy thin strip having a chemical composition represented by a chemical formula: FexBySiz (x: 78-83 at %, y: 8-15 at % and z: 6-13 at %) capable of stably attaining a low iron loss even when shaped into a wound core, wherein a generation density of air pockets on a face contacting with a cooling roll is not more than 8 per 1 mm2 and an arithmetic mean height Sa on portions other than the air pockets is not more than 0.3 ?m.

Abstract: A semiconductor device includes a semiconductor substrate including a first conductivity-type impurity, a low-concentration impurity layer including a first conductivity-type impurity having a concentration lower than a concentration of the first conductivity-type impurity in the semiconductor substrate, a backside electrode including a metal material, and first and second transistors in the low-concentration impurity layer. The first transistor includes a first source electrode and a first gate electrode on a surface of the low-concentration impurity layer, the second transistor includes a second source electrode and a second gate electrode on the surface of the low-concentration impurity layer. The semiconductor substrate serves as a common drain region of the transistors.

Abstract: A semiconductor device includes a semiconductor substrate including a first conductivity-type impurity, a low-concentration impurity layer including a first conductivity-type impurity having a concentration lower than a concentration of the first conductivity-type impurity in the semiconductor substrate, a backside electrode including a metal material, and first and second transistors in the low-concentration impurity layer. The first transistor includes a first source electrode and a first gate electrode on a surface of the low-concentration impurity layer, the second transistor includes a second source electrode and a second gate electrode on the surface of the low-concentration impurity layer. The semiconductor substrate serves as a common drain region of the transistors.

Abstract: A semiconductor device includes a semiconductor substrate including a first conductivity-type impurity, a low-concentration impurity layer including a first conductivity-type impurity having a concentration lower than a concentration of the first conductivity-type impurity in the semiconductor substrate, a backside electrode including a metal material, and first and second transistors in the low-concentration impurity layer. The first transistor includes a first source electrode and a first gate electrode on a surface of the low-concentration impurity layer, the second transistor includes a second source electrode and a second gate electrode on the surface of the low-concentration impurity layer. The semiconductor substrate serves as a common drain region of the transistors.

Abstract: Provided are a grain-oriented electrical steel sheet with low iron loss even when including at least one grain boundary segregation element among Sb, Sn, Mo, Cu, and P, and a method for manufacturing the same. In our method, Pr is controlled to satisfy Pr??0.075T+18, where T>10, 5<Pr, T (hr) is the time required after final annealing to reduce the temperature of a secondary recrystallized sheet from 800° C. to 400° C., and Pr (MPa) is the line tension on the secondary recrystallized sheet during flattening annealing. As a result, a grain-oriented electrical steel sheet in which iron loss is low and a dislocation density near crystal grain boundaries of the steel substrate is 1.0×1013 m?2 or less can be obtained even when the grain-oriented electrical steel sheet contains at least one of Sb, Sn, Mo, Cu, and P.

Abstract: Disclosed is a grain-oriented electrical steel sheet that has excellent high-frequency iron loss properties and blanking workability. The steel sheet includes: steel components including, by mass %, Si: 1.5-8.0%, Mn: 0.02-1.0%, and at least one selected from Sn: 0.010-0.400%, Sb: 0.010-0.400%, Mo: 0.010-0.200%, and P: 0.010-0.200%; and crystal grains including coarse secondary recrystallized grains having an average grain size of 5 mm or more and fine grains having a grain size of 0.1-2.0 mm, wherein at least some of the coarse secondary recrystallized grains penetrate the steel sheet in a thickness direction and are respectively exposed on front and back surfaces of the steel sheet such that projection planes of the exposed surfaces of these coarse secondary recrystallized grains on the front and back surfaces form an overlapping region, and the fine grains are present at a number density per unit area of 0.6-40 pieces/cm2.

Abstract: A semiconductor device includes a first transistor disposed in a first region of a semiconductor layer and a second transistor disposed in a second region of the semiconductor layer, and includes, on the surface of the semiconductor layer, first source pads, a first gate pad, second source pads, and a second gate pad. In the plan view of the semiconductor layer, the first and second transistors are aligned in a first direction; the first gate pad is disposed such that none of the first source pads is disposed between the first gate pad and a side parallel to the first direction and located closest to the first gate pad; and the second gate pad is disposed such that none of the second source pads is disposed between the second gate pad and a side parallel to the first direction and located closest to the second gate pad.

Abstract: A rear bus bar includes a rear electrode connecting part connected to an upper end electrode of a capacitor element, and a rear overlapping part is led out upward from a rear electrode connecting part at a position overlapping with the upper end electrode. A front bus bar includes a front electrode connecting part connected to a lower end electrode of the capacitor element, a first relay part, and a second relay part extending along the upper end electrode, and a front overlapping part is led out upward from the second relay part. An insulation module includes a first insulating part interposed between the front overlapping part and the rear overlapping part, and a second insulating part interposed between the upper end electrode and the second relay part.

Abstract: According to one embodiment, it includes a stacked body including N-number of layers (N is an integer of 2 or more) stacked on a semiconductor substrate, opening portions penetrating the stacked body in a stacking direction, columnar bodies respectively disposed in the opening portions, and a slit dividing M-number of layers (M is an integer of 1 or more and (N?2) or less) of the stacked body in a horizontal direction from above, wherein the slit is formed with lateral surfaces respectively having a spatial periodicity in a horizontal plane.