Abstract: A semiconductor integrated circuit comprising: a clock gating cell to which an enable signal and a clock signal are input, so as to output a gated clock signal generated by output-controlling said clock signal according to said enable signal; a first flip-flop circuit to which a first input data signal and said gated clock signal are input, so as to retain and output said first input data signal as a first output data signal in synchronization with said gated clock signal; and a second flip-flop circuit to which a second input data signal is input, so as to retain and output said second input data signal as a second output data signal in synchronization with said clock signal if the logical values of said second input data signal and said second output data signal differ from each other, or so as to retain said second output data signal if the logical values of said second input data signal and said second output data signal are the same.

Abstract: A method for manufacturing a power module substrate, includes: preparing a ceramics substrate and a metal plate made of pure aluminum; a fusion step in which the ceramics substrate and the metal plate are stacked in layers with a brazing filler metal interposed therebetween, and a fused aluminum layer is formed at an interface between the ceramics substrate and the metal plate by fusing the brazing filler metal which is caused by heating; and a solidifying step in which the fused aluminum layer is solidified by cooling, and a crystal is grown so as to be arranged in a crystal orientation of the metal plate when the fused aluminum layer is solidified.

Abstract: Disclosed is a ceramic substrate including silicon in which the concentration of a silicon oxide and a silicon composite oxide in the surface thereof is less than or equal to 2.7 Atom %.

Abstract: Control of readout of packets from a packet buffer is disclosed in which equal numbers of tokens are removed and used from token buckets having different bucket sizes; tokens are generated at token rates for the token buckets, wherein each token rate is preset such that the larger the token bucket size, the lower the token rate, and the generated tokens are added to the token buckets; a used-token count is measured for each token bucket, and a stored-token count is measured for each token bucket, with the stored-token count given a negative value if each token bucket is empty; and a number of data packets are read out of the packet buffer, which depends on the measured value of the used-token count for each token buffer.

Abstract: A radio communication terminal includes a link-usage level calculating section that calculates usage level of a radio link, and a data reception continuation/suspension determining section that determines continuation of data reception or suspension of data reception according to the level of usage calculated by the link-usage level calculating section. The link-usage level calculating section calculates a current usage level indicating a level of usage of the radio link associated with current data reception in the radio communication terminal. The data reception continuation/suspension determining section determines continuation of data reception when the current usage level is equal to or higher than a reference level of usage being a threshold and determines suspension of data reception when the current usage level is lower than the reference level of usage.

Abstract: Ascochlorin or an analog or derivative thereof and a compound having a primary amino group are mixed and reacted with each other in the presence/absence of a basic catalyst to synthesize a novel imino compound. The novel imino compound thus synthesized is a ligand capable of activating nuclear receptor superfamily such as retinoid orphan receptor (RXR), peroxisome proliferator-activated receptor (PPAR) and steroid receptor (PXR), and shows an effect of promoting the transcription of a drug-metabolizing enzyme CYP7A1. The imino compound has a therapeutic effect on diseases such as lifestyle-related diseases, chronic inflammation and cancers.

Abstract: Disclosed is a power module having improved joint reliability. Specifically disclosed is a power module including a power module substrate wherein a circuit layer is brazed on the front surface of a ceramic substrate, a metal layer is brazed on the rear surface of the ceramic substrate and a semiconductor chip is soldered to the circuit layer. The metal layer is composed of an Al alloy having an average purity of not less than 98.0 wt. % but not more than 99.9 wt. % as a whole. In this metal layer, the Fe concentration in the side of a surface brazed with the ceramic substrate is set at less than 0.1 wt. %, and the Fe concentration in the side of a surface opposite to the brazed surface is set at not less than 0.1 wt. %.

Abstract: A power element mounting substrate including a circuit layer brazed to a surface of a ceramic plate, and a power element soldered to a front surface of the circuit layer, wherein the circuit layer is constituted using an Al alloy with an average purity of more than or equal to 98.0 wt % and less than or equal to 99.9 wt %, Fe concentration of the circuit layer at a side of a surface to be brazed to the ceramic plate is less than 0.1 wt %, and Fe concentration of the circuit layer at a side of the surface opposite to the surface to be brazed is more than or equal to 0.1 wt %.

Abstract: A clock design apparatus includes a delay time adjusting section, a prohibition specifying section and a clock tree synthesis section. The delay time adjusting section is configured to adjust signal delay time of signal propagation paths on a semiconductor integrated circuit to be designed. The prohibition specifying section is configured to specify a part of the signal propagation paths as a circuit prevented from being changed. The clock tree synthesis section is configured to synthesize a clock tree of the semiconductor integrated circuit in accordance with the specification made by the prohibition specifying section.

Abstract: This disclosure concerns a semiconductor circuit design method for designing a clock wiring structure supplying a clock to a flip-flop by using a computer. The semiconductor circuit design method comprises setting the flip-flop based on circuit information on a semiconductor integrated circuit; obtaining a control signal controlling the flip-flop; calculating a first evaluation value indicating a power consumption and a magnitude of a clock skew time when clock gating is applied to the flip-flop; setting a gated clock structure clock-gating the flip-flop when the first evaluation value is higher than a first threshold; calculating a second evaluation value indicating the power consumption and a magnitude of a cell area when a low power flip-flop lower in power consumption than the flip-flop is applied to the flip-flop; and replacing the flip-flop by the lower power flip-flop when the second evaluation value is higher than a second threshold.

Abstract: The present invention has an object to develop novel compounds which are effective for the therapy of syndrome X, cancer, myxedema, vascular chronic inflammation and the like, and furthermore prevent/treat the restenosis caused in an artery expansion by a balloon or a stent and have the activity facilitating regenerative medicine by inhibiting rejection of own cells or tissues to be transplanted and the method for preparing the same. Novel acetal derivatives obtained by acylating the hydroxyl group at the 2-position of the orcylaldehyde which ascochlorin and its analogs have and thereafter bonding an alcohol to the aldehyde group in the presence of a basic catalyst are found to achieve the object.

Abstract: A semiconductor integrated circuit comprising: a clock gating cell to which an enable signal and a clock signal are input, so as to output a gated clock signal generated by output-controlling said clock signal according to said enable signal; a first flip-flop circuit to which a first input data signal and said gated clock signal are input, so as to retain and output said first input data signal as a first output data signal in synchronization with said gated clock signal; and a second flip-flop circuit to which a second input data signal is input, so as to retain and output said second input data signal as a second output data signal in synchronization with said clock signal if the logical values of said second input data signal and said second output data signal differ from each other, or so as to retain said second output data signal if the logical values of said second input data signal and said second output data signal are the same.

Abstract: A radio communication apparatus has a battery, a transmit buffer for temporarily accumulating packets to be sent, a battery state monitoring unit for monitoring a battery state of the battery, and a traffic control unit. The traffic control unit determines a packet burst length and an interval time between the packet bursts in order to obtain charge recovery effect based on the battery state, and controls so as to take out data packets of the packet burst length from the transmit buffer for every interval time between the packet bursts of the packet burst.

Abstract: An automatic circuit design apparatus includes a setting module configured to set an upper limit electric potential of a virtual ground line in a circuit to be designed, by use of a cell library for low-threshold cells, a cell library for high-threshold cells, and information of the circuit to be designed. A layout generator is configured to generate a layout based on the information, the cell library for low-threshold cells, and the cell library for high-threshold cells.

Abstract: The present invention has an object to develop novel compounds which are effective for the therapy of syndrome X, cancer, myxedema, vascular chronic inflammation and the like, and furthermore prevent/treat the restenosis caused in an artery expansion by a balloon or a stent and have the activity facilitating regenerative medicine by inhibiting rejection of own cells or tissues to be transplanted and the method for preparing the same. Novel acetal derivatives obtained by acylating the hydroxyl group at the 2-position of the orcylaldehyde which ascochlorin and its analogs have and thereafter bonding an alcohol to the aldehyde group in the presence of a basic catalyst are found to achieve the object.

Abstract: The invention is directed to a traffic control system. The traffic control system comprises a communication device. The communication device includes a traffic type differentiation unit for differentiating a traffic type of an application that generates traffic to be processed on a communication network, a traffic control execution unit for controlling the traffic according to a traffic control condition corresponding to the traffic type, and a setting change reception unit for receiving setting change information on the traffic type or setting change information on the traffic control condition from the communication network. The traffic control system also comprises a setting change information transmission device provided on the communication network for transmitting setting change information.

Abstract: A clock design apparatus includes a delay time adjusting section, a prohibition specifying section and a clock tree synthesis section. The delay time adjusting section is configured to adjust signal delay time of signal propagation paths on a semiconductor integrated circuit to be designed. The prohibition specifying section is configured to specify a part of the signal propagation paths as a circuit prevented from being changed. The clock tree synthesis section is configured to synthesize a clock tree of the semiconductor integrated circuit in accordance with the specification made by the prohibition specifying section.

Abstract: Ascochlorin or an analog or derivative thereof and a compound having a primary amino group are mixed and reacted with each other in the presence/absence of a basic catalyst to synthesize a novel imino compound. The novel imino compound thus synthesized is a ligand capable of activating nuclear receptor superfamily such as retinoid orphan receptor (RXR), peroxisome proliferator-activated receptor (PPAR) and steroid receptor (PXR), and shows an effect of promoting the transcription of a drug-metabolizing enzyme CYP7A1. The imino compound has a therapeutic effect on diseases such as lifestyle-related diseases, chronic inflammation and cancers.

Abstract: A computer aided design system and a method for clock gated logic circuits, a computer-readable medium for storing the same and a gated clock circuit are provided in which the clock skew is suppressed within a tolerable level without increasing the electric power consumption.

Abstract: A semiconductor integrated circuit includes a logic circuit, a first switching cell connecting a first power supply line with a first virtual power line so as to drive the logic circuit, and a second switching cell connecting a second power supply line with a second virtual power line so as to drive the logic circuit. A time constant defined by the product of resistance and capacitance, which are measured between the first virtual power line and the first power supply line, is held to a constant value.