Patents by Inventor Takeshi Kitatani
Takeshi Kitatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11329450Abstract: A electro-absorption optical modulator includes a multiple quantum well composed of a plurality of layers including a plurality of quantum well layers and a plurality of barrier layers that are alternately stacked, the plurality of quantum well layers and the plurality of barrier layers including an acceptor and a donor; a p-type semiconductor layer in contact with an uppermost layer of the plurality of layers; and an n-type semiconductor layer in contact with a lowermost layer of the plurality of layers, the multiple quantum well being 10% or more and 150% or less of the p-type semiconductor layer in a p-type carrier concentration, and in the multiple quantum well, an effective carrier concentration which corresponds to a difference between the p-type carrier concentration and an n-type carrier concentration is ±10% or less of the p-type carrier concentration of the multiple quantum well.Type: GrantFiled: April 10, 2020Date of Patent: May 10, 2022Assignee: Lumentum Japan, Inc.Inventors: Atsushi Nakamura, Takeshi Kitatani, Kaoru Okamoto, Shigenori Hayakawa
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Publication number: 20210057885Abstract: A electro-absorption optical modulator includes a multiple quantum well composed of a plurality of layers including a plurality of quantum well layers and a plurality of barrier layers that are alternately stacked, the plurality of quantum well layers and the plurality of barrier layers including an acceptor and a donor; a p-type semiconductor layer in contact with an uppermost layer of the plurality of layers; and an n-type semiconductor layer in contact with a lowermost layer of the plurality of layers, the multiple quantum well being 10% or more and 150% or less of the p-type semiconductor layer in a p-type carrier concentration, and in the multiple quantum well, an effective carrier concentration which corresponds to a difference between the p-type carrier concentration and an n-type carrier concentration is ±10% or less of the p-type carrier concentration of the multiple quantum well.Type: ApplicationFiled: April 10, 2020Publication date: February 25, 2021Inventors: Atsushi NAKAMURA, Takeshi KITATANI, Kaoru OKAMOTO, Shigenori HAYAKAWA
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Patent number: 10574033Abstract: In the arrayed semiconductor optical device, a plurality of semiconductor optical devices including a first semiconductor optical device and a second semiconductor optical device are monolithically integrated on a semiconductor substrate, each of the semiconductor optical devices includes a first semiconductor layer having a multiple quantum well layer and a grating layer disposed on an upper side of the first semiconductor layer, a layer thickness of the first semiconductor layer of the first semiconductor optical device is thinner than a layer thickness of the first semiconductor layer of the second semiconductor optical device, and a height of the grating layer of the first semiconductor optical device is lower than a height of the grating layer of the second semiconductor optical device corresponding to difference in the layer thickness of the first semiconductor layer.Type: GrantFiled: July 24, 2019Date of Patent: February 25, 2020Assignee: Lumentum Japan, Inc.Inventors: Takeshi Kitatani, Koichiro Adachi
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Publication number: 20190348818Abstract: In the arrayed semiconductor optical device, a plurality of semiconductor optical devices including a first semiconductor optical device and a second semiconductor optical device are monolithically integrated on a semiconductor substrate, each of the semiconductor optical devices includes a first semiconductor layer having a multiple quantum well layer and a grating layer disposed on an upper side of the first semiconductor layer, a layer thickness of the first semiconductor layer of the first semiconductor optical device is thinner than a layer thickness of the first semiconductor layer of the second semiconductor optical device, and a height of the grating layer of the first semiconductor optical device is lower than a height of the grating layer of the second semiconductor optical device corresponding to difference in the layer thickness of the first semiconductor layer.Type: ApplicationFiled: July 24, 2019Publication date: November 14, 2019Inventors: Takeshi KITATANI, Koichiro ADACHI
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Patent number: 10355454Abstract: Provided is an optical semiconductor device which has long-term reliability since a threshold current is small, and a relaxation oscillation frequency is high. An optical semiconductor device includes an InP semiconductor substrate, a lower mesa structure that is disposed above the InP semiconductor substrate, and includes a multiple quantum well layer, an upper mesa structure that is disposed on the lower mesa structure, and includes a cladding layer, a buried semiconductor layer that buries both side surfaces of the lower mesa structure, and an insulating film that covers both side surfaces of the upper mesa structure by being in contact with both side surfaces of the upper mesa structure, in which the lower mesa structure includes a first semiconductor layer, above the multiple quantum well layer, and the upper mesa structure includes a second semiconductor layer which is different from the cladding layer in composition, below the cladding layer.Type: GrantFiled: September 6, 2017Date of Patent: July 16, 2019Assignee: Oclaro Japan, Inc.Inventors: Kouji Nakahara, Takeshi Kitatani
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Patent number: 10312665Abstract: An optical semiconductor device includes an InP substrate; an active layer disposed above the InP substrate; a n-type semiconductor layer disposed below the active layer; and a p-type clad layer disposed above the active layer, wherein the p-type clad layer includes one or more p-type In1-xAlxP layers, the Al composition x of each of the one or more p-type In1-xAlxP layers is equal to or greater than a value corresponding to the doping concentration of a p-type dopant, and the absolute value of the average strain amount of the whole of the p-type clad layer is equal to or less than the absolute value of a critical strain amount obtained by Matthews' relational expression, using the entire layer thickness of the whole of the p-type clad layer as a critical layer thickness.Type: GrantFiled: June 4, 2018Date of Patent: June 4, 2019Assignee: Oclaro Japan, Inc.Inventors: Takeshi Kitatani, Kaoru Okamoto, Kouji Nakahara
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Publication number: 20180366909Abstract: An optical semiconductor device includes an InP substrate; an active layer disposed above the InP substrate; a n-type semiconductor layer disposed below the active layer; and a p-type clad layer disposed above the active layer, wherein the p-type clad layer includes one or more p-type In1-xAlxP layers, the Al composition x of each of the one or more p-type In1-xAlxP layers is equal to or greater than a value corresponding to the doping concentration of a p-type dopant, and the absolute value of the average strain amount of the whole of the p-type clad layer is equal to or less than the absolute value of a critical strain amount obtained by Matthews' relational expression, using the entire layer thickness of the whole of the p-type clad layer as a critical layer thickness.Type: ApplicationFiled: June 4, 2018Publication date: December 20, 2018Inventors: Takeshi KITATANI, Kaoru OKAMOTO, Kouji NAKAHARA
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Publication number: 20180152005Abstract: In the arrayed semiconductor optical device, a plurality of semiconductor optical devices including a first semiconductor optical device and a second semiconductor optical device are monolithically integrated on a semiconductor substrate, each of the semiconductor optical devices includes a first semiconductor layer having a multiple quantum well layer and a grating layer disposed on an upper side of the first semiconductor layer, a layer thickness of the first semiconductor layer of the first semiconductor optical device is thinner than a layer thickness of the first semiconductor layer of the second semiconductor optical device, and a height of the grating layer of the first semiconductor optical device is lower than a height of the grating layer of the second semiconductor optical device corresponding to difference in the layer thickness of the first semiconductor layer.Type: ApplicationFiled: September 6, 2017Publication date: May 31, 2018Inventors: Takeshi KITATANI, Koichiro ADACHI
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Publication number: 20180090910Abstract: Provided is an optical semiconductor device which has long-term reliability since a threshold current is small, and a relaxation oscillation frequency is high. An optical semiconductor device includes an InP semiconductor substrate, a lower mesa structure that is disposed above the InP semiconductor substrate, and includes a multiple quantum well layer, an upper mesa structure that is disposed on the lower mesa structure, and includes a cladding layer, a buried semiconductor layer that buries both side surfaces of the lower mesa structure, and an insulating film that covers both side surfaces of the upper mesa structure by being in contact with both side surfaces of the upper mesa structure, in which the lower mesa structure includes a first semiconductor layer, above the multiple quantum well layer, and the upper mesa structure includes a second semiconductor layer which is different from the cladding layer in composition, below the cladding layer.Type: ApplicationFiled: September 6, 2017Publication date: March 29, 2018Inventors: Kouji NAKAHARA, Takeshi KITATANI
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Patent number: 9780529Abstract: To provide a semiconductor optical device with device resistance reduced for optical communication. The semiconductor optical device includes an active layer (306) for emitting light through recombination of an electron and a hole; a diffraction grating (309) having a pitch defined in accordance with an output wavelength of the light emitted; a first semiconductor layer (311) including at least Al, made of In and group-V compound, and formed on the diffraction grating; and a second semiconductor layer (307) including Mg, made of In and group-V compound, and formed on the first semiconductor layer (311).Type: GrantFiled: February 17, 2015Date of Patent: October 3, 2017Assignee: OCLARO JAPAN, INC.Inventors: Takeshi Kitatani, Shinji Sasaki
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Publication number: 20150236477Abstract: To provide a semiconductor optical device with device resistance reduced for optical communication. The semiconductor optical device includes an active layer (306) for emitting light through recombination of an electron and a hole; a diffraction grating (309) having a pitch defined in accordance with an output wavelength of the light emitted; a first semiconductor layer (311) including at least Al, made of In and group-V compound, and formed on the diffraction grating; and a second semiconductor layer (307) including Mg, made of In and group-V compound, and formed on the first semiconductor layer (311).Type: ApplicationFiled: February 17, 2015Publication date: August 20, 2015Inventors: Takeshi Kitatani, Shinji Sasaki
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Patent number: 8891570Abstract: In a BH laser which uses InGaAlAs-MQW in an active layer, Al-based semiconductor multi-layer films including an InP buffer layer and an InGaAlAs-MQW layer, and an InGaAsP etching stop layer are formed in a mesa shape, and a p type InP burial layer is buried in side walls of the mesa shape. An air ridge mesa-stripe of a lateral center that is substantially the same as that of the mesa shape is formed on the mesa shape. According to the present structure, a leakage current can be considerably reduced, the light confinement coefficient can be made to be larger than in a BH laser in the related art, and thereby it is possible to implement a semiconductor laser with a low leakage current and a high relaxation oscillation frequency.Type: GrantFiled: February 7, 2013Date of Patent: November 18, 2014Assignee: Oclaro Japan, Inc.Inventors: Kouji Nakahara, Yuki Wakayama, Takeshi Kitatani, Kazunori Shinoda
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Patent number: 8610105Abstract: Provided is a semiconductor electroluminescent device with an InGaAlAs-based well layer having tensile strain, or a semiconductor electroluminescent device with an InGaAsP-based well layer having tensile strain and with an InGaAlAs-based barrier layer which is high-performance and highly reliable in a wide temperature range. In a multiple-quantum well layer of the semiconductor electroluminescent device, a magnitude of interface strain at an interface between the well layer and the barrier layer is smaller than a magnitude of critical interface strain determined by a layer thickness value which is larger one of a thickness of the well layer and a thickness of the barrier layer.Type: GrantFiled: November 9, 2009Date of Patent: December 17, 2013Assignee: Oclaro Japan, Inc.Inventors: Toshihiko Fukamachi, Takashi Shiota, Takeshi Kitatani, Nozomu Yasuhara, Atsushi Nakamura, Mitsuhiro Sawada
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Patent number: 8270446Abstract: High performance and high reliability of a semiconductor laser device having a buried-hetero structure are achieved. The semiconductor laser device having a buried-hetero structure is manufactured by burying both sides of a mesa structure by a Ru-doped InGaP wide-gap layer and subsequently by a Ru-doped InGaP graded layer whose composition is graded from InGaP to InP, and then, by a Ru-doped InP layer. By providing the Ru-doped InGaP graded layer between the Ru-doped InGaP wide-gap layer and the Ru-doped InP layer, the Ru-doped InGaP wide-gap layer and the Ru-doped InP layer not lattice-matching with each other can be formed as a buried layer with excellent crystallinity.Type: GrantFiled: March 5, 2010Date of Patent: September 18, 2012Assignee: Oclaro Japan, Inc.Inventors: Takashi Shiota, Takeshi Kitatani
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Patent number: 8068526Abstract: A purpose is to provide a semiconductor optical device having good characteristics to be formed on a semi-insulating InP substrate. Firstly, a semi-insulating substrate including a Ru—InP layer on a conductive substrate is used. Secondly, a semi-insulating substrate including a Ru—InP layer on a Ru—InP substrate or an Fe—InP substrate is used and semiconductor layers of an n-type semiconductor layer, a quantum-well layer, and a p-type semiconductor layer are stacked in this order.Type: GrantFiled: December 1, 2009Date of Patent: November 29, 2011Assignee: Opnext Japan, Inc.Inventors: Shigeki Makino, Takeshi Kitatani, Tomonobu Tsuchiya
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Publication number: 20100328753Abstract: An integrated semiconductor optical device and an optical module capable of the high-speed and large-capacity optical transmission are provided. In an integrated semiconductor optical device in which a plurality of optical devices buried with semi-insulating semiconductor materials are integrated on the same semiconductor substrate and an optical module using the integrated semiconductor optical device, configurations (material and electrical characteristics) of the buried layers are made different for each of the optical devices.Type: ApplicationFiled: June 24, 2010Publication date: December 30, 2010Inventors: Hiroaki Hayashi, Shigeki Makino, Takeshi Kitatani, Shigehisa Tanaka
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Publication number: 20100288997Abstract: Provided is a semiconductor electroluminescent device with an InGaAlAs-based well layer having tensile strain, or a semiconductor electroluminescent device with an InGaAsP-based well layer having tensile strain and with an InGaAlAs-based barrier layer which is high-performance and highly reliable in a wide temperature range. In a multiple-quantum well layer of the semiconductor electroluminescent device, a magnitude of interface strain at an interface between the well layer and the barrier layer is smaller than a magnitude of critical interface strain determined by a layer thickness value which is larger one of a thickness of the well layer and a thickness of the barrier layer.Type: ApplicationFiled: November 9, 2009Publication date: November 18, 2010Inventors: Toshihiko FUKAMACHI, Takashi Shiota, Takeshi Kitatani, Nozomu Yasuhara, Atsushi Nakamura, Mitsuhiro Sawada
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Publication number: 20100189154Abstract: A purpose is to provide a semiconductor optical device having good characteristics to be formed on a semi-insulating InP substrate. Firstly, a semi-insulating substrate including a Ru—InP layer on a conductive substrate is used. Secondly, a semi-insulating substrate including a Ru—InP layer on a Ru—InP substrate or an Fe—InP substrate is used and semiconductor layers of an n-type semiconductor layer, a quantum-well layer, and a p-type semiconductor layer are stacked in this order.Type: ApplicationFiled: December 1, 2009Publication date: July 29, 2010Inventors: Shigeki Makino, Takeshi Kitatani, Tomonobu Tsuchiya
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Patent number: 7711229Abstract: In the optical integrated devices with ridge waveguide structure based on the conventional technology, there occur such troubles as generation of a recess in a BJ section to easily cause a crystal defect due to the mass transport phenomenon of InP when a butt joint (BJ) is grown, lowering of reliability of the devices, and lowering in a yield in fabrication of devices. In the present invention, a protection layer made of InGaAsP is provided on the BJ section. The layer has high etching selectivity for the InP cladding layer and remains on the BJ section even after mesa etching.Type: GrantFiled: August 23, 2007Date of Patent: May 4, 2010Assignee: Opnext Japan, Inc.Inventors: Takeshi Kitatani, Kazunori Shinoda, Takashi Shiota, Shigeki Makino, Toshihiko Fukamachi
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Patent number: 7636378Abstract: In an edge emitting laser having a window region with a ridge-waveguide structure, particularly, in a short cavity type of a laser operated with a low current, there has been a problem of its operating current being increased due to current leakage of the window portion. To solve this problem, in the window region, between an n-type substrate and a p-type cladding layer, a semi-insulating semiconductor layer into which Ru is doped is inserted. Alternatively, a stacked structure of a Ru-doped layer and a Fe-doped layer is introduced.Type: GrantFiled: February 8, 2008Date of Patent: December 22, 2009Assignee: Opnext Japan, Inc.Inventors: Takeshi Kitatani, Kazunori Shinoda, Koichiro Adachi, Masahiro Aoki