Patents by Inventor Takeshi Kitatani

Takeshi Kitatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11329450
    Abstract: A electro-absorption optical modulator includes a multiple quantum well composed of a plurality of layers including a plurality of quantum well layers and a plurality of barrier layers that are alternately stacked, the plurality of quantum well layers and the plurality of barrier layers including an acceptor and a donor; a p-type semiconductor layer in contact with an uppermost layer of the plurality of layers; and an n-type semiconductor layer in contact with a lowermost layer of the plurality of layers, the multiple quantum well being 10% or more and 150% or less of the p-type semiconductor layer in a p-type carrier concentration, and in the multiple quantum well, an effective carrier concentration which corresponds to a difference between the p-type carrier concentration and an n-type carrier concentration is ±10% or less of the p-type carrier concentration of the multiple quantum well.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: May 10, 2022
    Assignee: Lumentum Japan, Inc.
    Inventors: Atsushi Nakamura, Takeshi Kitatani, Kaoru Okamoto, Shigenori Hayakawa
  • Publication number: 20210057885
    Abstract: A electro-absorption optical modulator includes a multiple quantum well composed of a plurality of layers including a plurality of quantum well layers and a plurality of barrier layers that are alternately stacked, the plurality of quantum well layers and the plurality of barrier layers including an acceptor and a donor; a p-type semiconductor layer in contact with an uppermost layer of the plurality of layers; and an n-type semiconductor layer in contact with a lowermost layer of the plurality of layers, the multiple quantum well being 10% or more and 150% or less of the p-type semiconductor layer in a p-type carrier concentration, and in the multiple quantum well, an effective carrier concentration which corresponds to a difference between the p-type carrier concentration and an n-type carrier concentration is ±10% or less of the p-type carrier concentration of the multiple quantum well.
    Type: Application
    Filed: April 10, 2020
    Publication date: February 25, 2021
    Inventors: Atsushi NAKAMURA, Takeshi KITATANI, Kaoru OKAMOTO, Shigenori HAYAKAWA
  • Patent number: 10574033
    Abstract: In the arrayed semiconductor optical device, a plurality of semiconductor optical devices including a first semiconductor optical device and a second semiconductor optical device are monolithically integrated on a semiconductor substrate, each of the semiconductor optical devices includes a first semiconductor layer having a multiple quantum well layer and a grating layer disposed on an upper side of the first semiconductor layer, a layer thickness of the first semiconductor layer of the first semiconductor optical device is thinner than a layer thickness of the first semiconductor layer of the second semiconductor optical device, and a height of the grating layer of the first semiconductor optical device is lower than a height of the grating layer of the second semiconductor optical device corresponding to difference in the layer thickness of the first semiconductor layer.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: February 25, 2020
    Assignee: Lumentum Japan, Inc.
    Inventors: Takeshi Kitatani, Koichiro Adachi
  • Publication number: 20190348818
    Abstract: In the arrayed semiconductor optical device, a plurality of semiconductor optical devices including a first semiconductor optical device and a second semiconductor optical device are monolithically integrated on a semiconductor substrate, each of the semiconductor optical devices includes a first semiconductor layer having a multiple quantum well layer and a grating layer disposed on an upper side of the first semiconductor layer, a layer thickness of the first semiconductor layer of the first semiconductor optical device is thinner than a layer thickness of the first semiconductor layer of the second semiconductor optical device, and a height of the grating layer of the first semiconductor optical device is lower than a height of the grating layer of the second semiconductor optical device corresponding to difference in the layer thickness of the first semiconductor layer.
    Type: Application
    Filed: July 24, 2019
    Publication date: November 14, 2019
    Inventors: Takeshi KITATANI, Koichiro ADACHI
  • Patent number: 10355454
    Abstract: Provided is an optical semiconductor device which has long-term reliability since a threshold current is small, and a relaxation oscillation frequency is high. An optical semiconductor device includes an InP semiconductor substrate, a lower mesa structure that is disposed above the InP semiconductor substrate, and includes a multiple quantum well layer, an upper mesa structure that is disposed on the lower mesa structure, and includes a cladding layer, a buried semiconductor layer that buries both side surfaces of the lower mesa structure, and an insulating film that covers both side surfaces of the upper mesa structure by being in contact with both side surfaces of the upper mesa structure, in which the lower mesa structure includes a first semiconductor layer, above the multiple quantum well layer, and the upper mesa structure includes a second semiconductor layer which is different from the cladding layer in composition, below the cladding layer.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: July 16, 2019
    Assignee: Oclaro Japan, Inc.
    Inventors: Kouji Nakahara, Takeshi Kitatani
  • Patent number: 10312665
    Abstract: An optical semiconductor device includes an InP substrate; an active layer disposed above the InP substrate; a n-type semiconductor layer disposed below the active layer; and a p-type clad layer disposed above the active layer, wherein the p-type clad layer includes one or more p-type In1-xAlxP layers, the Al composition x of each of the one or more p-type In1-xAlxP layers is equal to or greater than a value corresponding to the doping concentration of a p-type dopant, and the absolute value of the average strain amount of the whole of the p-type clad layer is equal to or less than the absolute value of a critical strain amount obtained by Matthews' relational expression, using the entire layer thickness of the whole of the p-type clad layer as a critical layer thickness.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: June 4, 2019
    Assignee: Oclaro Japan, Inc.
    Inventors: Takeshi Kitatani, Kaoru Okamoto, Kouji Nakahara
  • Publication number: 20180366909
    Abstract: An optical semiconductor device includes an InP substrate; an active layer disposed above the InP substrate; a n-type semiconductor layer disposed below the active layer; and a p-type clad layer disposed above the active layer, wherein the p-type clad layer includes one or more p-type In1-xAlxP layers, the Al composition x of each of the one or more p-type In1-xAlxP layers is equal to or greater than a value corresponding to the doping concentration of a p-type dopant, and the absolute value of the average strain amount of the whole of the p-type clad layer is equal to or less than the absolute value of a critical strain amount obtained by Matthews' relational expression, using the entire layer thickness of the whole of the p-type clad layer as a critical layer thickness.
    Type: Application
    Filed: June 4, 2018
    Publication date: December 20, 2018
    Inventors: Takeshi KITATANI, Kaoru OKAMOTO, Kouji NAKAHARA
  • Publication number: 20180152005
    Abstract: In the arrayed semiconductor optical device, a plurality of semiconductor optical devices including a first semiconductor optical device and a second semiconductor optical device are monolithically integrated on a semiconductor substrate, each of the semiconductor optical devices includes a first semiconductor layer having a multiple quantum well layer and a grating layer disposed on an upper side of the first semiconductor layer, a layer thickness of the first semiconductor layer of the first semiconductor optical device is thinner than a layer thickness of the first semiconductor layer of the second semiconductor optical device, and a height of the grating layer of the first semiconductor optical device is lower than a height of the grating layer of the second semiconductor optical device corresponding to difference in the layer thickness of the first semiconductor layer.
    Type: Application
    Filed: September 6, 2017
    Publication date: May 31, 2018
    Inventors: Takeshi KITATANI, Koichiro ADACHI
  • Publication number: 20180090910
    Abstract: Provided is an optical semiconductor device which has long-term reliability since a threshold current is small, and a relaxation oscillation frequency is high. An optical semiconductor device includes an InP semiconductor substrate, a lower mesa structure that is disposed above the InP semiconductor substrate, and includes a multiple quantum well layer, an upper mesa structure that is disposed on the lower mesa structure, and includes a cladding layer, a buried semiconductor layer that buries both side surfaces of the lower mesa structure, and an insulating film that covers both side surfaces of the upper mesa structure by being in contact with both side surfaces of the upper mesa structure, in which the lower mesa structure includes a first semiconductor layer, above the multiple quantum well layer, and the upper mesa structure includes a second semiconductor layer which is different from the cladding layer in composition, below the cladding layer.
    Type: Application
    Filed: September 6, 2017
    Publication date: March 29, 2018
    Inventors: Kouji NAKAHARA, Takeshi KITATANI
  • Patent number: 9780529
    Abstract: To provide a semiconductor optical device with device resistance reduced for optical communication. The semiconductor optical device includes an active layer (306) for emitting light through recombination of an electron and a hole; a diffraction grating (309) having a pitch defined in accordance with an output wavelength of the light emitted; a first semiconductor layer (311) including at least Al, made of In and group-V compound, and formed on the diffraction grating; and a second semiconductor layer (307) including Mg, made of In and group-V compound, and formed on the first semiconductor layer (311).
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: October 3, 2017
    Assignee: OCLARO JAPAN, INC.
    Inventors: Takeshi Kitatani, Shinji Sasaki
  • Publication number: 20150236477
    Abstract: To provide a semiconductor optical device with device resistance reduced for optical communication. The semiconductor optical device includes an active layer (306) for emitting light through recombination of an electron and a hole; a diffraction grating (309) having a pitch defined in accordance with an output wavelength of the light emitted; a first semiconductor layer (311) including at least Al, made of In and group-V compound, and formed on the diffraction grating; and a second semiconductor layer (307) including Mg, made of In and group-V compound, and formed on the first semiconductor layer (311).
    Type: Application
    Filed: February 17, 2015
    Publication date: August 20, 2015
    Inventors: Takeshi Kitatani, Shinji Sasaki
  • Patent number: 8891570
    Abstract: In a BH laser which uses InGaAlAs-MQW in an active layer, Al-based semiconductor multi-layer films including an InP buffer layer and an InGaAlAs-MQW layer, and an InGaAsP etching stop layer are formed in a mesa shape, and a p type InP burial layer is buried in side walls of the mesa shape. An air ridge mesa-stripe of a lateral center that is substantially the same as that of the mesa shape is formed on the mesa shape. According to the present structure, a leakage current can be considerably reduced, the light confinement coefficient can be made to be larger than in a BH laser in the related art, and thereby it is possible to implement a semiconductor laser with a low leakage current and a high relaxation oscillation frequency.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: November 18, 2014
    Assignee: Oclaro Japan, Inc.
    Inventors: Kouji Nakahara, Yuki Wakayama, Takeshi Kitatani, Kazunori Shinoda
  • Patent number: 8610105
    Abstract: Provided is a semiconductor electroluminescent device with an InGaAlAs-based well layer having tensile strain, or a semiconductor electroluminescent device with an InGaAsP-based well layer having tensile strain and with an InGaAlAs-based barrier layer which is high-performance and highly reliable in a wide temperature range. In a multiple-quantum well layer of the semiconductor electroluminescent device, a magnitude of interface strain at an interface between the well layer and the barrier layer is smaller than a magnitude of critical interface strain determined by a layer thickness value which is larger one of a thickness of the well layer and a thickness of the barrier layer.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: December 17, 2013
    Assignee: Oclaro Japan, Inc.
    Inventors: Toshihiko Fukamachi, Takashi Shiota, Takeshi Kitatani, Nozomu Yasuhara, Atsushi Nakamura, Mitsuhiro Sawada
  • Patent number: 8270446
    Abstract: High performance and high reliability of a semiconductor laser device having a buried-hetero structure are achieved. The semiconductor laser device having a buried-hetero structure is manufactured by burying both sides of a mesa structure by a Ru-doped InGaP wide-gap layer and subsequently by a Ru-doped InGaP graded layer whose composition is graded from InGaP to InP, and then, by a Ru-doped InP layer. By providing the Ru-doped InGaP graded layer between the Ru-doped InGaP wide-gap layer and the Ru-doped InP layer, the Ru-doped InGaP wide-gap layer and the Ru-doped InP layer not lattice-matching with each other can be formed as a buried layer with excellent crystallinity.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: September 18, 2012
    Assignee: Oclaro Japan, Inc.
    Inventors: Takashi Shiota, Takeshi Kitatani
  • Patent number: 8068526
    Abstract: A purpose is to provide a semiconductor optical device having good characteristics to be formed on a semi-insulating InP substrate. Firstly, a semi-insulating substrate including a Ru—InP layer on a conductive substrate is used. Secondly, a semi-insulating substrate including a Ru—InP layer on a Ru—InP substrate or an Fe—InP substrate is used and semiconductor layers of an n-type semiconductor layer, a quantum-well layer, and a p-type semiconductor layer are stacked in this order.
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: November 29, 2011
    Assignee: Opnext Japan, Inc.
    Inventors: Shigeki Makino, Takeshi Kitatani, Tomonobu Tsuchiya
  • Publication number: 20100328753
    Abstract: An integrated semiconductor optical device and an optical module capable of the high-speed and large-capacity optical transmission are provided. In an integrated semiconductor optical device in which a plurality of optical devices buried with semi-insulating semiconductor materials are integrated on the same semiconductor substrate and an optical module using the integrated semiconductor optical device, configurations (material and electrical characteristics) of the buried layers are made different for each of the optical devices.
    Type: Application
    Filed: June 24, 2010
    Publication date: December 30, 2010
    Inventors: Hiroaki Hayashi, Shigeki Makino, Takeshi Kitatani, Shigehisa Tanaka
  • Publication number: 20100288997
    Abstract: Provided is a semiconductor electroluminescent device with an InGaAlAs-based well layer having tensile strain, or a semiconductor electroluminescent device with an InGaAsP-based well layer having tensile strain and with an InGaAlAs-based barrier layer which is high-performance and highly reliable in a wide temperature range. In a multiple-quantum well layer of the semiconductor electroluminescent device, a magnitude of interface strain at an interface between the well layer and the barrier layer is smaller than a magnitude of critical interface strain determined by a layer thickness value which is larger one of a thickness of the well layer and a thickness of the barrier layer.
    Type: Application
    Filed: November 9, 2009
    Publication date: November 18, 2010
    Inventors: Toshihiko FUKAMACHI, Takashi Shiota, Takeshi Kitatani, Nozomu Yasuhara, Atsushi Nakamura, Mitsuhiro Sawada
  • Publication number: 20100189154
    Abstract: A purpose is to provide a semiconductor optical device having good characteristics to be formed on a semi-insulating InP substrate. Firstly, a semi-insulating substrate including a Ru—InP layer on a conductive substrate is used. Secondly, a semi-insulating substrate including a Ru—InP layer on a Ru—InP substrate or an Fe—InP substrate is used and semiconductor layers of an n-type semiconductor layer, a quantum-well layer, and a p-type semiconductor layer are stacked in this order.
    Type: Application
    Filed: December 1, 2009
    Publication date: July 29, 2010
    Inventors: Shigeki Makino, Takeshi Kitatani, Tomonobu Tsuchiya
  • Patent number: 7711229
    Abstract: In the optical integrated devices with ridge waveguide structure based on the conventional technology, there occur such troubles as generation of a recess in a BJ section to easily cause a crystal defect due to the mass transport phenomenon of InP when a butt joint (BJ) is grown, lowering of reliability of the devices, and lowering in a yield in fabrication of devices. In the present invention, a protection layer made of InGaAsP is provided on the BJ section. The layer has high etching selectivity for the InP cladding layer and remains on the BJ section even after mesa etching.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: May 4, 2010
    Assignee: Opnext Japan, Inc.
    Inventors: Takeshi Kitatani, Kazunori Shinoda, Takashi Shiota, Shigeki Makino, Toshihiko Fukamachi
  • Patent number: 7636378
    Abstract: In an edge emitting laser having a window region with a ridge-waveguide structure, particularly, in a short cavity type of a laser operated with a low current, there has been a problem of its operating current being increased due to current leakage of the window portion. To solve this problem, in the window region, between an n-type substrate and a p-type cladding layer, a semi-insulating semiconductor layer into which Ru is doped is inserted. Alternatively, a stacked structure of a Ru-doped layer and a Fe-doped layer is introduced.
    Type: Grant
    Filed: February 8, 2008
    Date of Patent: December 22, 2009
    Assignee: Opnext Japan, Inc.
    Inventors: Takeshi Kitatani, Kazunori Shinoda, Koichiro Adachi, Masahiro Aoki