Patents by Inventor Takeshi Nakano
Takeshi Nakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240094923Abstract: A controller assigns a first plurality of blocks among a plurality of blocks provided in a non-volatile memory to a first area, assigns a second plurality of blocks to a second area, and assigns a third plurality of blocks to a third area. The controller uses each block assigned to the first area in a first mode, uses each block assigned to the second area in a second mode in which the number of bits of data written in each memory cell is larger than that in the first mode, and uses each block assigned to the third area in the first mode or the second mode. The controller writes data received from a host device to an area that corresponds to a designation from the host device out of the first area and the third area. The controller transcribes valid data written to the first area and the third area to the second area.Type: ApplicationFiled: January 31, 2023Publication date: March 21, 2024Applicant: Kioxia CorporationInventors: Takashi WAKUTSU, Yasuaki NAKAZATO, Takeshi NAKANO
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Patent number: 11935998Abstract: A battery device comprises a nonaqueous electrolyte secondary battery provided with an electric power generating element and a pressing member which presses the electric power generating element in the stacking direction. The electric power generating element comprises: a positive electrode with a positive electrode active material layer of a positive electrode active material on the surface of a positive electrode collector; a negative electrode with a negative electrode active material layer of a negative electrode active material on the surface of a negative electrode collector; and a separator which holds an electrolyte solution. This battery device satisfies (1) 0.1<(T1?T2)/T1×100<5, where T1 is the thickness of the thickest portion of the electric power generating element in the stacking direction, and T2 is the thickness of the thinnest portion of the of the electric power generating element in the stacking direction.Type: GrantFiled: May 22, 2019Date of Patent: March 19, 2024Assignee: Nissan Motor Co., Ltd.Inventors: Takamasa Nakagawa, Takeshi Nakano, Hiroyuki Tanaka, Yusuke Nakashima, Naofumi Shoji
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Publication number: 20240061620Abstract: A memory system includes a non-volatile memory and a controller that includes a first memory and is configured to write log data to the first memory, including a history of commands for controlling the memory system. An information processing system includes the memory system and an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value. The expected value and the transmitted value are determined based on the log data of the memory system.Type: ApplicationFiled: November 3, 2023Publication date: February 22, 2024Inventors: Takeshi NAKANO, Akihiko ISHIHARA, Shingo TANIMOTO, Yasuaki NAKAZATO, Shinji MAEDA, Minoru UCHIDA, Kenji SAKAUE, Koichi INOUE, Yosuke KINO, Takumi SASAKI, Mikio TAKASUGI, Kouji SAITOU, Hironori NAGAI, Shinya TAKEDA, Akihito TOUHATA, Masaru OGAWA, Akira AOKI
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Patent number: 11869597Abstract: A semiconductor storage device in an embodiment includes a plurality of planes each including a memory cell array, a voltage generation circuit configured to apply a first intermediate voltage to an adjacent word line adjacent to a selected word line in a former half of a program period and apply a second intermediate voltage higher than the first intermediate voltage to the adjacent word line in a latter half of the program period, a discharge circuit configured to feed a discharge current from the selected word line in a period corresponding to a period in which the second intermediate voltage is applied to the adjacent word line, and a control circuit configured to set a discharge characteristic of the discharge circuit according to a number of the planes.Type: GrantFiled: September 1, 2021Date of Patent: January 9, 2024Assignee: Kioxia CorporationInventors: Takeshi Nakano, Yuzuru Shibazaki, Hideyuki Kataoka, Junichi Sato, Hiroki Date
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Patent number: 11853599Abstract: A memory system includes a non-volatile memory and a controller that includes a first memory and is configured to write log data to the first memory, including a history of commands for controlling the memory system. An information processing system includes the memory system and an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value. The expected value and the transmitted value are determined based on the log data of the memory system.Type: GrantFiled: February 25, 2021Date of Patent: December 26, 2023Assignee: Kioxia CorporationInventors: Takeshi Nakano, Akihiko Ishihara, Shingo Tanimoto, Yasuaki Nakazato, Shinji Maeda, Minoru Uchida, Kenji Sakaue, Koichi Inoue, Yosuke Kino, Takumi Sasaki, Mikio Takasugi, Kouji Saitou, Hironori Nagai, Shinya Takeda, Akihito Touhata, Masaru Ogawa, Akira Aoki
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Patent number: 11724341Abstract: A lead-free solder alloy includes 2.0% by mass or more and 4.0% by mass or less of Ag, 0.3% by mass or more and 0.7% by mass or less of Cu, 1.2% by mass or more and 2.0% by mass or less of Bi, 0.5% by mass or more and 2.1% by mass or less of In, 3.0% by mass or more and 4.0% by mass or less of Sb, 0.001% by mass or more and 0.05% by mass or less of Ni, 0.001% by mass or more and 0.01% by mass or less of Co, and the balance being Sn.Type: GrantFiled: September 16, 2020Date of Patent: August 15, 2023Assignee: TAMURA CORPORATIONInventors: Yurika Munekawa, Takeshi Nakano, Masaya Arai, Takanori Shimazaki, Tsukasa Katsuyama
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Publication number: 20230244020Abstract: The multilayer structure used to be deformed by bending with a first member outside, includes the first member, a first adhesive layer, a second member having one surface joined to one surface of the first member at least via the first adhesive layer, a second adhesive layer, and a first structure having one surface joined to the other surface of the second member at least via the second adhesive layer. The first structure includes a third member on a surface in contact with the second adhesive layer, including, on a surface in contact with the second adhesive layer, a layer that is likely to be broken when deformed. Hardness of each of the first and second adhesive layer is determined such that when the multilayer structure is deformed, the extension of the layer likely to be broken is reduced to a value lower than the tensile breaking extension thereof.Type: ApplicationFiled: October 5, 2020Publication date: August 3, 2023Inventors: Takanobu YANO, Shou TAKARADA, Takeshi NAKANO, Koji SHITARA, Yoshitaka SUGITA, Kazutaka MINOURA
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Patent number: 11691226Abstract: A lead-free solder alloy includes 2.0% by mass or more and 4.0% by mass or less of Ag, 0.3% by mass or more and 0.7% by mass or less of Cu, 1.2% by mass or more and 2.0% by mass or less of Bi, 0.5% by mass or more and 2.1% by mass or less of In, 3.0% by mass or more and 4.0% by mass or less of Sb, 0.001% by mass or more and 0.05% by mass or less of Ni, 0.001% by mass or more and 0.01% by mass or less of Co, and the balance being Sn.Type: GrantFiled: September 16, 2020Date of Patent: July 4, 2023Assignee: TAMURA CORPORATIONInventors: Yurika Munekawa, Takeshi Nakano, Masaya Arai, Takanori Shimazaki, Tsukasa Katsuyama
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Patent number: 11674206Abstract: There is provided a sintered friction material for railway vehicles that has excellent frictional properties and wear resistance even in a high speed range of 280 km/hour or more. The sintered friction material for railway vehicles is a green compact sintered material containing, in mass %, Cu: 50.0 to 75.0%, graphite: 5.0 to 15.0%, one or more selected from the group consisting of magnesia, zircon sand, silica, zirconia, mullite, and silicon nitride: 1.5 to 15.0%, one or more selected from the group consisting of W and Mo: 3.0 to 30.0%, and one or more selected from the group consisting of ferrochromium, ferrotungsten, ferromolybdenum, and stainless steel: 2.0 to 20.0%, with the balance being impurities.Type: GrantFiled: November 30, 2017Date of Patent: June 13, 2023Assignees: NIPPON STEEL CORPORATION, FINE SINTER CO., LTD.Inventors: Manabu Kubota, Kazutaka Asabe, Yuki Ichikawa, Takeshi Nakano, Tokitake Okahira, Isao Shimazoe
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Publication number: 20230166363Abstract: A solder alloy includes 1.1% by mass or more and 8% by mass or less of Cu; 6% by mass or more and 20% by mass or less of Sb; 0.01% by mass or more and 0.5% by mass or less of Ni; and 0.001% by mass or more and 1% by mass or less of Co; a balance being Sn. An amount of Cu (% by mass) and an amount of Ni (% by mass) satisfies following formula: the amount of Ni/(the amount of Cu+the amount of Ni)<0.10.Type: ApplicationFiled: September 9, 2022Publication date: June 1, 2023Applicant: TAMURA CORPORATIONInventors: Shouichirou NARUSE, Takeshi NAKANO, Isao SAKAMOTO, Toshiaki SHIMADA, Koichi OKUBO
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Patent number: 11664502Abstract: To provide an electrode for a non-aqueous electrolyte secondary battery which retains the shape while retaining a discharge capacity at a high rate. An electrode for a non-aqueous electrolyte secondary battery has a current collector and an electrode active material layer arranged on a surface of the current collector, and is used for a non-aqueous electrolyte secondary battery having a liquid volume coefficient of 1.4 to 2.0, in which the electrode active material layer includes an electrode active material and a binder including polyvinylidene fluoride (PVdF), and the polyvinylidene fluoride (PVdF) is in a non-crystallized state and is included in the range of 0.5 to 3.3% by volume with respect to the total volume of the electrode in the electrode active material layer.Type: GrantFiled: October 10, 2018Date of Patent: May 30, 2023Assignee: NISSAN MOTOR CO., LTD.Inventors: Takeshi Nakano, Hiroyuki Tanaka, Takamasa Nakagawa, Sota Shibahara, Kenichiro Enoki, Yoshihiro Ikeda, Naoki Maeo, Shogo Isomura
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Publication number: 20230058847Abstract: An object of the present invention is to provide enhancers useful in enhancing the transcription activity of promoters. (i) A polynucleotide comprising a sequence of at least 20 consecutive nucleotides in the region of nucleotides 201 to 300 in SEQ ID NO: 1; or (ii) a polynucleotide that consists of a nucleotide sequence having at least 90% sequence identify to that of the polynucleotide (i), and has an effect to enhance promoter transcription activity, is used as an enhancer.Type: ApplicationFiled: January 7, 2021Publication date: February 23, 2023Applicants: KANEKA CORPORATION, RIKENInventors: Noriko ISHIKAWA, Masakazu KASHIHARA, Toshihiko KOMARI, Takeshi NAKANO
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Patent number: 11578775Abstract: There is provided a brake lining for a railway vehicle that can reduce brake squeal in braking. A brake lining for a railway vehicle is used for a disc brake system of a railway vehicle. This brake lining includes a base plate, a sintered friction material, and a friction material supporting mechanism. The friction material supporting mechanism is disposed between the base plate and the sintered friction material and supports the sintered friction material in such a manner that the sintered friction material can move with respect to the base plate. The sintered friction material has a Young's modulus of 35.0 GPa or more.Type: GrantFiled: December 14, 2018Date of Patent: February 14, 2023Assignees: NIPPON STEEL CORPORATION, FINE SINTER CO., LTD.Inventors: Takahiro Fujimoto, Manabu Kubota, Takanori Kato, Atsushi Sakaguchi, Naruo Miyabe, Takeshi Nakano, Tokitake Okahira, Isao Shimazoe
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Patent number: 11534829Abstract: A sintered friction material is formed by pressure sintering mixed powder at 800° C. or above, the mixed powder consisting of, in mass %, Cu and/or Cu alloy: 40.0 to 80.0%, Ni: 0% or more and less than 5.0%, Sn: 0 to 10.0%, Zn: 0 to 10.0%, VC: 0.5 to 5.0%, Fe and/or Fe alloy: 2.0 to 40.0%, lubricant: 5.0 to 30.0%, metal oxide and/or metal nitride: 1.5 to 30.0%, and the balance being impurity.Type: GrantFiled: April 7, 2017Date of Patent: December 27, 2022Assignees: NIPPON STEEL CORPORATION, FINE SINTER CO., LTD.Inventors: Manabu Kubota, Naomitsu Mizui, Fumio Ishimoto, Kazutaka Asabe, Osamu Kanda, Satoru Nakano, Takeshi Nakano, Kazumichi Kawasaki, Isao Shimazoe
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Publication number: 20220375517Abstract: A semiconductor storage device includes: a first memory cell and a second memory cell that are adjacent to each other and connected to each other in series; a first word line connected to the first memory cell; a second word line connected to the second memory cell; and a control circuit. The control circuit is configured to, in a first read operation to read a first bit stored in the first memory cell, apply a first voltage to the first word line, and then, apply a first read voltage lower than the first voltage, to the first word line, and apply a second voltage to the second word line, and then, apply a third voltage lower than the second voltage and higher than the first voltage, to the second word line. The third voltage is applied to the second word line after the first read voltage is applied to the first word line.Type: ApplicationFiled: August 5, 2022Publication date: November 24, 2022Applicant: Kioxia CorporationInventors: Hiroki DATE, Takeshi NAKANO
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Patent number: 11492520Abstract: A reinforcing film comprises a pressure sensitive adhesive layer laminated and fixed on a principal surface of a film substrate. The pressure sensitive adhesive layer is formed of a photocurable composition containing a photocurable agent and a base polymer having a crosslinked structure. A frictional force of the pressure sensitive adhesive layer measured with a frictional force microscope at a frequency of 5 Hz is preferably 2 to 5 times a frictional force at a frequency of 0.1 Hz. After photocuring of the pressure sensitive adhesive layer, a frictional force of a photocured pressure sensitive adhesive layer measured with the frictional force microscope at a frequency of 5 Hz is preferably not less than 5 times a frictional force measured at a frequency of 0.1 Hz.Type: GrantFiled: September 18, 2018Date of Patent: November 8, 2022Assignee: NITTO DENKO CORPORATIONInventors: Takeshi Nakano, Keiji Hayashi, Souya Jo, Shogo Sasaki, Kenichi Kataoka
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Publication number: 20220301630Abstract: A semiconductor storage device in an embodiment includes a plurality of planes each including a memory cell array, a voltage generation circuit configured to apply a first intermediate voltage to an adjacent word line adjacent to a selected word line in a former half of a program period and apply a second intermediate voltage higher than the first intermediate voltage to the adjacent word line in a latter half of the program period, a discharge circuit configured to feed a discharge current from the selected word line in a period corresponding to a period in which the second intermediate voltage is applied to the adjacent word line, and a control circuit configured to set a discharge characteristic of the discharge circuit according to a number of the planes.Type: ApplicationFiled: September 1, 2021Publication date: September 22, 2022Applicant: Kioxia CorporationInventors: Takeshi NAKANO, Yuzuru SHIBAZAKI, Hideyuki KATAOKA, Junichi SATO, Hiroki DATE
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Patent number: 11450383Abstract: A semiconductor storage device includes: a first memory cell and a second memory cell that are adjacent to each other and connected to each other in series; a first word line connected to the first memory cell; a second word line connected to the second memory cell; and a control circuit. The control circuit is configured to, in a first read operation to read a first bit stored in the first memory cell, apply a first voltage to the first word line, and then, apply a first read voltage lower than the first voltage, to the first word line, and apply a second voltage to the second word line, and then, apply a third voltage lower than the second voltage and higher than the first voltage, to the second word line. The third voltage is applied to the second word line after the first read voltage is applied to the first word line.Type: GrantFiled: February 24, 2021Date of Patent: September 20, 2022Assignee: KIOXIA CORPORATIONInventors: Hiroki Date, Takeshi Nakano
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Patent number: 11434964Abstract: This brake lining includes: a plurality of friction members which are arranged to be spaced from each other, each of the friction members having a front surface that is to face a sliding surface of a brake disk; a back board fastened to a back surface of each of the friction members; a base plate that supports each of the friction members at a region including a center portion of each friction member; and an elastic member disposed between the base plate and the back board, on a back surface side of each friction member. Two friction members that are adjacent to each other are taken as a pair, and the back board is fastened to each of the pairs of friction members. In each pair of friction members, the two friction members are arranged along the circumferential direction of the brake disk.Type: GrantFiled: December 21, 2016Date of Patent: September 6, 2022Assignees: NIPPON STEEL CORPORATION, FINE SINTER CO., LTD.Inventors: Takahiro Fujimoto, Atsushi Sakaguchi, Kazutaka Asabe, Kazumichi Kawasaki, Takeshi Nakano, Tokitake Okahira, Yasushi Karino, Hajime Takami
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Patent number: RE49175Abstract: According to one embodiment, a semiconductor device includes a first voltage generator, a second voltage generator, a first MOS transistor, and a controller. The first voltage generator outputs a first voltage to a first node. The second voltage generator outputs a second voltage to a second node. The first MOS transistor is capable of short-circuiting the first node and second node. The controller performs a control operation to short-circuit the first node and second node by turning on the first MOS transistor. The controller controls a period in which the first MOS transistor is kept in an on state based on time.Type: GrantFiled: July 20, 2018Date of Patent: August 16, 2022Assignee: Kioxia CorporationInventors: Takeshi Nakano, Mikio Ogawa