Patents by Inventor Takeshi Ooshita

Takeshi Ooshita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7112989
    Abstract: In a transmission signal correction circuit, a first output circuit outputs a data string to outside. A second output circuit for correction is connected in parallel with the first output circuit. The second output circuit receives the data string to add the data string to an output signal of the first output circuit during a period when a control signal is kept generated. A data string detection circuit generates the control signal when detecting a signal sequence, in the data string, that affects a transmission waveform.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: September 26, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Takeshi Ooshita, Katsushi Asahina, Takuji Komeda
  • Publication number: 20050068060
    Abstract: In a transmission signal correction circuit, a first output circuit outputs a data string to outside. A second output circuit for correction is connected in parallel with the first output circuit. The second output circuit receives the data string to add the data string to an output signal of the first output circuit during a period when a control signal is kept generated. A data string detection circuit generates the control signal when detecting a signal sequence, in the data string, that affects a transmission waveform.
    Type: Application
    Filed: August 6, 2004
    Publication date: March 31, 2005
    Inventors: Takeshi Ooshita, Katsushi Asahina, Takuji Komeda
  • Patent number: 6815979
    Abstract: An impedance control circuit includes a reference voltage output circuit for outputting one of a plurality of reference voltages; a variable resistor; a comparator and a control circuit. The comparator includes a first input terminal supplied with a reference voltage from the reference voltage output circuit and a second input terminal connected to the variable resistor, and compares the voltages at the first and second input terminals. The control circuit controls the variable resistor and establishes a plurality of impedances corresponding to the reference voltages in response to the signal output from the comparator. It enables the single impedance control circuit to control the plurality of different impedances on the semiconductor integrated circuit.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: November 9, 2004
    Assignee: Renesas Technology Corp.
    Inventor: Takeshi Ooshita
  • Publication number: 20040000926
    Abstract: An impedance control circuit includes a reference voltage output circuit for outputting one of a plurality of reference voltages; a variable resistor; a comparator and a control circuit. The comparator includes a first input terminal supplied with a reference voltage from the reference voltage output circuit and a second input terminal connected to the variable resistor, and compares the voltages at the first and second input terminals. The control circuit controls the variable resistor and establishes a plurality of impedances corresponding to the reference voltages in response to the signal output from the comparator. It enables the single impedance control circuit to control the plurality of different impedances on the semiconductor integrated circuit.
    Type: Application
    Filed: December 20, 2002
    Publication date: January 1, 2004
    Inventor: Takeshi Ooshita