Patents by Inventor Takeshi Yaguchi

Takeshi Yaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10352280
    Abstract: This blow-by gas recirculation device for an internal combustion engine of a vehicle is provided with a vacuum pump which supplies negative pressure to a brake booster. The blow-by gas recirculation device includes: a fresh-air introduction passage for introducing a fresh air into a crankcase from an intake passage upstream of a throttle valve; a PCV device for recirculating, to the intake passage downstream of the throttle valve, blow-by gas in the crankcase; and a suction/recirculation means which uses the vacuum pump to suck the blow-by gas from inside the crankcase, in a region where the blow-by gas ventilation quantity by the PCV device is insufficient, and recirculate the blow-by gas to the intake passage, while the fresh air is being introduced from the fresh-air introduction passage. As a result, the blow-by gas concentration in the crankcase is reduced, engine oil contact opportunities are reduced, and oil deterioration is inhibited.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: July 16, 2019
    Assignee: Toyota Jidosha kabushiki Kaisha
    Inventors: Hiroshi Yaguchi, Takeshi Fukui
  • Patent number: 9342425
    Abstract: In order to efficiently test a plurality of types of devices under test, provided is a test apparatus that tests a device under test, comprising one or more test modules that each include a plurality of testing sections testing the device under test by exchanging signals with the device under test; and a plurality of control apparatuses that control operation of the testing sections. In each of the one or more test modules, the plurality of testing sections are each allocated to one of the plurality of control apparatuses, and each of the control apparatuses is capable of executing a test program managed by a different user, and controls operation of the testing sections allocated thereto.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: May 17, 2016
    Assignee: ADVANTEST CORPORATION
    Inventors: Takeshi Yaguchi, Hajime Sugimura, Takahiro Nakajima, Toshiaki Adachi
  • Patent number: 9223670
    Abstract: A test apparatus that tests a device under test, comprising a control apparatus sequentially executing a plurality of test programs and controlling testing of the device under test; and a test module controlled by the control apparatus to test the device under test by communicating with the device under test and to transmit a test result of each test program to the control apparatus. The test module includes memories that store the test results of the test programs, and starts a subsequent test such that at least a portion of a result processing time period of a current test, from when a test result stored in a first memory begins being transmitted to the control apparatus to when processing of the test result by the control apparatus ends, overlaps with at least a portion of a test execution period in which the subsequent test is executed using a second memory.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: December 29, 2015
    Assignee: ADVANTEST CORPORATION
    Inventors: Hajime Sugimura, Takeshi Yaguchi, Takahiro Nakajima
  • Patent number: 9201750
    Abstract: Provided is a test apparatus that tests a device under test, comprising a test module that communicates with the device under test to test the device under test; and a control apparatus that executes a plurality of test programs, causes the test module to perform tests corresponding respectively to the test programs, receives test results from the test module, and performs predetermined result processes on the test results. The control apparatus stores an execution order of the test programs, and executes at least a portion of the result processes in an order indicated by the stored execution order.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: December 1, 2015
    Assignee: ADVANTEST CORPORATION
    Inventors: Hajime Sugimura, Takeshi Yaguchi, Takahiro Nakajima
  • Patent number: 8547125
    Abstract: Provided is a test apparatus for testing at least one device under test, including: a test module that includes a plurality of test sections, the plurality of test sections testing the device under test by exchanging signals with the device under test; and a plurality of test control sections that control the plurality of test sections, where the test module includes the plurality of test sections; a setting storage section that stores setting as to which of the plurality of test control sections should be associated with each of the plurality of test sections; and an interface section that is connected to the plurality of test sections, provides an access request issued from one of the plurality of test control sections and directed to the test module, to a test section associated with the test control section, and is able to set, independently for each of the plurality of test sections, which of the plurality of test control sections should control the test section.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: October 1, 2013
    Assignee: Advantest Corporation
    Inventors: Tadashi Morita, Tetsuya Koishi, Takeshi Yaguchi
  • Publication number: 20130231885
    Abstract: In order to shorten testing time, provided is a test apparatus that tests a device under test, comprising one or more test modules that each include a plurality of testing sections testing the device under test by exchanging signals with the device under test; and a control apparatus that controls operation of the testing sections. The control apparatus executes in parallel a plurality of test programs for testing the device under test, to control in parallel the operation of the testing sections assigned respectively to the test programs, and the testing sections test the device under test by exchanging signals in parallel with the device under test.
    Type: Application
    Filed: March 27, 2012
    Publication date: September 5, 2013
    Applicant: ADVANTEST CORPORATION
    Inventors: Hajime SUGIMURA, Takeshi YAGUCHI, Takahiro NAKAJIMA
  • Publication number: 20130231888
    Abstract: Provided is a test apparatus that tests a device under test, comprising a test module that communicates with the device under test to test the device under test; and a control apparatus that executes a plurality of test programs, causes the test module to perform tests corresponding respectively to the test programs, receives test results from the test module, and performs predetermined result processes on the test results. The control apparatus stores an execution order of the test programs, and executes at least a portion of the result processes in an order indicated by the stored execution order.
    Type: Application
    Filed: March 27, 2012
    Publication date: September 5, 2013
    Applicant: ADVANTEST CORPORATION
    Inventors: Hajime SUGIMURA, Takeshi YAGUCHI, Takahiro NAKAJIMA
  • Publication number: 20130231886
    Abstract: In order to efficiently test a plurality of types of devices under test, provided is a test apparatus that tests a device under test, comprising one or more test modules that each include a plurality of testing sections testing the device under test by exchanging signals with the device under test; and a plurality of control apparatuses that control operation of the testing sections. In each of the one or more test modules, the plurality of testing sections are each allocated to one of the plurality of control apparatuses, and each of the control apparatuses is capable of executing a test program managed by a different user, and controls operation of the testing sections allocated thereto.
    Type: Application
    Filed: March 27, 2012
    Publication date: September 5, 2013
    Applicant: ADVANTEST CORPORATION
    Inventors: Takeshi YAGUCHI, Hajime SUGIMURA, Takahiro NAKAJIMA, Toshiaki ADACHI
  • Publication number: 20130231887
    Abstract: A test apparatus that tests a device under test, comprising a control apparatus sequentially executing a plurality of test programs and controlling testing of the device under test; and a test module controlled by the control apparatus to test the device under test by communicating with the device under test and to transmit a test result of each test program to the control apparatus. The test module includes memories that store the test results of the test programs, and starts a subsequent test such that at least a portion of a result processing time period of a current test, from when a test result stored in a first memory begins being transmitted to the control apparatus to when processing of the test result by the control apparatus ends, overlaps with at least a portion of a test execution period in which the subsequent test is executed using a second memory.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 5, 2013
    Applicant: ADVANTEST CORPORATION
    Inventors: Hajime SUGIMURA, Takeshi YAGUCHI, Takahiro NAKAJIMA
  • Patent number: 8258802
    Abstract: Provided is a test apparatus for testing a device under test, including: a plurality of test modules that exchange signals with the device under test; a bus to which the plurality of test modules are connected; and a test control section that controls the plurality of test modules via the bus, where each of the plurality of test modules includes: a test section that exchanges signals with the device under test, and a module control section that controls the test section, and the module control section of each test module exchanges signals with the module control section of another test module, via the bus.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: September 4, 2012
    Assignee: Advantest Corporation
    Inventors: Takeshi Yaguchi, Mamoru Hiraide
  • Patent number: 8258803
    Abstract: Provided is a test apparatus and a test method related to the test apparatus for testing a device under test, including: a plurality of test modules that exchange a signal with the device under test; a test control section that outputs a group read instruction for collectively reading data stored in two or more of the test modules; and a control interface section that reads the data from the two or more test modules according to the group read instruction, and collectively sends the read data to the test control section.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: September 4, 2012
    Assignee: Advantest Corporation
    Inventors: Mamoru Hiraide, Takeshi Yaguchi
  • Publication number: 20110181309
    Abstract: Provided is a test apparatus for testing at least one device under test, including: a test module that includes a plurality of test sections, the plurality of test sections testing the device under test by exchanging signals with the device under test; and a plurality of test control sections that control the plurality of test sections, where the test module includes the plurality of test sections; a setting storage section that stores setting as to which of the plurality of test control sections should be associated with each of the plurality of test sections; and an interface section that is connected to the plurality of test sections, provides an access request issued from one of the plurality of test control sections and directed to the test module, to a test section associated with the test control section, and is able to set, independently for each of the plurality of test sections, which of the plurality of test control sections should control the test section.
    Type: Application
    Filed: January 26, 2010
    Publication date: July 28, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Tadashi MORITA, Tetsuya KOISHI, Takeshi YAGUCHI
  • Publication number: 20110181311
    Abstract: Provided is a test apparatus and a test method related to the test apparatus for testing a device under test, including: a plurality of test modules that exchange a signal with the device under test; a test control section that outputs a group read instruction for collectively reading data stored in two or more of the test modules; and a control interface section that reads the data from the two or more test modules according to the group read instruction, and collectively sends the read data to the test control section.
    Type: Application
    Filed: January 26, 2010
    Publication date: July 28, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Mamoru HIRAIDE, Takeshi YAGUCHI
  • Publication number: 20110181310
    Abstract: Provided is a test apparatus for testing a device under test, including: a plurality of test modules that exchange signals with the device under test; a bus to which the plurality of test modules are connected; and a test control section that controls the plurality of test modules via the bus, where each of the plurality of test modules includes: a test section that exchanges signals with the device under test, and a module control section that controls the test section, and the module control section of each test module exchanges signals with the module control section of another test module, via the bus.
    Type: Application
    Filed: January 26, 2010
    Publication date: July 28, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Takeshi YAGUCHI, Mamoru HIRAIDE
  • Publication number: 20060212252
    Abstract: A test apparatus for testing an electric device includes a plurality of signal input-output units for inputting and/or outputting test signals in response to each of a plurality of terminals included by the electric device, a channel selection memory for storing pieces of channel selection information indicating whether each of the signal input-output units should perform setting based on a setting condition or not, a setting condition memory for storing the setting condition with regard to the signal input-output unit, and a controlling means for retrieving and supplying the setting condition stored in the setting condition memory and the channel selection information stored in the channel selection memory to the signal input-output units based on a setting instruction, when receiving the setting instruction to set the setting condition of the signal input-output unit, wherein when at least one of the signal input-output units is selected by the channel selection information supplied from the controlling mea
    Type: Application
    Filed: May 2, 2006
    Publication date: September 21, 2006
    Applicant: Advantest Corporation
    Inventor: Takeshi Yaguchi
  • Patent number: 7107172
    Abstract: A test apparatus for testing an electric device includes a plurality of signal input-output units for inputting and/or outputting test signals in response to each of a plurality of terminals included by the electric device, a channel selection memory for storing pieces of channel selection information indicating whether each of the signal input-output units should perform setting based on a setting condition or not, a setting condition memory for storing the setting condition with regard to the signal input-output unit, and a controlling means for retrieving and supplying the setting condition stored in the setting condition memory and the channel selection information stored in the channel selection memory to the signal input-output units based on a setting instruction, when receiving the setting instruction to set the setting condition of the signal input-output unit, wherein when at least one of the signal input-output units is selected by the channel selection information supplied from the controlling mea
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: September 12, 2006
    Assignee: Advantest Corporation
    Inventor: Takeshi Yaguchi
  • Publication number: 20040220763
    Abstract: A test apparatus for testing an electric device includes a plurality of signal input-output units for inputting and/or outputting test signals in response to each of a plurality of terminals included by the electric device, a channel selection memory for storing pieces of channel selection information indicating whether each of the signal input-output units should perform setting based on a setting condition or not, a setting condition memory for storing the setting condition with regard to the signal input-output unit, and a controlling means for retrieving and supplying the setting condition stored in the setting condition memory and the channel selection information stored in the channel selection memory to the signal input-output units based on a setting instruction, when receiving the setting instruction to set the setting condition of the signal input-output unit, wherein when at least one of the signal input-output units is selected by the channel selection information supplied from the controlling mea
    Type: Application
    Filed: June 1, 2004
    Publication date: November 4, 2004
    Inventor: Takeshi Yaguchi