Abstract: A control unit includes a touch panel display capable of presenting preview display of multiple pages of document images in a scrollable manner on the display panel. The touch panel display controller includes: a commanded position detecting controller that detects a commanded position relative to one of document images being a reference in the preview image displayed on a display panel; a preview layout direction switching controller that switches the layout direction in the preview image in accordance with the commanded position; and a scroll direction switching controller that switches the scrolling direction in the preview image in accordance with the detected commanded position.

Abstract: A battery protection circuit for protecting a secondary battery, the battery protection circuit not having a CPU, includes a non-volatile memory into which characteristics data determining protective characteristics of the battery protection circuit are writable; and a protection operation circuit which performs a protection operation of the secondary battery based on the characteristics data read out of the non-volatile memory.

Abstract: A control unit includes a touch panel display capable of presenting preview display of multiple pages of document images in a scrollable manner on the display panel. The touch panel display controller includes: a commanded position detecting controller that detects a commanded position relative to one of document images being a reference in the preview image displayed on a display panel; a preview layout direction switching controller that switches the layout direction in the preview image in accordance with the commanded position; and a scroll direction switching controller that switches the scrolling direction in the preview image in accordance with the detected commanded position.

Abstract: According to one embodiment, a semiconductor circuit includes a plurality of memories. The memories are connected to one another in series such that an output node of the memory of the first stage is connected to an input node of the memory of the second stage. The semiconductor circuit includes a test circuit that outputs test data to an input node of the memory of the first stage among the plurality of memories, and a comparison circuit that compares data output from an output node of the memory of the final stage among the plurality of memories with expectation value data.

Abstract: The present invention provides a needle tip protector of a novel structure for an indwelling needle, which enables improvements in safety, etc. as compared with conventional needle tip protectors. A needle tip protector 10 for an indwelling needle includes a tubular peripheral wall 58, and is externally attached over a needle hub 22 of an indwelling needle 16 and moved toward a needle tip 14 side so as to cover the needle tip 14. Detents 74, 74, which are to be detained with the needle hub 22 at a position in a movement of the protector toward the needle tip 14 side of the indwelling needle 16 so as to inhibit backward movement of the protector to the proximal end side of the indwelling needle 16 and to prevent the needle tip 14 from being reexposed, are formed within an inside enclosed by the peripheral wall 58, and are integrally molded with the peripheral wall 58.

Abstract: Provided are a printer, a non-transitory computer-readable storage medium and a scanner-profile creation method. In a printer including a print engine, a scanner and a color measurement device, or a printing system including a printer, a scanner and a color measurement device, a controller creates a scanner profile by using RGB values and color measurement values obtained by measuring a first color chart with the scanner and color measurement device, and determines a first color gamut and a second color gamut of the printer by using one or both of RGB values and color measurement values obtained by measuring the first color chart and a second color chart, respectively, where the second color chart includes at least color patches in specific colors representing a color gamut of the printer. The controller further corrects the scanner profile by comparing the first color gamut and the second color gamut.

Abstract: A strain quantity obtaining unit is provided that obtains a strain quantity at an interval faster than variation in the strain to be detected and stores the maximum value of the strain quantity. When a touch coordinate is obtained at a predetermined sampling interval, if the maximum value of the strain quantity when the touch coordinate is obtained does not exceed a strain quantity threshold value, the touch coordinate is not caused to be effective. However, if the maximum value of the strain quantity when the touch coordinate is obtained exceeds a strain quantity threshold value, the touch coordinate is caused to be effective. If a touch coordinate is caused to be effective once, the touch coordinate is caused to be effective continuously until an instructing object is separated from an operation surface of a touch panel unit at a predetermined distance or more in a perpendicular direction.

Abstract: A near-infrared cut filter glass includes: P, Al, R (R represents any one or more of Li, Na, and K), R? (R? represents any one or more of Mg, Ca, Sr, Ba, and Zn), and Cu, and not including F practically, wherein (Cu+ amount/total Cu amount)×100[%] is 0.01 to 7.0%. The filter glass may further include, by mol %, 0 to 10% B2O3. The filter glass may have a fracture toughness value of the near-infrared cut filter glass is 0.3 MPa·m1/2 or more. For the filter glass, a quotient obtained by dividing an absorption constant at a wavelength of 430 nm by an absorption constant at a wavelength of 800 nm, of the near-infrared cut filter glass, may be 0.00001 to 0.19.

Abstract: An image processing apparatus includes: a reader that reads a paper sheet with a background plate serving as a background; and a hardware processor, wherein the hardware processor: obtains, from the reader, a first color value in which an image on one side of the paper sheet is read, a second color value in which a ground color of the other side of the paper sheet is read, and a third color value in which a portion corresponding to the image on the other side of the paper sheet is read; and estimates a thickness of the paper sheet on the basis of the first to third color values while referring to a predetermined table.

Abstract: A semiconductor memory device according to an embodiment comprises: a semiconductor substrate extending in a first direction and a second direction, the first and second directions intersecting each other; a first wiring line disposed above the semiconductor substrate and extending in the first direction; a second wiring line disposed above the semiconductor substrate and extending in a third direction, the third direction intersecting the first direction and the second direction; a variable resistance film disposed at an intersection of the first wiring line and the second wiring line; a first insulating film disposed aligned with the second wiring line in the first direction; a first film disposed between the first wiring line and the first insulating film; and a second film disposed between the first insulating film and the first film and configured from a material different from that of the first film.

Abstract: A semiconductor integrated circuit includes a first circuit, a second circuit, a memory circuit having a plurality of flip-flops, a storage unit, a signal generating unit to produce an operation mode setting signal, a control circuit configured to cause the memory circuit to operate such that the plurality of flip-flops holds a value for setting characteristics of the first circuit when the operation mode setting signal indicates a first operation mode, and configured to cause the memory circuit to operate as a counter to measure a time length used in the second circuit when the operation mode setting signal indicates a second operation mode, and a setting circuit configured to cause trimming data stored in the storage unit to set the characteristic of the first circuit when the operation mode setting signal indicates the second operation mode, the trimming data corresponding to the value held by the memory circuit.

Abstract: A semiconductor device according to an embodiment includes: a stacked body including a plurality of first conductive films stacked via an inter-layer insulating film; a first conductive body contacting the stacked body to extend in a stacking direction; and a plurality of first insulating films in the same layers as the first conductive films and disposed between the first conductive body and the first conductive films, the first conductive body including a projecting part that projects along tops of one of the first insulating films and one of the first conductive films, and a side surface of the projecting part contacting an upper surface of the one of the first conductive films.

Abstract: According to one embodiment, a memory device includes a stacked body. The stacked body includes first and second electrodes, and an oxide layer provided between the first and second electrodes. The second electrode includes a semiconductor layer, and a metal-containing region including at least one of first or second metallic element and being provided between at least a portion of the semiconductor layer and at least a portion of the oxide layer. The first metallic element includes at least one selected from Pt, Pd, Ir, Ru, Re, and Os. The second metallic element includes at least one selected Ti, W, Mo, and Ta. The stacked body has first and second states. The first state is obtained by causing a current to flow in the stacked body from the second toward first electrode. The second state is obtained by causing a current to flow from the first toward second electrode.

Abstract: A semiconductor device includes: a semiconductor base body where a second semiconductor layer is stacked on a first semiconductor layer, a trench is formed on a surface of the second semiconductor layer, and a third semiconductor layer which is formed of an epitaxial layer is formed in the inside of the trench; a first electrode; an interlayer insulation film which has a predetermined opening; and a second electrode, wherein metal is filled in the opening, the opening is disposed at a position avoiding a center portion of the third semiconductor layer, the second electrode is connected to the third semiconductor layer through the metal, and a surface of the center portion of the third semiconductor layer is covered by the interlayer insulation film.

Abstract: A power semiconductor device according to the present invention has a super junction structure, and includes a low-resistance semiconductor layer, an n?-type column region, p?-type column regions, a base region, trenches, gate insulation films, gate electrodes, source regions, interlayer insulation films, contact holes, metal plugs, p+-type diffusion regions, a source electrode and a gate pad electrode. An active element part includes an n?-type column region between a predetermined p?-type column region disposed closest to a gate pad part and a predetermined n?-type column region disposed closest to the gate pad part among the n?-type column regions which are in contact with the trenches. The present invention provides a power semiconductor device which can satisfy a demand for reduction in cost and downsizing of electronic equipment, can lower ON resistance while maintaining a high withstand voltage, and can possess a large breakdown resistance.

Abstract: A color conversion apparatus includes a hardware processor that obtains a scanner profile created on the basis of measured RGB values and corresponding measured colorimetric values of patches in a first color chart, and creates a table including correction amounts of RGB values, each according to the level of flare estimated for a patch and each associated with an RGB-value difference and a patch-size difference, on the basis of RGB values of patches in the first color chart and RGB values of patches in a specific chart. The specific chart is created by using a part of the patches in the first color chart with the RGB value or patch size being changed. The hardware processor further corrects measured RGB values of patches in a second color chart with the table, and convers the corrected RGB values into colorimetric values with the scanner profile.

Abstract: Provided is a dye-sensitized solar cell element comprising at least one dye-sensitized solar cell, wherein the dye-sensitized solar cell includes a first base material including a transparent substrate, a second base material which faces the first base material, an annular sealing portion which bonds the first base material and the second base material, and an oxide semiconductor layer which is provided between the first base material and the second base material, wherein the second base material has a flexibility, wherein the second base material includes an annular bonding edge portion which is bonded to the sealing portion and a main body portion in an inner side of the bonding edge portion, and wherein a portion of the main body portion is a convex bending portion which is bent to be convex toward a side opposite to the first base material.

Abstract: A color conversion method includes: a first acquisition step of acquiring a first color conversion table which defines mapping from a first color space to a second color space, and a second color conversion table which defines mapping from the second color space to a third color space; a second acquisition step of acquiring a color in the second color space to be subjected to color conversion; a computation step of computing an element group and a weight of each element included in the element group; a determination step of determining whether or not the element group in the second color conversion table; and a processing step of performing either first processing of performing inverse conversion and computing the color in the third color space, or second processing of performing an interpolation computation and computing the color in the third color space.

Abstract: A semiconductor memory device according to an embodiment includes: a first wiring line extending in a first direction; a second wiring line extending in a second direction, the second direction intersecting the first direction; a variable resistance film disposed at an intersection of the first wiring line and the second wiring line; a channel body disposed at a first end of the first wiring line; a third wiring line electrically connected to the first wiring line via the channel body; and a gate wiring line extending in the first direction and facing the channel body from the second direction.

Abstract: A battery pack includes a secondary battery, a secondary battery protecting integrated circuit configured to protect the secondary battery, at least one sensor configured to output a fault signal indicating sensing of a fault in the battery pack or an electronic apparatus including the battery pack, a detecting circuit configured to output a fault detection signal indicating a detection of the fault signal, a delay circuit configured to output a pulse delaying from the fault detection signal, and a counter configured to count a number of generating the pulse, the counter having at least N bits (N is an integer greater than 1), wherein the counter stops an operation until a count of 2(N-1).