Patents by Inventor Takeshi Yamaguchi

Takeshi Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9679947
    Abstract: A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: June 13, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaki Yamato, Yasuhiro Nojiri, Shigeki Kobayashi, Hiroyuki Fukumizu, Takeshi Yamaguchi
  • Patent number: 9669573
    Abstract: The injection molding apparatus of the present invention includes: a heating cylinder; a screw that is provided rotatably in an inner portion of the heating cylinder; a resin feed hopper that feeds a resin pellet; and a fiber feed device that is provided ahead of the resin feed hopper and feeds reinforcing fibers into the heating cylinder. The screw includes a first stage that is located on a rear side, and in which the resin pellet is melted, and a second stage that is located on a front side, and in which the melted resin pellet and the reinforcing fibers are mixed, and a lead of a second flight provided in the second stage is larger than a lead of a first flight provided in the first stage.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: June 6, 2017
    Assignee: MITSUBISHI HEAVY INDUSTRIES PLASTIC TECHNOLOGY CO., LTD.
    Inventors: Toshihiko Kariya, Naoki Toda, Munehiro Nobuta, Kiyoshi Kinoshita, Takeshi Yamaguchi, Kosuke Ikeda, Yuji Suzumura, Hitoshi Onuma, Ryoji Okabe, Masanori Takahashi
  • Publication number: 20170150782
    Abstract: An outsole of a shoe includes: a plurality of ridges having a tread surface to be in contact with a road surface; and at least one longitudinal groove defined between the plurality of ridges. At least in a partial area of each of a forefoot portion and a rear foot portion on a medial side of a foot, the plurality of ridges and the longitudinal groove extend in a longitudinal direction or a diagonal longitudinal direction and are set so that an angle of the ridges and that of the longitudinal groove with respect to a long axis of the outsole are in a range of 0° to 35°. A ratio of a length of the tread surface of the ridges with respect to a width of the tread surface is set to be 1.8 to 200. The width of the tread surface of the ridges is set to be greater than a width of the longitudinal groove by a factor of 2 to 100.
    Type: Application
    Filed: May 14, 2014
    Publication date: June 1, 2017
    Applicant: ASICS CORPORATION
    Inventors: Kenta Moriyasu, Tsuyoshi Nishiwaki, Kazuo Hokkirigawa, Takeshi Yamaguchi, Kei Shibata
  • Publication number: 20170133586
    Abstract: A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position.
    Type: Application
    Filed: January 23, 2017
    Publication date: May 11, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaki YAMATO, Yasuhiro NOJIRI, Shigeki KOBAYASHI, Hiroyuki FUKUMIZU, Takeshi YAMAGUCHI
  • Publication number: 20170117039
    Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises: a memory cell array; and a control circuit that manages a setting operation and a read operation. The memory cell array comprises: a first wiring line; a second wiring line intersecting the first wiring line; and a memory cell including a variable resistance element and a nonlinear element. The variable resistance element is configured having a first metal film, a first variable resistance film, a second variable resistance film, and a second metal film stacked and disposed therein in this order. A work function of the second metal film is smaller than a work function of the first metal film.
    Type: Application
    Filed: March 15, 2016
    Publication date: April 27, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaki YAMATO, Takeshi YAMAGUCHI, Takeshi TAKAGI, Hiroyuki ODE, Toshiharu TANAKA
  • Patent number: 9632646
    Abstract: Provided is an electronic apparatus including a casing, a display unit, an electrostatic capacitive touch panel, a gravity sensor, and a step. The display unit is disposed in the casing, has a predetermined shape, and displays predetermined information. The electrostatic capacitive touch panel has a shape substantially the same as the predetermined shape and determines a two-dimensional coordinate indicated by an instructing object which has some conductivity and display of the display unit passes through the electrostatic capacitive touch panel. The gravity sensor enables detection of a perpendicular direction. The step is disposed along a side of the predetermined shape, is low on an inside of the predetermined shape and is high on an outside of the predetermined shape. A nullification region at which the two-dimensional coordinate is nullified is enabled to be disposed along the side and the nullification region is disposed along the side in a perpendicular direction.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: April 25, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takeshi Yamaguchi, Tomoki Takano
  • Patent number: 9634064
    Abstract: According to one embodiment, a manufacturing method of a semiconductor memory device includes forming a stacked body in which word line material layers and insulating layers are alternately stacked on a base layer. The method includes forming first holes on the stacked body so as to be arranged in a first direction and in a second direction that intersects with the first direction. The method includes forming resistance-change films on inner walls of the first holes, forming bit lines inside the resistance-change films in the first holes, and dividing the stacked body in the first direction by forming second holes so that a portion in the stacked body adjacent to the resistance-change films in the second direction. The method includes forming inter-bit line insulating films in the second holes.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: April 25, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaki Yamato, Takeshi Yamaguchi, Shigeki Kobayashi
  • Patent number: 9626039
    Abstract: A touch panel has a first zone, a second zone and a third zone. The first zone includes a first vertical distance, which is less than a first value and greater than a second value, from the surface of the planar display, and includes a center of the planer display. The second zone includes the first vertical distance and is located outside the first zone with respect to the two dimensional coordinates. The third zone includes a second vertical distance, which is greater than the first value, from the surface of the planar display. When the indicator directly enters the second zone from the third zone, the two dimensional coordinates of the indicator are invalid. The two dimensional coordinates of the indicator are valid coordinates, when the indicator directly enters the second zone from the third zone, or when the indicator directly enters the first zone from the third zone.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: April 18, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tomoki Takano, Takeshi Yamaguchi
  • Publication number: 20170099414
    Abstract: Provided are a printer, a non-transitory computer-readable storage medium and a scanner-profile creation method. In a printer including a print engine, a scanner and a color measurement device, or a printing system including a printer, a scanner and a color measurement device, a controller creates a scanner profile by using RGB values and color measurement values obtained by measuring a first color chart with the scanner and color measurement device, and determines a first color gamut and a second color gamut of the printer by using one or both of RGB values and color measurement values obtained by measuring the first color chart and a second color chart, respectively, where the second color chart includes at least color patches in specific colors representing a color gamut of the printer. The controller further corrects the scanner profile by comparing the first color gamut and the second color gamut.
    Type: Application
    Filed: September 21, 2016
    Publication date: April 6, 2017
    Applicant: KONICA MINOLTA, INC.
    Inventor: Takeshi YAMAGUCHI
  • Publication number: 20170083159
    Abstract: A strain quantity threshold value is set in accordance with a distance from a pressure detection unit for each divided predetermined subdivision which is obtained by dividing an operation surface of a touch panel unit into a plurality of subdivisions. The minimum value of the strain quantity threshold value is set to be a value larger than a strain quantity when water or the like is attached to the operation surface of the touch panel unit.
    Type: Application
    Filed: December 1, 2016
    Publication date: March 23, 2017
    Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takeshi YAMAGUCHI, Tomoki TAKANO
  • Publication number: 20170076792
    Abstract: A semiconductor memory device according to an embodiment includes a control circuit configured to apply a first voltage to a selected first line, apply a second voltage to a selected second line, and apply a third voltage and a fourth voltage to a non-selected first line and a non-selected second line in a setting operation, respectively. The control circuit includes a detection circuit configured to detect a transition of a resistance state of a selected memory cell using a reference voltage. The control circuit is configured to execute a read operation in which the control circuit applies the third voltage to the selected first line and the non-selected first line, applies the second voltage to the selected second line, and applies the fourth voltage to the non-selected second line, and set the reference voltage based on a voltage value of the selected second line.
    Type: Application
    Filed: November 28, 2016
    Publication date: March 16, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeki KOBAYASHI, Takeshi YAMAGUCHI
  • Patent number: 9594407
    Abstract: An electronic device includes a housing, a planar display section, a planar transparent member, a touch panel layer which detects two-dimensional coordinates of an indicator having a predetermined conductivity along a surface of the display section and a vertical distance to the indicator, and an acceleration detection section which detects at least one of an acceleration of the housing and an acceleration of the transparent member. The two-dimensional coordinates are determined as effective coordinates when the vertical distance is equal to or smaller than a first value. The two-dimensional coordinates are determined as the effective coordinates when the vertical distance is more than the first value and is equal to or smaller than a second value more than the first value, and the acceleration detection section detects a predetermined acceleration.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: March 14, 2017
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Tomoki Takano, Takeshi Yamaguchi
  • Patent number: 9590016
    Abstract: A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: March 7, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaki Yamato, Yasuhiro Nojiri, Shigeki Kobayashi, Hiroyuki Fukumizu, Takeshi Yamaguchi
  • Publication number: 20170062713
    Abstract: According to one embodiment, A memory device includes a pillar, a first wiring, a second wiring, an insulating film provided between the first wiring and the second wiring, a first layer provided between the first wiring and the pillar in the second direction and including a first metal oxide containing a first metal and oxygen, a second layer provided between the second wiring and the pillar in the second direction and including the first metal oxide containing the first metal and oxygen, and an intermediate film provided between the pillar and the first layer and between the pillar and the second layer in the second direction and including a second metal oxide containing the first metal and oxygen. Concentration of oxygen contained in the first metal oxide is lower than concentration of oxygen contained in the second metal oxide.
    Type: Application
    Filed: February 2, 2016
    Publication date: March 2, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takeshi TAKAGI, Takeshi YAMAGUCHI, Masaki YAMATO, Hiroyuki ODE, Toshiharu TANAKA
  • Patent number: 9563828
    Abstract: A color conversion method according to the present invention, in which a scanner that outputs a first color value of a device-dependent color space is used, includes the steps of: acquiring the first color value by reading, by the scanner, a printed material which is based on image data composed of C, M, Y, K values; converting the acquired first color value to a second color value using a scanner profile of the scanner; mapping the first color value acquired from the printed material to the K value of the image data of the printed material; determining a correction quantity of the second color value from the mapped first color value and the K value using a scanner profile correcting LUT; and correcting the converted second color value using the determined correction quantity of the second color value, and outputting the second color value after being corrected.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: February 7, 2017
    Assignee: KONICA MINOLTA, INC.
    Inventors: Rumi Imaseki, Takeshi Yamaguchi
  • Patent number: 9559300
    Abstract: In accordance with an embodiment, a resistive random access memory device includes a substrate, first and second wiring lines, and a storage cell. The first and second wiring lines are disposed on the substrate so as to intersect each other. The storage cell is disposed between the first and second wiring lines at the intersection of the first and second wiring lines and includes a first electrode, a resistive switching film on the first electrode, a second electrode on the resistive switching film, and a tantalum oxide (TaOx) layer. The first electrode is electrically connected to the first wiring line. The second electrode is electrically connected to the second wiring line. The tantalum oxide (TaOx) layer is disposed between the first electrode and the resistive switching film and is in contact with the resistive switching film.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: January 31, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroyuki Ode, Takeshi Yamaguchi, Takeshi Takagi, Toshiharu Tanaka, Masaki Yamato
  • Publication number: 20170025475
    Abstract: According to one embodiment, a memory device includes a first wiring extending in a first direction, a second wiring extending in a second direction crossing the first direction and a resistance change film provided between the first wiring and the second wiring. The second wiring includes a first conductive layer and a first intermediate layer including a first region provided between the first conductive layer and the resistance change film. The first intermediate layer includes a material having nonlinear resistance characteristics.
    Type: Application
    Filed: February 8, 2016
    Publication date: January 26, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takeshi TAKAGI, Takeshi YAMAGUCHI, Masaki YAMATO, Hiroyuki ODE, Toshiharu TANAKA
  • Patent number: 9553469
    Abstract: There is provided a method of correcting an overcurrent detection voltage of a battery protection integrated circuit including a current path between a first terminal and a second terminal, one or more transistors for controlling current of a secondary battery, an overcurrent detection circuit and a control circuit.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: January 24, 2017
    Assignee: MITSUMI ELECTRIC CO., LTD.
    Inventors: Ryota Kageyama, Tsutomu Yamauchi, Norihito Kawaguchi, Nobuhito Tanaka, Takashi Takeda, Yoshihiro Satake, Takeshi Yamaguchi, Koji Koshimizu
  • Publication number: 20170015036
    Abstract: In an injection molding method of fiber reinforced resin of the present invention, a resin accumulation region is provided closer to a downstream side than an injection completion position inside a heating cylinder, an injection pressure is given to molten resin that occupies the resin accumulation region in an injection process of a preceding cycle, and a shear force is given to the molten resin that occupies the resin accumulation region in a plasticizing process of a subsequent cycle. An inside of massive reinforcing fibers F is impregnated with the molten resin by giving a high injection pressure to the molten resin that occupies the resin accumulation region. Next, dispersion of the reinforcing fibers is promoted by giving a shear force in the plasticizing process of the subsequent cycle.
    Type: Application
    Filed: May 30, 2014
    Publication date: January 19, 2017
    Inventors: Toshihiko KARIYA, Munehiro NOBUTA, Naoki TODA, Kiyoshi KINOSHITA, Takeshi YAMAGUCHI
  • Patent number: 9542904
    Abstract: A strain quantity threshold value is set in accordance with a distance from a pressure detection unit for each divided predetermined subdivision which is obtained by dividing an operation surface of a touch panel unit into a plurality of subdivisions. The minimum value of the strain quantity threshold value is set to be a value larger than a strain quantity when water or the like is attached to the operation surface of the touch panel unit.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: January 10, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takeshi Yamaguchi, Tomoki Takano