Patents by Inventor Takeya HIROSE

Takeya HIROSE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11888446
    Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a mixer circuit including a digital-analog converter circuit, a control circuit for controlling the digital-analog converter circuit, a power source control switch, and a plurality of Gilbert circuits. The plurality of Gilbert circuits each include an analog potential holding circuit for holding an analog potential output from the digital-analog converter circuit. The control circuit has a function of outputting a signal for controlling the analog potential holding circuit and the digital-analog converter circuit. The power source control switch has a function of stopping supply of a power source voltage to the control circuit in a period during which the analog potential held in the analog potential holding circuit is not updated. The analog potential holding circuit includes a first transistor. The first transistor includes a semiconductor layer including an oxide semiconductor in a channel formation region.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: January 30, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyotaka Kimura, Takeya Hirose, Hidetomo Kobayashi, Takayuki Ikeda
  • Patent number: 11842002
    Abstract: To provide an inexpensive display device. The display device includes a pixel and an IC chip. The pixel includes a first pixel circuit including a display element and a second pixel circuit including a light-receiving device. The one IC chip includes a control circuit, a data driver circuit, and a read circuit. The first and second pixel circuits are electrically connected to the read circuit. The control circuit has a function of controlling driving of the data driver circuit and the read circuit. The data driver circuit has a function of supplying image data to the first pixel circuit. The read circuit has a function of outputting a monitor signal corresponding to a monitor current when the monitor current flows through the first pixel circuit. The read circuit also has a function of outputting an imaging signal corresponding to imaging data acquired by the second pixel circuit.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: December 12, 2023
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kei Takahashi, Hidetomo Kobayashi, Hajime Kimura, Takeshi Osada, Hideaki Shishido, Kiyotaka Kimura, Shuichi Katsui, Takeya Hirose, Takayuki Ikeda
  • Publication number: 20230296910
    Abstract: An optical device with less influence of stray light is provided. The optical device is thin and includes a half mirror, a first lens, a retardation plate, a reflective polarizing plate, and a second lens. In the optical device, a geometric phase lens which has negative and positive refractive power is used as the first lens, whereby images can be focused after magnified optically. Thus, the optical device can have a wide viewing angle. In the case where stray light occurs due to birefringence of an optical material, negative refractive power of the first lens can prevent the stray light from being focused on the eye direction. Accordingly, image degradation recognized due to stray light can be prevented.
    Type: Application
    Filed: March 13, 2023
    Publication date: September 21, 2023
    Inventors: Takeya HIROSE, Ryo HATSUMI, Hisao IKEDA, Daiki NAKAMURA, Yosuke TSUKAMOTO
  • Publication number: 20230228970
    Abstract: A method for operating an electronic device, which is easy on eyes, is provided. The electronic device includes a display device including a light-emitting device and a light-receiving device, and a lens.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 20, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeya Hirose, Hisao IKEDA, Ryo HATSUMI, Daiki NAKAMURA, Yosuke TSUKAMOTO
  • Patent number: 11689850
    Abstract: Provided is a semiconductor device that does not require an A/D converter circuit and is capable of performing sound source separation without converting an analog signal. The semiconductor device includes a plurality of microphones, a plurality of delay circuits, and a signal processing circuit. The plurality of microphones are electrically connected to the respective delay circuits, and output signals of the plurality of delay circuits are input to the signal processing circuit. The delay circuit includes a plurality of signal retention circuits capable of retaining an analog potential, and has functions of retaining an electric signal output from the microphone as a discrete analog signal in the signal retention circuits and outputting the signal at a time different from the time when the microphone outputs the signal. The signal processing circuit has a function of adding the output signals of the plurality of delay circuits.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: June 27, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeya Hirose, Takayuki Ikeda
  • Publication number: 20230198509
    Abstract: A semiconductor device with low power consumption can be provided. The semiconductor device includes a differential circuit and a latch circuit, the differential circuit includes a transistor including an oxide semiconductor in a channel formation region, and the latch circuit includes a transistor including a single semiconductor or a compound semiconductor in a channel formation region. The differential circuit and the latch circuit include an overlap region.
    Type: Application
    Filed: July 12, 2021
    Publication date: June 22, 2023
    Inventors: Takeya HIROSE, Seiichi YONEDA, Yusuke NEGORO
  • Publication number: 20230179888
    Abstract: An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel unit, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel unit and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, whereby power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are stacked, so that the lengths of wirings between the circuits can be reduced, and high-speed operation with low power consumption can be performed.
    Type: Application
    Filed: July 12, 2021
    Publication date: June 8, 2023
    Inventors: Shunsuke SATO, Seiichi YONEDA, Yusuke NEGORO, Takeya HIROSE, Shunpei YAMAZAKI
  • Publication number: 20230156376
    Abstract: An imaging device that has an image processing function and is capable of a high-speed operation is provided. The imaging device has an additional function such as image processing, and can retain analog data obtained by an image capturing operation in pixels and extract data obtained by multiplying the analog data by a given weight coefficient. In the imaging device, the data is stored in a memory cell and pooling processing of data stored in a plurality of memory cells can be performed. The pixels are provided so as to have a region overlapping with at least one of the memory cells, a pooling processing circuit, and a reading circuit of the pixels; thus, an increase in the area of the imaging device can be inhibited even with an additional function.
    Type: Application
    Filed: April 9, 2021
    Publication date: May 18, 2023
    Inventors: Seiichi YONEDA, Yusuke NEGORO, Takeya HIROSE, Shunsuke SATO, Shunpei YAMAZAKI
  • Publication number: 20230147770
    Abstract: A semiconductor device capable of holding analog data is provided. Two holding circuits, two bootstrap circuits, and one source follower circuit are formed with use of four transistors and two capacitors. A memory node is provided in each of the two holding circuits; a data potential is written to one of the memory nodes and a reference potential is written to the other of the memory nodes. At the time of data reading, the potential of the one memory node is increased in one of the bootstrap circuits, and the potential of the other memory node is increased in the other of the bootstrap circuits. A potential difference between the two memory nodes is output by the source follower circuit. With use of the source follower circuit, the output impedance can be reduced.
    Type: Application
    Filed: April 6, 2021
    Publication date: May 11, 2023
    Inventors: Takeya HIROSE, Seiichi YONEDA, Takayuki IKEDA, Shunpei YAMAZAKI
  • Publication number: 20230109524
    Abstract: An imaging device having a function of processing an image is provided. The imaging device has an additional function such as image processing, can hold analog data obtained by an image capturing operation in a pixel, and can extract data obtained by multiplying the analog data by a predetermined weight coefficient. Difference data between adjacent light-receiving devices can be obtained in a pixel, and data on luminance gradient can be obtained. When the data is taken in a neural network or the like, inference of distance data or the like can be performed. Since enormous volume of image data in the state of analog data can be held in pixels, processing can be performed efficiently.
    Type: Application
    Filed: March 15, 2021
    Publication date: April 6, 2023
    Inventors: Takeya HIROSE, Seiichi YONEDA, Hiroki INOUE, Takayuki IKEDA, Shunpei YAMAZAKI
  • Publication number: 20220416008
    Abstract: A display apparatus with high display quality is provided. A high-resolution display apparatus is provided. The display apparatus includes a plurality of pixels, and the pixels each include a light-emitting device, a first transistor, a second transistor, a third transistor, a fourth transistor, and a first capacitor. One electrode of the light-emitting device is electrically connected to one of a source and a drain of the first transistor, one of a source and a drain of the second transistor, and one electrode of the first capacitor. A gate of the second transistor is electrically connected to the other electrode of the first capacitor, one of a source and a drain of the third transistor, and one of a source and a drain of the fourth transistor. One frame period of each of the pixels includes a period in which the first transistor and the fourth transistor are each in a conduction state.
    Type: Application
    Filed: December 11, 2020
    Publication date: December 29, 2022
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeya HIROSE, Hideaki SHISHIDO
  • Patent number: 11510002
    Abstract: A semiconductor device with a novel structure which can identify the sound source is provided. The semiconductor device includes a microphone array, delay circuits, and a signal processing circuit. The delay circuit includes a first selection circuit, which selects a microphone, signal retention circuits, which retain voltages depending on the sound signal, and a second selection circuit, which selects a signal retention circuit. Each signal retention circuit includes a transistor which includes a semiconductor layer including an oxide semiconductor in its channel formation region. The first selection circuit writes the voltage of discreet sound signals to the signal retention circuit. The second selection circuit selects at different timings the voltages which are retained in the signal retention circuit and generates the output signal corresponding to the delayed sound signal.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: November 22, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Kiyotaka Kimura, Takeya Hirose
  • Publication number: 20220350432
    Abstract: To provide an inexpensive display device. The display device includes a pixel and an IC chip. The pixel includes a first pixel circuit including a display element and a second pixel circuit including a light-receiving device. The one IC chip includes a control circuit, a data driver circuit, and a read circuit. The first and second pixel circuits are electrically connected to the read circuit. The control circuit has a function of controlling driving of the data driver circuit and the read circuit. The data driver circuit has a function of supplying image data to the first pixel circuit. The read circuit has a function of outputting a monitor signal corresponding to a monitor current when the monitor current flows through the first pixel circuit. The read circuit also has a function of outputting an imaging signal corresponding to imaging data acquired by the second pixel circuit.
    Type: Application
    Filed: September 22, 2020
    Publication date: November 3, 2022
    Inventors: Kei TAKAHASHI, Hidetomo KOBAYASHI, Hajime KIMURA, Takeshi OSADA, Hideaki SHISHIDO, Kiyotaka KIMURA, Shuichi KATSUI, Takeya HIROSE, Takayuki IKEDA
  • Patent number: 11482155
    Abstract: Variations in a receiving circuit employing differential signaling are reduced. The receiving circuit converts a first signal and a second signal which are supplied through differential signaling into a third signal which is a single-ended signal and outputs the third signal. The receiving circuit includes an operational amplifier, a first element, a first transistor, and a first circuit. The first element is connected to the first circuit through a first node to which the first transistor is connected. The first signal and the second signal that is the inverse of the first signal are supplied to the operational amplifier. The operational amplifier supplies an output signal to the first element, and a first preset potential is supplied to the first node through the first transistor. A signal including variations of the operational amplifier is stored in the first element in accordance with the first preset potential.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: October 25, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeya Hirose, Takahiro Fukutome
  • Publication number: 20220286090
    Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a mixer circuit including a digital-analog converter circuit, a control circuit for controlling the digital-analog converter circuit, a power source control switch, and a plurality of Gilbert circuits. The plurality of Gilbert circuits each include an analog potential holding circuit for holding an analog potential output from the digital-analog converter circuit. The control circuit has a function of outputting a signal for controlling the analog potential holding circuit and the digital-analog converter circuit. The power source control switch has a function of stopping supply of a power source voltage to the control circuit in a period during which the analog potential held in the analog potential holding circuit is not updated. The analog potential holding circuit includes a first transistor. The first transistor includes a semiconductor layer including an oxide semiconductor in a channel formation region.
    Type: Application
    Filed: April 27, 2020
    Publication date: September 8, 2022
    Inventors: Kiyotaka KIMURA, Takeya HIROSE, Hidetomo KOBAYASHI, Takayuki IKEDA
  • Patent number: 11335813
    Abstract: A semiconductor device in which the accuracy of arithmetic operation is increased by correction of the threshold voltage of a transistor can be provided. The semiconductor device includes first and second current supply circuits, and the second current supply circuit has the same configuration as the first current supply circuit. The first current supply circuit includes first and second transistors, a first capacitor, and first to third nodes. A first terminal of the first transistor is electrically connected to the first node, and a back gate of the first transistor is electrically connected to a first terminal of the second transistor and a first terminal of the first capacitor. A gate of the first transistor is electrically connected to the second node, and a second terminal of the first capacitor is electrically connected to a second terminal of the first transistor.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: May 17, 2022
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hidetomo Kobayashi, Takayuki Ikeda, Takashi Nakagawa, Takeya Hirose, Shuichi Katsui
  • Publication number: 20220035980
    Abstract: A transistor model that achieves precise approximation of transistor electrical characteristics is provided. The transistor model is a field-effect transistor model. A first capacitor is provided between a gate and a source. A second capacitor is provided between the gate and a drain. Each of the first capacitor and the second capacitor is a non-linear capacitor whose capacitance value is determined depending on a gate voltage. The first capacitor may be composed of a plurality of variable capacitors. The second capacitor may be composed of a plurality of variable capacitors. When CV characteristics of the first capacitor and CV characteristics of the second capacitor are adjusted, more precise simulation data is obtained.
    Type: Application
    Filed: November 20, 2019
    Publication date: February 3, 2022
    Inventors: Hitoshi KUNITAKE, Kazuki TSUDA, Tatsuki KOSHIDA, Takeya HIROSE, Tomoaki ATSUMI
  • Publication number: 20210400382
    Abstract: Provided is a semiconductor device that does not require an A/D converter circuit and is capable of performing sound source separation without converting an analog signal. The semiconductor device includes a plurality of microphones, a plurality of delay circuits, and a signal processing circuit. The plurality of microphones are electrically connected to the respective delay circuits, and output signals of the plurality of delay circuits are input to the signal processing circuit. The delay circuit includes a plurality of signal retention circuits capable of retaining an analog potential, and has functions of retaining an electric signal output from the microphone as a discrete analog signal in the signal retention circuits and outputting the signal at a time different from the time when the microphone outputs the signal. The signal processing circuit has a function of adding the output signals of the plurality of delay circuits.
    Type: Application
    Filed: October 2, 2019
    Publication date: December 23, 2021
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takeya HIROSE, Takayuki IKEDA
  • Publication number: 20210297775
    Abstract: A semiconductor device with a novel structure which can identify the sound source is provided. The semiconductor device includes a microphone array, delay circuits, and a signal processing circuit. The delay circuit includes a first selection circuit, which selects a microphone, signal retention circuits, which retain voltages depending on the sound signal, and a second selection circuit, which selects a signal retention circuit. Each signal retention circuit includes a transistor which includes a semiconductor layer including an oxide semiconductor in its channel formation region. The first selection circuit writes the voltage of discreet sound signals to the signal retention circuit. The second selection circuit selects at different timings the voltages which are retained in the signal retention circuit and generates the output signal corresponding to the delayed sound signal.
    Type: Application
    Filed: August 23, 2019
    Publication date: September 23, 2021
    Inventors: Takayuki IKEDA, Kiyotaka KIMURA, Takeya HIROSE
  • Publication number: 20210272507
    Abstract: Variations in a receiving circuit employing differential signaling are reduced. The receiving circuit converts a first signal and a second signal which are supplied through differential signaling into a third signal which is a single-ended signal and outputs the third signal. The receiving circuit includes an operational amplifier, a first element, a first transistor, and a first circuit. The first element is connected to the first circuit through a first node to which the first transistor is connected. The first signal and the second signal that is the inverse of the first signal are supplied to the operational amplifier. The operational amplifier supplies an output signal to the first element, and a first preset potential is supplied to the first node through the first transistor. A signal including variations of the operational amplifier is stored in the first element in accordance with the first preset potential.
    Type: Application
    Filed: July 10, 2019
    Publication date: September 2, 2021
    Inventors: Takeya HIROSE, Takahiro FUKUTOME