Patents by Inventor Takumi Masuyama
Takumi Masuyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10586770Abstract: An optical module includes: a substrate including a through hole, a first chip including a first heating member and disposed in the through hole, a second chip including a second heating member and bonded to a first upper surface of the substrate and a second upper surface of the first chip via bumps, and a first heat sink adhered to a lower surface of the substrate with a first adhesive and adhered to a lower surface of the first chip with a second adhesive, wherein the substrate includes a slit which is provided on a side of a first portion, to which the second chip is bonded, of the substrate with respect to the through hole, and communicates with the through hole.Type: GrantFiled: November 5, 2018Date of Patent: March 10, 2020Assignee: FUJITSU LIMITEDInventors: Takayoshi Matsumura, Naoaki Nakamura, Norio Kainuma, Takashi Kubota, Kenji Fukuzono, Takumi Masuyama, Yuki Hoshino, Hidehiko Kira
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Patent number: 10444450Abstract: An optical module includes a substrate, a silicon photonics chip disposed in an opening of the substrate, a control chip disposed across the substrate and the silicon photonics chip, a plurality of laser diodes disposed over the silicon photonics chip, and a metallic bar in contact with each of terminals of the plurality of laser diodes and electrically coupling each of the terminals with the silicon photonics chip or the substrate.Type: GrantFiled: May 22, 2018Date of Patent: October 15, 2019Assignee: FUJITSU LIMITEDInventors: Takayoshi Matsumura, Naoaki Nakamura, Kenji Fukuzono, Norio Kainuma, Takashi Kubota, Takumi Masuyama, Yuki Hoshino, Hidehiko Kira
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Publication number: 20190157207Abstract: An optical module includes: a substrate including a through hole, a first chip including a first heating member and disposed in the through hole, a second chip including a second heating member and bonded to a first upper surface of the substrate and a second upper surface of the first chip via bumps, and a first heat sink adhered to a lower surface of the substrate with a first adhesive and adhered to a lower surface of the first chip with a second adhesive, wherein the substrate includes a slit which is provided on a side of a first portion, to which the second chip is bonded, of the substrate with respect to the through hole, and communicates with the through hole.Type: ApplicationFiled: November 5, 2018Publication date: May 23, 2019Applicant: FUJITSU LIMITEDInventors: Takayoshi Matsumura, Naoaki Nakamura, NORIO KAINUMA, TAKASHI KUBOTA, KENJI FUKUZONO, Takumi Masuyama, Yuki Hoshino, Hidehiko Kira
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Publication number: 20180341075Abstract: An optical module includes a substrate, a silicon photonics chip disposed in an opening of the substrate, a control chip disposed across the substrate and the silicon photonics chip, a plurality of laser diodes disposed over the silicon photonics chip, and a metallic bar in contact with each of terminals of the plurality of laser diodes and electrically coupling each of the terminals with the silicon photonics chip or the substrate.Type: ApplicationFiled: May 22, 2018Publication date: November 29, 2018Applicant: FUJITSU LIMITEDInventors: Takayoshi Matsumura, Naoaki Nakamura, KENJI FUKUZONO, NORIO KAINUMA, TAKASHI KUBOTA, Takumi Masuyama, Yuki Hoshino, Hidehiko Kira
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Publication number: 20180217343Abstract: An optical module includes a housing; a substrate configured to have a through hole; a first chip configured to have a first heating member and be disposed inside the through hole; a second chip configured to have a second heating member, the second chip being placed on the substrate and the first chip with a bump interposed; a first heat conduction member configured to be sandwiched between a lower wall of the housing and the first chip and transfer heat generated by the first heating member to the lower wall of the housing; and a second heat conduction member configured to be sandwiched between an upper wall of the housing and the second chip and transfer heat generated by the second heating member to the upper wall of the housing.Type: ApplicationFiled: January 19, 2018Publication date: August 2, 2018Applicant: FUJITSU LIMITEDInventors: Takayoshi Matsumura, Naoaki Nakamura, NORIO KAINUMA, KENJI FUKUZONO, Yuki Hoshino, TAKASHI KUBOTA, Takumi Masuyama, Hidehiko Kira
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Patent number: 9905528Abstract: A semiconductor mounting apparatus includes a storing unit that stores a liquid or a gas, a contact unit that comes into contact with a semiconductor chip when the storing unit is filled with the liquid or the gas, and a sucking unit that sucks up the semiconductor chip to bring the semiconductor chip into close contact with the contact unit.Type: GrantFiled: November 30, 2016Date of Patent: February 27, 2018Assignee: FUJITSU LIMITEDInventors: Hidehiko Kira, Takumi Masuyama
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Patent number: 9793221Abstract: A first insulating film is applied onto a joining face of a semiconductor device including a connection terminal on a joining face, and the connection terminal is embedded inside the first insulating film. The second insulating film is formed on a joining target face of a joining target, which includes a connection target terminal on the joining target face, and the connection target terminal is embedded inside the second insulating film. The semiconductor device and the joining target are joined together by applying pressure and causing the semiconductor device and the joining target to make contact with each other.Type: GrantFiled: January 29, 2016Date of Patent: October 17, 2017Assignee: FUJITSU LIMITEDInventors: Hidehiko Kira, Norio Kainuma, Takashi Kubota, Takumi Masuyama
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Publication number: 20170186721Abstract: A semiconductor mounting apparatus includes a storing unit that stores a liquid or a gas, a contact unit that comes into contact with a semiconductor chip when the storing unit is filled with the liquid or the gas, and a sucking unit that sucks up the semiconductor chip to bring the semiconductor chip into close contact with the contact unit.Type: ApplicationFiled: November 30, 2016Publication date: June 29, 2017Applicant: FUJITSU LIMITEDInventors: Hidehiko Kira, Takumi Masuyama
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Patent number: 9536857Abstract: A heating header of a semiconductor mounting apparatus includes: a first material; and a second material, the second material being bonded to the first material and coming into contact with a first semiconductor chip when the first semiconductor chip is compressed, wherein a contact surface of the second material with the first semiconductor chip is a curved surface that is convex toward the first semiconductor chip side, and the contact surface of the second material with the first semiconductor chip becomes a planar surface when each temperature of the first material and the second material reaches a melting temperature of a solder that is formed between a first terminal of the first semiconductor chip and a second terminal of a second semiconductor chip.Type: GrantFiled: July 14, 2016Date of Patent: January 3, 2017Assignee: FUJITSU LIMITEDInventors: Hidehiko Kira, Takumi Masuyama, Norio Kainuma
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Publication number: 20160284566Abstract: A first insulating film is applied onto a joining face of a semiconductor device including a connection terminal on a joining face, and the connection terminal is embedded inside the first insulating film. The second insulating film is formed on a joining target face of a joining target, which includes a connection target terminal on the joining target face, and the connection target terminal is embedded inside the second insulating film. The semiconductor device and the joining target are joined together by applying pressure and causing the semiconductor device and the joining target to make contact with each other.Type: ApplicationFiled: January 29, 2016Publication date: September 29, 2016Applicant: FUJITSU LIMITEDInventors: Hidehiko Kira, NORIO KAINUMA, TAKASHI KUBOTA, Takumi Masuyama
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Patent number: 9053262Abstract: A method of determining a reinforcement position of a circuit board includes: setting a numerical model of a circuit board in which an electronic component is mounted in a front surface by bumps, and a reinforcing member is attached to a position corresponding to a bump located in a corner part of the electrical component in a back surface; incorporating information about a stud that is located in a periphery of the electronic component and fixes the circuit board to a chassis of the electronic device; performing a simulation for obtaining values of stresses generated in bumps of corner parts when a force is applied to the electronic component from a back side of the circuit board; and determining an arrangement of the reinforcing member in accordance with a position of the stud based on the values of stresses obtained by the simulation.Type: GrantFiled: October 10, 2012Date of Patent: June 9, 2015Assignee: FUJITSU LIMITEDInventors: Hiroshi Kobayashi, Satoshi Emoto, Toru Okada, Masayuki Kitajima, Takumi Masuyama
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Publication number: 20140078700Abstract: A circuit board device includes: a circuit board; an electronic component bonded to a first surface of the circuit board via an electronic component-bonding portion that is disposed over a rectangular region; and a reinforcing member disposed at one of four corners of a rectangular region of a second surface of the circuit board that is at a position corresponding to a position of the rectangular region of the first surface on a side opposite a side on which the rectangular region is present, wherein the reinforcing member includes a stress receiving portion having an outer edge located in a diagonal line direction of the rectangular region of the second surface and a stress dispersing portion extending in such a manner as to have a fan-like shape or a substantially fan-like shape toward the inside in the diagonal line direction with the stress receiving portion.Type: ApplicationFiled: August 7, 2013Publication date: March 20, 2014Applicant: FUJITSU LIMITEDInventors: Takumi MASUYAMA, Satoshi EMOTO, Toru OKADA, Hiroshi KOBAYASHI
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Publication number: 20130322057Abstract: There is provided a heat transfer cap includes a cap unit configured to include side walls to be in contact with side surfaces of an electronic component during heating, the cap unit covering the electronic component solder-jointed to a wiring board, and a ring unit mounted outside side walls of the cap unit, a linear expansivity of the ring unit being smaller than a linear expansivity of the cap unit.Type: ApplicationFiled: May 23, 2013Publication date: December 5, 2013Applicant: FUJITSU LIMITEDInventors: Toru OKADA, Hiroshi KOBAYASHI, Takumi MASUYAMA
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Publication number: 20130256022Abstract: A wiring board assembly includes: a plurality of insulating substrates of which each includes an insulating layer and a wiring layer; a wiring board that includes pads formed on the insulating substrate; and a semiconductor component that is joined on the pads by using solder bumps. The wiring board embeds a stiffening member whose thickness is thinner than that of the insulating layer and whose thermal expansion coefficient is smaller and Young's modulus is higher than those of the wiring layer and the insulating layer.Type: ApplicationFiled: January 23, 2013Publication date: October 3, 2013Applicant: FUJITSU LIMITEDInventors: Hiroshi KOBAYASHI, Naoki ISHIKAWA, Satoshi EMOTO, Toru OKADA, Takumi MASUYAMA
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Publication number: 20100326726Abstract: A solder joint structure include: a first terminal portion including a plurality of first terminal conductors adjacent to each other; a second terminal portion arranged opposite to the first terminal portion and including a plurality of second terminal conductors which are joined to the first terminal conductors; solders electrically connecting the first terminal conductors and the second terminal conductors; and member for suppressing flow of the solders.Type: ApplicationFiled: June 18, 2010Publication date: December 30, 2010Applicant: FUJITSU LIMITEDInventors: Hisao Tanaka, Satoshi Emoto, Kenichi Nashirozawa, Nana Matsushima, Takumi Masuyama