Patents by Inventor Takuo Kaitoh
Takuo Kaitoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250147369Abstract: A display device includes a first pixel including a transistor having an oxide semiconductor layer, a first gate wiring, and a first source wiring. The first gate wiring includes a first part of a first conductive, and extends in a first direction. The first source wiring includes a first part of a second conductive layer and a first part of a third conductive layer connected to the first part of the second conductive layer, and extends in a second direction intersecting the first direction. A thickness of the second conductive layer is thinner than a thickness of the first conductive layer and thinner than a thickness of the third conductive layer.Type: ApplicationFiled: October 9, 2024Publication date: May 8, 2025Applicant: Japan Display Inc.Inventors: Akihiro HANADA, Takuo KAITOH, Motochika YUKAWA
-
Publication number: 20250126845Abstract: The purpose of the present invention is to suppress a variation in a threshold voltage (? Vth) in a Thin Film Transistor (TFT) using an oxide semiconductor. The present invention takes a structure as follows to attain this purpose. A semiconductor device having TFT using an oxide semiconductor including: a channel region, a source region, a drain region, and a transition region between the channel region and the source region and between the channel region and the drain region, in which a resistivity of the transition region is smaller than that of the channel region, and larger than that of the source region or the drain region; a source electrode is formed overlapping the source region, and a drain electrode is formed overlapping the drain region; and a thickness of the transition region of the oxide semiconductor is larger than a thickness of the channel region of the oxide semiconductor.Type: ApplicationFiled: November 26, 2024Publication date: April 17, 2025Applicant: Japan Display Inc.Inventors: Akihiro HANADA, Takuo KAITOH, Masashi TSUBUKU
-
Publication number: 20250113616Abstract: A display device includes an oxide semiconductor layer including a polycrystalline structure, a gate insulating layer provided on the oxide semiconductor layer, a gate electrode opposite to the oxide semiconductor layer on the gate insulating layer, a first silicon nitride layer provided in contact with the gate electrode, a source wiring provided in contact with the first silicon nitride layer and electrically connected to the oxide semiconductor layer, a second silicon nitride layer provided in contact with the source wiring and the first silicon nitride layer, a first transparent conductive layer provided in contact with the second silicon nitride layer and electrically connected to the oxide semiconductor layer, and a third silicon nitride layer provided in contact with the first transparent conductive layer and the second silicon nitride layer, wherein a channel length of the gate electrode is 2.0 ?m or less.Type: ApplicationFiled: September 13, 2024Publication date: April 3, 2025Applicant: Japan Display Inc.Inventors: Akihiro HANADA, Takuo KAITOH, Motochika YUKAWA
-
Patent number: 12224332Abstract: The purpose of the present invention is to suppress a change in characteristics of a TFT using an oxide semiconductor film caused by that oxygen in the oxide semiconductor film is extracted by metal electrode. The main structure of the present invention is as follows. A semiconductor device having a TFT, in which a gate insulating film is formed on a gate electrode, and an oxide semiconductor film is formed on the gate insulating film; the oxide semiconductor film including a channel region, a drain region, and a source region; in which a metal nitride film is formed on a top surface of the gate electrode in an opposing portion to the channel region in a plan view; and the metal nitride film is not formed at a part of the top surface of the gate electrode.Type: GrantFiled: March 30, 2022Date of Patent: February 11, 2025Assignee: Japan Display Inc.Inventors: Akihiro Hanada, Takuo Kaitoh, Hajime Watakabe
-
Patent number: 12191398Abstract: The purpose of the present invention is to suppress a variation in a threshold voltage (? Vth) in a Thin Film Transistor (TFT) using an oxide semiconductor. The present invention takes a structure as follows to attain this purpose. A semiconductor device having TFT using an oxide semiconductor including: a channel region, a source region, a drain region, and a transition region between the channel region and the source region and between the channel region and the drain region, in which a resistivity of the transition region is smaller than that of the channel region, and larger than that of the source region or the drain region; a source electrode is formed overlapping the source region, and a drain electrode is formed overlapping the drain region; and a thickness of the transition region of the oxide semiconductor is larger than a thickness of the channel region of the oxide semiconductor.Type: GrantFiled: January 20, 2022Date of Patent: January 7, 2025Assignee: Japan Display Inc.Inventors: Akihiro Hanada, Takuo Kaitoh, Masashi Tsubuku
-
Patent number: 12191397Abstract: A semiconductor device includes a thin-film transistor. The thin-film transistor comprises an oxide semiconductor layer, a gate insulating layer, a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer, a source electrode in contact with the oxide semiconductor layer, a drain electrode in contact with the oxide semiconductor layer and a first metal layer in contact with the oxide semiconductor layer and disposed between the source electrode and the drain electrode at a distance from the source electrode and the drain electrode.Type: GrantFiled: November 9, 2021Date of Patent: January 7, 2025Assignee: Japan Display Inc.Inventors: Akihiro Hanada, Hajime Watakabe, Takuo Kaitoh, Ryo Onodera
-
Patent number: 12189253Abstract: A display device includes a first conductive layer arranged on a first substrate and extending in a first direction, a first insulating film arranged on the first conductive layer, a second conductive layer arranged on the first insulating film and extending in a second direction intersecting the first direction, a second insulating film arranged on the second conductive layer and extending in the first direction and the second direction, a transparent conductive layer arranged on the second insulating film and extending in the first direction and the second direction, a third insulating film arranged on the first conductive layer, and a second substrate opposing the first substrate.Type: GrantFiled: May 24, 2024Date of Patent: January 7, 2025Assignee: Japan Display Inc.Inventors: Akihiro Hanada, Takuo Kaitoh, Ryo Onodera, Motochika Yukawa
-
Publication number: 20240402553Abstract: A display device includes a first conductive layer arranged on a first substrate and extending in a first direction, a first insulating film arranged on the first conductive layer, a second conductive layer arranged on the first insulating film and extending in a second direction intersecting the first direction, a second insulating film arranged on the second conductive layer and extending in the first direction and the second direction, a transparent conductive layer arranged on the second insulating film and extending in the first direction and the second direction, a third insulating film arranged on the first conductive layer, and a second substrate opposing the first substrate.Type: ApplicationFiled: May 24, 2024Publication date: December 5, 2024Applicant: Japan Display Inc.Inventors: Akihiro HANADA, Takuo KAITOH, Ryo ONODERA, Motochika YUKAWA
-
Patent number: 12158661Abstract: A display device includes a first nitride insulating film arranged on a first substrate, a gate electrode arranged along a first direction on the first nitride insulating film, a second nitride insulating film arranged on the gate electrode, a first oxide insulating film arranged on the second nitride insulating film, and an oxide semiconductor layer arranged on the first oxide insulating film, wherein the gate electrode has a first titanium layer, an aluminum layer, and a second titanium layer stacked in order from the first nitride insulating film side, and a thickness of the second titanium layer is greater than a thickness of the first titanium layer.Type: GrantFiled: November 6, 2023Date of Patent: December 3, 2024Assignee: Japan Display Inc.Inventors: Akihiro Hanada, Takuo Kaitoh, Ryo Onodera, Tomoyuki Ito, Yoshinori Tanaka
-
Patent number: 12154989Abstract: A semiconductor device includes a thin-film transistor. The thin-film transistor comprises an oxide semiconductor layer, a gate insulating layer, a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer, a source electrode in contact with the oxide semiconductor layer, a drain electrode in contact with the oxide semiconductor layer and n (n is a natural number) metal layer(s) in contact with the oxide semiconductor layer and disposed across the oxide semiconductor layer between the source electrode and the drain electrode. The oxide semiconductor layer has (n+1) channel regions between the source electrode and the drain electrode in a plan view.Type: GrantFiled: November 10, 2021Date of Patent: November 26, 2024Assignee: Japan Display Inc.Inventors: Akihiro Hanada, Takuo Kaitoh
-
Patent number: 12132117Abstract: According to one embodiment, a semiconductor device includes a first insulating film formed of silicon nitride, a second insulating film disposed above the first insulating film and formed of silicon oxide, including a first region and a peripheral region surrounding the first region and thinner than the first region, an oxide semiconductor disposed on the second insulating film and intersecting the first region, a source electrode overlapping the peripheral region and a drain electrode overlapping the peripheral region. The first region is located between the source electrode and the drain electrode and separated from the source electrode and the drain electrode.Type: GrantFiled: December 27, 2021Date of Patent: October 29, 2024Assignee: JAPAN DISPLAY INC.Inventors: Takuo Kaitoh, Akihiro Hanada, Takashi Okada
-
Patent number: 12105388Abstract: A display device includes a wiring region including a gate wiring, a source wiring intersecting the gate wiring, and a first insulating layer between the gate wiring and the source wiring and an opening region including a pixel electrode on the first insulating layer and adjacent to the wiring region. The first insulating layer includes a first oxide insulating layer and a first nitride insulating layer, the first oxide insulating layer is disposed over the wiring region and the opening region, the first nitride insulating layer is disposed in the wiring region and includes a first opening overlapping the opening region, and the pixel electrode overlaps the first opening.Type: GrantFiled: November 15, 2023Date of Patent: October 1, 2024Assignee: Japan Display Inc.Inventors: Akihiro Hanada, Takuo Kaitoh, Tomoyuki Ito, Yoshinori Tanaka
-
Patent number: 12068399Abstract: According to one embodiment, a method for manufacturing a semiconductor device, includes forming a first insulating film which covers a gate electrode, forming an island-shaped oxide semiconductor in contact with the first insulating film, forming a second insulating film which covers the oxide semiconductor, forming a source electrode in contact with the oxide semiconductor, forming a drain electrode in contact with the oxide semiconductor, forming a third insulating film which covers the source electrode and the drain electrode and forming a channel region between the source electrode and the drain electrode by supplying oxygen from the third insulating film to the oxide semiconductor via the second insulating film.Type: GrantFiled: October 27, 2021Date of Patent: August 20, 2024Assignee: JAPAN DISPLAY INC.Inventors: Akihiro Hanada, Takuo Kaitoh, Ryo Onodera, Takashi Okada, Tomoyuki Ito, Toshiki Kaneko
-
Patent number: 12032256Abstract: A display device includes a first substrate, a gate wiring on the first substrate, a first insulating layer on the gate wiring, a source wiring on the first insulating layer and intersecting the gate wiring, a second insulating layer on the source wiring, a pixel electrode on the second insulating layer; and a first buffer layer between the first substrate and the first insulating layer. A refractive index of the first buffer layer is higher than a refractive index of the first substrate, at an interface between the first buffer layer and the first substrate, and the refractive index of the first buffer layer is lower than a refractive index of the first insulating layer, at an interface between the first buffer layer and the first insulating layer.Type: GrantFiled: August 11, 2023Date of Patent: July 9, 2024Assignee: Japan Display Inc.Inventors: Takuo Kaitoh, Akihiro Hanada, Yoshinori Tanaka
-
Publication number: 20240168335Abstract: A display device includes a first nitride insulating film arranged on a first substrate, a gate electrode arranged along a first direction on the first nitride insulating film, a second nitride insulating film arranged on the gate electrode, a first oxide insulating film arranged on the second nitride insulating film, and an oxide semiconductor layer arranged on the first oxide insulating film, wherein the gate electrode has a first titanium layer, an aluminum layer, and a second titanium layer stacked in order from the first nitride insulating film side, and a thickness of the second titanium layer is greater than a thickness of the first titanium layer.Type: ApplicationFiled: November 6, 2023Publication date: May 23, 2024Applicant: Japan Display Inc.Inventors: Akihiro HANADA, Takuo KAITOH, Ryo ONODERA, Tomoyuki ITO, Yoshinori TANAKA
-
Publication number: 20240160069Abstract: A display device includes a wiring region including a gate wiring, a source wiring intersecting the gate wiring, and a first insulating layer between the gate wiring and the source wiring and an opening region including a pixel electrode on the first insulating layer and adjacent to the wiring region. The first insulating layer includes a first oxide insulating layer and a first nitride insulating layer, the first oxide insulating layer is disposed over the wiring region and the opening region, the first nitride insulating layer is disposed in the wiring region and includes a first opening overlapping the opening region, and the pixel electrode overlaps the first opening.Type: ApplicationFiled: November 15, 2023Publication date: May 16, 2024Applicant: Japan Display Inc.Inventors: Akihiro HANADA, Takuo KAITOH, Tomoyuki ITO, Yoshinori TANAKA
-
Patent number: 11982900Abstract: According to one embodiment, an electronic apparatus includes a camera, a liquid crystal panel including a display portion overlaid on the camera, a light guide having a first side surface and a main surface opposed to the liquid crystal panel and a first through hole, and a light source opposed to the first side surface. The camera is provided in the first through hole.Type: GrantFiled: February 13, 2023Date of Patent: May 14, 2024Assignee: Japan Display Inc.Inventors: Akio Takimoto, Toshiki Kaneko, Takuo Kaitoh, Kazuhiro Nishiyama, Hiroyuki Kimura
-
Publication number: 20240142840Abstract: According to one embodiment, an electronic apparatus includes a camera, a first polarizer, a second polarizer, a liquid crystal panel, and a controller controlling the liquid crystal panel. The liquid crystal panel includes a first region and a second region. The controller controls a first opening mode of transmitting light through the first region and the second region, and a second opening mode of making a quantity of light transmitted through the first region smaller than a quantity of light transmitted through the second region.Type: ApplicationFiled: January 4, 2024Publication date: May 2, 2024Applicant: Japan Display Inc.Inventors: Akio TAKIMOTO, Toshiki KANEKO, Takuo KAITOH, Kazuhiro NISHIYAMA, Hiroyuki KIMURA
-
Publication number: 20240085750Abstract: A display device includes a first substrate, a gate wiring on the first substrate, a first insulating layer on the gate wiring, a source wiring on the first insulating layer and intersecting the gate wiring, a second insulating layer on the source wiring, a pixel electrode on the second insulating layer; and a first buffer layer between the first substrate and the first insulating layer. A refractive index of the first buffer layer is higher than a refractive index of the first substrate, at an interface between the first buffer layer and the first substrate, and the refractive index of the first buffer layer is lower than a refractive index of the first insulating layer, at an interface between the first buffer layer and the first insulating layer.Type: ApplicationFiled: August 11, 2023Publication date: March 14, 2024Applicant: Japan Display Inc.Inventors: Takuo KAITOH, Akihiro HANADA, Yoshinori TANAKA
-
Patent number: 11914258Abstract: According to one embodiment, an electronic apparatus includes a camera, a first polarizer, a second polarizer, a liquid crystal panel, and a controller controlling the liquid crystal panel. The liquid crystal panel includes a first region and a second region. The controller controls a first opening mode of transmitting light through the first region and the second region, and a second opening mode of making a quantity of light transmitted through the first region smaller than a quantity of light transmitted through the second region.Type: GrantFiled: December 29, 2022Date of Patent: February 27, 2024Assignee: Japan Display Inc.Inventors: Akio Takimoto, Toshiki Kaneko, Takuo Kaitoh, Kazuhiro Nishiyama, Hiroyuki Kimura