Patents by Inventor Tamotsu Usami
Tamotsu Usami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20060203586Abstract: A memory cell MC includes nMOS transistors for a transfer gate configured to be paired with each other, and one capacitor for data storage connected to the nMOS transistor. A gate electrode of the nMOS transistor is connected to a word line WL, and a drain is connected to a bit line BL. A gate electrode of the nMOS transistor is connected to a word line /WL, and a drain and a source are connected to a ground. The capacitor is connected between a source of the nMOS transistor and the ground. A Y selector circuit is connected between a differential bit line BL, /BL and a differential data line DL, /DL. The Y selector circuit has two pairs of nMOS transistors configured to be paired transistors, respectively.Type: ApplicationFiled: February 24, 2006Publication date: September 14, 2006Inventors: Kanji Otsuka, Tamotsu Usami
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Patent number: 6975489Abstract: A bypass capacitor having a given capacitance is arranged on the power/ground line adjacently to a driver circuit in a chip to reduce an effect of transient phenomenon at switching. The capacitance of the bypass capacitor is preset so as to be larger than a parasitic capacitance of the driver circuit to prevent the characteristic impedance of the power/ground line from being higher than the characteristic impedance of internal wiring.Type: GrantFiled: January 23, 2003Date of Patent: December 13, 2005Assignees: NEC Corporation, Oki Electric Industry Co., Ltd., Sanyo Electric Co., Ltd., SHARP Kabushiki Kaisha, Sony Corporatoin, TOSHIBA Corporation, Fujitsu Limited, Matsushita Electric Industrial Co., Ltd., Rohm Co., Ltd., Renesas Technology Corp.Inventors: Kanji Otsuka, Tadatomo Suga, Tamotsu Usami
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Patent number: 6961229Abstract: An electronic circuit device having a power-supply structure capable of supporting fast signals in and above a GHz band is offered. A driver transistor is formed in a surface of a semiconductor substrate. Power-supply/ground pair transmission lines which provide the driver transistor with power and signal/ground pair transmission lines which transmit signals to a receiver are formed on the semiconductor substrate. The power-supply/ground pair transmission lines are connected to a drain layer of the driver transistor and a P+ layer in a P well. The signal/ground pair transmission lines are connected to a source layer of the driver transistor and a P+ layer in the P well.Type: GrantFiled: February 20, 2004Date of Patent: November 1, 2005Assignees: Sanyo Electric Co., Ltd., Oki Electric Industry Co., Ltd., Sharp Kabushiki Kaisha, Sony Corporation, Kabushiki Kaisha Toshiba, NEC Corporation, Hitachi, Ltd., Matsushita Electric Industrial Co., Ltd., Mitsubishi Denki Kabushiki Kaisha, Fujitsu Limited, Rohm Co., Ltd.Inventors: Kanji Otsuka, Tamotsu Usami
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Publication number: 20050179465Abstract: A purpose of a high-speed signal transmission system of the present invention is to pass a high-speed digital signal through an outside-chip line exchanging a signal with a high speed LSI chip with a band higher than GHz. The high-speed signal transmission system of the present invention has a configuration of: insertion of a circuit for feeding back received information and adjusting a waveform at a sending side based on genetic algorithm; a device structure for automatically performing pump up and pump down of a transistor carrier; a transmission line of a wiring out of a transistor; and elimination of a common power source of a circuit.Type: ApplicationFiled: April 21, 2003Publication date: August 18, 2005Inventors: Kanji Otsuka, Tamotsu Usami, Tetsuya Higuchi, Eiichi Takahashi, Yuji Kasai, Masahiro Murakawa
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Patent number: 6914502Abstract: A wiring structure for a transmission line has a ground line (2) and a signal line (1). The signal line (1) is disposed so as to face the ground line (2) through a dielectric (3). A surface of the signal line (1) facing the ground line (2) has a groove extending in the transmission direction. A surface of the ground line (2) facing the signal line (1) also has a groove extending in the transmission direction. The grooves restrain that electromagnetic induction is caused in the signal line (1) due to an electromagnetic field generated by other adjacent signal lines (1).Type: GrantFiled: November 16, 2001Date of Patent: July 5, 2005Assignees: Oki Electric Industry Co., Ltd., Sanyo Electric Co., Ltd., Sharp Kabushiki Kaisha, Sony Corporation, Kabushiki Kaisha Toshiba, NEC Corporation, Hitachi, Ltd., Fujitsu Limited, Matsushita Electric industrial Co., Ltd., Mitsubishi Denki Kabushiki Kaisha, Rohm Co., Ltd.Inventors: Kanji Otsuka, Tamotsu Usami
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Publication number: 20050040846Abstract: To transmit a high-speed digital signal of several tens GHz via a differential line by connecting a differential line referring to the ground to differential lines not referring to the ground, there is provided a signal transmission system which transmits a digital signal between circuit blocks via a signal transmission line, each of the circuit blocks basically including a functional circuit, a reception/transmission circuit formed separately from the functional circuit and an impedance-matched transmission line (115) formed between reception and transmission ends of the reception/transmission circuit; a differential line (105) referring to the ground (110), led out from a differential output driver, being formed from differential signal lines disposed symmetrically with respect to the ground (110) in the circuit block, only differential pair lines (111, 112) not referring to the ground being extended directly from the differential signal lines disposed symmetrically with respect to the ground in the signalType: ApplicationFiled: July 26, 2004Publication date: February 24, 2005Inventors: Kanji Otsuka, Tamotsu Usami
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Publication number: 20040227580Abstract: A differential signal transmission cable structure for transmitting differential signals having GHz frequency band in the present invention is provided with a differential signal transmission pair cable 30 connecting a driver circuit 23a and a receiver circuit 23b, for transmitting differential signals having GHz frequency band, and a power supply ground transmission pair cable 31 connecting ground and a first power supply 26a connected to the driver circuit and ground and a second power supply 26b connected to the receiver circuit. Further characteristic impedance of the differential signal transmission pair cable is matched to that of the driver circuit and the receiver circuit, thereby enabling TEM waves of differential signals having GHz frequency band transmission mode to be maintained when the differential signals are transmitted.Type: ApplicationFiled: May 14, 2004Publication date: November 18, 2004Applicant: FUJIKURA LTD.Inventors: Kanji Otsuka, Tamotsu Usami, Chihiro Ueda, Yutaka Akiyama, Osamu Koyasu
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Patent number: 6812742Abstract: An electronic device having a current switch type driver is provided. The current switch type driver includes a differential circuit that supplies a current to a transmission channel according to a signal. In the electronic device, a signal wire that transmits the signal to the differential circuit has a transmission channel structure.Type: GrantFiled: December 2, 2002Date of Patent: November 2, 2004Assignees: Fujitsu Limited, Oki Electric Industry Co., Ltd., SANYO Electric Co., Ltd., Sharp Kabushiki Kaisha, Sony Corporation, Kabushiki Kaisha Toshiba, NEC Corporation, Hitachi, Ltd., Matsushita Electric Industrial Co., Ltd., Mitsubishi Denki Kabushiki Kaisha, Rohm Co., Ltd.Inventors: Kanji Otsuka, Tamotsu Usami
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Publication number: 20040207432Abstract: An electronic circuit device having a power-supply structure capable of supporting fast signals in and above a GHz band is offered. A driver transistor is formed in a surface of a semiconductor substrate. Power-supply/ground pair transmission lines which provide the driver transistor with power and signal/ground pair transmission lines which transmit signals to a receiver are formed on the semiconductor substrate. The power-supply/ground pair transmission lines are connected to a drain layer of the driver transistor and a P+ layer in a P well. The signal/ground pair transmission lines are connected to a source layer of the driver transistor and a P+ layer in the P well.Type: ApplicationFiled: February 20, 2004Publication date: October 21, 2004Applicants: Kanji OTSUKA, Tamotsu USAMI, Sanyo Electric Co., Ltd, Oki Electric Industry Co., Ltd, Sharp Kabushiki Kaisha, Sony Corporation, Kabushiki Kaisha Toshiba, NEC Corporation, Hitachi, Ltd., Matsushita Electric Industrial Co., Ltd., Mitsubishi Denki Kabushiki Kaisha, Fujitsu Limited, Rohm Co., Ltd.Inventors: Kanji Otsuka, Tamotsu Usami
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Publication number: 20040165669Abstract: Apparatus for transmitting a digital signal within, for example, an integrated circuit includes a signal transmission line with a directional coupler at one or both ends. The directional coupler blocks the direct-current component of the digital signal while transmitting the alternating-current component, including enough higher harmonics to transmit a well-defined pulse waveform. A suitable directional coupler consists of two adjacent line pairs in materials with different dielectric constants. The apparatus may also include a driver of the inverter type, a receiver of the differential amplifier type, a terminating resistor, and a power-ground transmission line pair for supplying power to the driver. An all-metallic transmission-line structure is preferably maintained from the output interconnections in the driver to the input interconnections in the receiver.Type: ApplicationFiled: February 11, 2004Publication date: August 26, 2004Inventors: Kanji Otsuka, Tamotsu Usami
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Patent number: 6731153Abstract: A CMOS line driver is made up of p- and nMOS transistors. A pMOS varactor is interposed between the source of the pMOS transistor and a power supply, while an nMOS varactor is interposed between the source of the nMOS transistor and ground. The sizes of each of these MOS varactors may be the same as those of the p- or nMOS transistor. Alternatively, each of these MOS varactors may have a channel area twice greater than that of the p- or nMOS transistor. The inverted version of a signal input to the line driver is supplied to the gates of the MOS varactors. In this manner, the MOS transistors, making up the line driver, can switch at a high speed.Type: GrantFiled: September 27, 2001Date of Patent: May 4, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kanji Otsuka, Tamotsu Usami
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Patent number: 6670830Abstract: A signal transmission bus system has a transmission line pair on which binary data values are indicated by the presence and absence of a complementary signal. A driver circuit opens and closes a current path that supplies the complementary signal to the transmission line pair. When this path is opened, the driver circuit closes a bypass current path, so that the driver circuit behaves as a direct-current circuit and does not generate power-supply and ground noise. A receiver that senses the presence and absence of the complementary signal on the transmission line pair includes a differential amplifier and a termination transistor coupled across the input terminals of the differential amplifier, to discharge the input capacitance of the differential amplifier so that high-speed signals can be sensed rapidly.Type: GrantFiled: January 18, 2001Date of Patent: December 30, 2003Assignees: Oki Electric Industry Co., Ltd., Sanyo Electric Co., Ltd., Sharp Kabushiki Kaisha, Sony Corporation, Kabushiki Kaisha Toshiba, NEC Corporation, Hitachi, Ltd., Fujitsu Limited, Matsushita Electric Industrial Co. Ltd., Mitsubishi Denki Kabushiki Kaisha, Rohm Co., Ltd.Inventors: Kanji Otsuka, Tamotsu Usami
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Patent number: 6630629Abstract: Signal wirings 22, 23 are formed on a pair of substrates 20, 21, and the substrates are joined together through an insulating layer 24 so that the signal wirings 22, 23 are placed in parallel and facing to each other. The surfaces of the overlapping faces of the signal wirings 22, 23 are made smooth, and the roughness of the same surfaces is smaller than the skin depth &dgr;s due to the skin effect, preferably less than one third, for minimizing the increase in the electric resistance due to the skin effect.Type: GrantFiled: August 27, 2002Date of Patent: October 7, 2003Assignees: Sanyo Electric Co., Ltd., Oki Electric Industry Co., Ltd., Sharp Kabushiki Kaisha, Sony Corporation, Kabushiki Kaisha Toshiba, NEC Corporation, Hitachi, Ltd., Fujitsu Limited, Matsushita Electronics Corporation, Mitsubishi Denki Kabushiki Kaisha, Rohm Co., Ltd.Inventors: Kanji Otsuka, Tamotsu Usami
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Publication number: 20030184311Abstract: A bypass capacitor having a given capacitance is arranged on the power/ground line adjacently to a driver circuit in a chip to reduce an effect of transient phenomenon at switching. The capacitance of the bypass capacitor is preset so as to be larger than a parasitic capacitance of the driver circuit to prevent the characteristic impedance of the power/ground line from being higher than the characteristic impedance of internal wiring.Type: ApplicationFiled: January 23, 2003Publication date: October 2, 2003Inventors: Kanji Otsuka, Tadatomo Suga, Tamotsu Usami
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Patent number: 6625005Abstract: In a semiconductor chip are arranged power pads, ground pads and signal pads. A ground line is provided which is formed as one in the vicinity of the chip and branches off at some distance from the chip. Signal lines and power lines are each formed over one of the branched ground lines. The signal lines and the power lines are extended radially together with the underlying ground lines. Each of the signal lines and the power lines are extended together with the corresponding ground line to form a stacked pair line.Type: GrantFiled: July 10, 2001Date of Patent: September 23, 2003Assignees: Kabushiki Kaisha Toshiba, Fujitsu Limited, Hitachi Ltd., Matsushita Electric Industrial Co., Ltd., Mitsubishi Electric Corp., NEC Corporation, Oki Electric Industry Co., Ltd., Kanji Otsuka, Rohm Co., Ltd., Sanyo Electric Co., Ltd., Sharp Kabushiki Kaisha, Sony Corporation, Tamotsu UsamiInventors: Kanji Otsuka, Tamotsu Usami
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Publication number: 20030143964Abstract: Signal transmission technology for transmitting 20-50 GHz band digital high speed signals, while keeping to the system structure and element structure of the prior art is provided. A signal transmission system is provided in which the driver and the receiver comprise the logic circuit and the memory circuit for a transistor extending an entire electronic circuit, and wherein the driver is connected to the receiver via a signal transmission line, and to the power source Vdd via the power source/ground transmission line, and the receiver circuits and the driver and receiver all have substantially differential input and differential output, and at the output terminal of the substantially differential output of the driver there are no connections to a power source or a ground and the receiver receives signals by detecting potential difference of a substantially differential input signal and there are no distribution wires in the signal transmission lines.Type: ApplicationFiled: January 29, 2003Publication date: July 31, 2003Inventors: Kanji Otsuka, Tamotsu Usami
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Publication number: 20030132821Abstract: An electronic device having a current switch type driver is provided. The current switch type driver includes a differential circuit that supplies a current to a transmission channel according to a signal. In the electronic device, a signal wire that transmits the signal to the differential circuit has a transmission channel structure.Type: ApplicationFiled: December 2, 2002Publication date: July 17, 2003Inventors: Kanji Otsuka, Tamotsu Usami
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Publication number: 20030006063Abstract: Signal wirings 22, 23 are formed on a pair of substrates 20, 21, and the substrates are joined together through an insulating layer 24 so that the signal wirings 22, 23 are placed in parallel and facing to each other. The surfaces of the overlapping faces of the signal wirings 22, 23 are made smooth, and the roughness of the same surfaces is smaller than the skin depth &dgr;s due to the skin effect, preferably less than one third, for minimizing the increase in the electric resistance due to the skin effect.Type: ApplicationFiled: August 27, 2002Publication date: January 9, 2003Inventors: Kanji Otsuka, Tamotsu Usami
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Publication number: 20020184426Abstract: A terminal resistor is provided at the end of a bus formed on a wiring substrate. An insulator having a large dielectric loss angle is provided in the vicinity of the terminal resistor to absorb high frequency electromagnetic waves in the vicinity. This arrangement permits successful transmission of digital signals in the GHz region using a conventional terminal resistor.Type: ApplicationFiled: February 22, 2002Publication date: December 5, 2002Inventors: Kanji Otsuka, Tamotsu Usami
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Patent number: 6476330Abstract: Signal wirings 22, 23 are formed on a pair of substrates 20, 21, and the substrates are joined together through an insulating layer 24 so that the signal wirings 22, 23 are placed in parallel and facing to each other. The surfaces of the overlapping faces of the signal wirings 22, 23 are made smooth, and the roughness of the same surfaces is smaller than the skin depth &dgr;s due to the skin effect, preferably less than one third, for minimizing the increase in the electric resistance due to the skin effect.Type: GrantFiled: December 8, 2000Date of Patent: November 5, 2002Assignees: Sanyo Electric Co., Ltd., Oki Electric Industry Co., Ltd., Sharp Kabushiki Kaisha, Sony Corporation, Kabushiki Kaisha Toshiba, NEC Corporation, Hitachi, Ltd., Fujitsu Limited, Matsushita Electronics Corporation, Mitsubishi Denki Kabushiki Kaisha, Rohm Co., Ltd.Inventors: Kanji Otsuka, Tamotsu Usami