Patents by Inventor Tariq Majid

Tariq Majid has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10358738
    Abstract: Various embodiments herein relate to methods and apparatus for electroplating metal on a substrate. In many cases, an electroplating process may be monitored to ensure that it is operating within a pre-defined processing window. This monitoring may involve application of a controlled potential between the substrate and a reference electrode after the electroplating process is substantially complete (e.g., after recessed features on the substrate are substantially filled). The current delivered to the substrate during application of the controlled potential is monitored, and a peak current is determined. This peak current, often referred to herein as the potential-controlled exit peak current, can be compared against an expected range to determine whether the electroplating process is operating as desired.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: July 23, 2019
    Assignee: Lam Research Corporation
    Inventors: Quan Ma, Shantinath Ghongadi, Zhian He, Bryan Pennington, Tariq Majid, Jonathan David Reid
  • Publication number: 20180080140
    Abstract: Various embodiments herein relate to methods and apparatus for electroplating metal on a substrate. In many cases, an electroplating process may be monitored to ensure that it is operating within a pre-defined processing window. This monitoring may involve application of a controlled potential between the substrate and a reference electrode after the electroplating process is substantially complete (e.g., after recessed features on the substrate are substantially filled). The current delivered to the substrate during application of the controlled potential is monitored, and a peak current is determined. This peak current, often referred to herein as the potential-controlled exit peak current, can be compared against an expected range to determine whether the electroplating process is operating as desired.
    Type: Application
    Filed: September 19, 2016
    Publication date: March 22, 2018
    Inventors: Quan Ma, Shantinath Ghongadi, Zhian He, Bryan Pennington, Tariq Majid, Jonathan David Reid
  • Patent number: 9685353
    Abstract: Chemical etching methods and associated modules for performing the removal of metal from the edge bevel region of a semiconductor wafer are described. The methods and systems provide the thin layer of pre-rinsing liquid before applying etchant at the edge bevel region of the wafer. The etchant is less diluted and diffuses faster through a thinned layer of rinsing liquid. An edge bevel removal embodiment involving that is particularly effective at reducing process time, narrowing the metal taper and allowing for subsequent chemical mechanical polishing, is disclosed.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: June 20, 2017
    Assignee: Novellus Systems, Inc.
    Inventors: Kousik Ganesan, Shantinath Ghongadi, Tariq Majid, Aaron Labrie, Steven T. Mayer
  • Patent number: 9677190
    Abstract: Certain embodiments disclosed herein pertain to methods and apparatus for electrodepositing material on a substrate. More particularly, a novel membrane for separating the anode from the cathode/substrate, and a method of using such a membrane are presented. The membrane includes at least an ion exchange layer and a charge separation layer. The disclosed embodiments are beneficial for maintaining relatively constant concentrations of species in the electrolyte over time, especially during idle (i.e., non-electroplating) times.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: June 13, 2017
    Assignee: Lam Research Corporation
    Inventors: Doyeon Kim, Shantinath Ghongadi, Yuichi Takada, Ludan Huang, Tariq Majid
  • Publication number: 20150122658
    Abstract: Certain embodiments disclosed herein pertain to methods and apparatus for electrodepositing material on a substrate. More particularly, a novel membrane for separating the anode from the cathode/substrate, and a method of using such a membrane are presented. The membrane includes at least an ion exchange layer and a charge separation layer. The disclosed embodiments are beneficial for maintaining relatively constant concentrations of species in the electrolyte over time, especially during idle (i.e., non-electroplating) times.
    Type: Application
    Filed: April 18, 2014
    Publication date: May 7, 2015
    Applicant: Lam Research Corporation
    Inventors: Doyeon Kim, Shantinath Ghongadi, Yuichi Takada, Ludan Huang, Tariq Majid
  • Publication number: 20140190529
    Abstract: Chemical etching methods and associated modules for performing the removal of metal from the edge bevel region of a semiconductor wafer are described. The methods and systems provide the thin layer of pre-rinsing liquid before applying etchant at the edge bevel region of the wafer. The etchant is less diluted and diffuses faster through a thinned layer of rinsing liquid. An edge bevel removal embodiment involving that is particularly effective at reducing process time, narrowing the metal taper and allowing for subsequent chemical mechanical polishing, is disclosed.
    Type: Application
    Filed: April 5, 2013
    Publication date: July 10, 2014
    Inventors: Kousik Ganesan, Shanthinath Ghongadi, Tariq Majid, Aaron Labrie, Steven T. Mayer
  • Patent number: 8419964
    Abstract: Chemical etching methods and associated modules for performing the removal of metal from the edge bevel region of a semiconductor wafer are described. The methods and systems provide the thin layer of pre-rinsing liquid before applying etchant at the edge bevel region of the wafer. The etchant is less diluted and diffuses faster through a thinned layer of rinsing liquid. An edge bevel removal embodiment involving that is particularly effective at reducing process time, narrowing the metal taper and allowing for subsequent chemical mechanical polishing, is disclosed.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: April 16, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Kousik Ganesan, Shanthinath Ghongadi, Tariq Majid, Aaron Labrie, Steven T. Mayer
  • Patent number: 8398831
    Abstract: Embodiments of a closed-contact electroplating cup assembly that may be rapidly cleaned while an electroplating system is on-line are disclosed. One disclosed embodiment comprises a cup assembly and a cone assembly, wherein the cup assembly comprises a cup bottom comprising an opening, a seal surrounding the opening, an electrical contact structure comprising a plurality of electrical contacts disposed around the opening, and an interior cup side that is tapered inwardly in along an axial direction of the cup from a cup top toward the cup bottom.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: March 19, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Shantinath Ghongadi, Robert Rash, Jeff Hawkins, Seshasayee Varadarajan, Tariq Majid, Kousik Ganesan, Bryan Buckalew, Brian Evans
  • Patent number: 8377268
    Abstract: Embodiments of a closed-contact electroplating cup are disclosed. One embodiment comprises a cup bottom comprising an opening, and a seal disposed on the cup bottom around the opening. The seal comprises a wafer-contacting peak located substantially at an inner edge of the seal. The embodiment also comprises an electrical contact structure disposed over a portion of the seal, wherein the electrical contact structure comprises an outer ring and a plurality of contacts extending inwardly from the outer ring, and wherein each contact has a generally flat wafer-contacting surface. The embodiment further comprises a wafer-centering mechanism configured to center a wafer in the cup.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: February 19, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Robert Rash, Shantinath Ghongadi, Kousik Ganesan, Zhian He, Tariq Majid, Jeff Hawkins, Seshasayee Varadarajan, Bryan Buckalew
  • Publication number: 20110233056
    Abstract: Embodiments of a closed-contact electroplating cup are disclosed. One embodiment comprises a cup bottom comprising an opening, and a seal disposed on the cup bottom around the opening. The seal comprises a wafer-contacting peak located substantially at an inner edge of the seal. The embodiment also comprises an electrical contact structure disposed over a portion of the seal, wherein the electrical contact structure comprises an outer ring and a plurality of contacts extending inwardly from the outer ring, and wherein each contact has a generally flat wafer-contacting surface. The embodiment further comprises a wafer-centering mechanism configured to center a wafer in the cup.
    Type: Application
    Filed: June 6, 2011
    Publication date: September 29, 2011
    Applicant: NOVELLUS SYSTEMS, INC.
    Inventors: Robert Rash, Shantinath Ghongadi, Kousik Ganesan, Zhian He, Tariq Majid, Jeff Hawkins, Seshasayee Varadarajan, Bryan Buckalew
  • Publication number: 20110181000
    Abstract: Embodiments of a closed-contact electroplating cup assembly that may be rapidly cleaned while an electroplating system is on-line are disclosed. One disclosed embodiment comprises a cup assembly and a cone assembly, wherein the cup assembly comprises a cup bottom comprising an opening, a seal surrounding the opening, an electrical contact structure comprising a plurality of electrical contacts disposed around the opening, and an interior cup side that is tapered inwardly in along an axial direction of the cup from a cup top toward the cup bottom.
    Type: Application
    Filed: April 4, 2011
    Publication date: July 28, 2011
    Applicant: NOVELLUS SYSTEMS, INC.
    Inventors: Shantinath Ghongadi, Robert Rash, Jeff Hawkins, Seshasayee Varadarajan, Tariq Majid, Kousik Ganesan, Bryan Buckalew, Brian Evans
  • Patent number: 7985325
    Abstract: Embodiments of a closed-contact electroplating cup are disclosed. One embodiment comprises a cup bottom comprising an opening, and a seal disposed on the cup bottom around the opening. The seal comprises a wafer-contacting peak located substantially at an inner edge of the seal. The embodiment also comprises an electrical contact structure disposed over a portion of the seal, wherein the electrical contact structure comprises an outer ring and a plurality of contacts extending inwardly from the outer ring, and wherein each contact has a generally flat wafer-contacting surface. The embodiment further comprises a wafer-centering mechanism configured to center a wafer in the cup.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: July 26, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Robert Rash, Shantinath Ghongadi, Kousik Ganesan, Zhian He, Tariq Majid, Jeff Hawkins, Seshasayee Varadarajan, Bryan Buckalew
  • Patent number: 7935231
    Abstract: Embodiments of a closed-contact electroplating cup assembly that may be rapidly cleaned while an electroplating system is on-line are disclosed. One disclosed embodiment comprises a cup assembly and a cone assembly, wherein the cup assembly comprises a cup bottom comprising an opening, a seal surrounding the opening, an electrical contact structure comprising a plurality of electrical contacts disposed around the opening, and an interior cup side that is tapered inwardly in along an axial direction of the cup from a cup top toward the cup bottom.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: May 3, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Shantinath Ghongadi, Robert Rash, Jeff Hawkins, Seshasayee Varadarajan, Tariq Majid, Kousik Ganesan, Bryan Buckalew, Brian Evans
  • Publication number: 20100055924
    Abstract: Chemical etching methods and associated modules for performing the removal of metal from the edge bevel region of a semiconductor wafer are described. The methods and systems provide the thin layer of pre-rinsing liquid before applying etchant at the edge bevel region of the wafer. The etchant is less diluted and diffuses faster through a thinned layer of rinsing liquid. An edge bevel removal embodiment involving that is particularly effective at reducing process time, narrowing the metal taper and allowing for subsequent chemical mechanical polishing, is disclosed.
    Type: Application
    Filed: August 27, 2008
    Publication date: March 4, 2010
    Inventors: Kousik Ganesan, Shanthinath Ghongadi, Tariq Majid, Aaron Labrie, Steven T. Mayer
  • Publication number: 20090107836
    Abstract: Embodiments of a closed-contact electroplating cup are disclosed. One embodiment comprises a cup bottom comprising an opening, and a seal disposed on the cup bottom around the opening. The seal comprises a wafer-contacting peak located substantially at an inner edge of the seal. The embodiment also comprises an electrical contact structure disposed over a portion of the seal, wherein the electrical contact structure comprises an outer ring and a plurality of contacts extending inwardly from the outer ring, and wherein each contact has a generally flat wafer-contacting surface. The embodiment further comprises a wafer-centering mechanism configured to center a wafer in the cup.
    Type: Application
    Filed: October 30, 2007
    Publication date: April 30, 2009
    Applicant: NOVELLUS SYSTEMS, INC.
    Inventors: Robert Rash, Shantinath Ghongadi, Kousik Ganesan, Zhian He, Tariq Majid, Jeff Hawkins, Seshasayee Varadarajan, Bryan Buckalew
  • Publication number: 20090107835
    Abstract: Embodiments of a closed-contact electroplating cup assembly that may be rapidly cleaned while an electroplating system is on-line are disclosed. One disclosed embodiment comprises a cup assembly and a cone assembly, wherein the cup assembly comprises a cup bottom comprising an opening, a seal surrounding the opening, an electrical contact structure comprising a plurality of electrical contacts disposed around the opening, and an interior cup side that is tapered inwardly in along an axial direction of the cup from a cup top toward the cup bottom.
    Type: Application
    Filed: October 31, 2007
    Publication date: April 30, 2009
    Applicant: NOVELLUS SYSTEMS, INC.
    Inventors: Shantinath Ghongadi, Robert Rash, Jeff Hawkins, Seshasayee Varadarajan, Tariq Majid, Kousik Ganesan, Bryan Buckalew, Brian Evans
  • Patent number: 6884335
    Abstract: A negative bias is applied to an integrated circuit wafer immersed in an electrolytic plating solution to generate a DC current. After about ten percent to sixty percent of the final layer thickness has formed in a first plating time, biasing is interrupted during short pauses during a second plating time to generate substantially zero DC current. The pauses are from about 2 milliseconds to 5 seconds long, and typically about 10 milliseconds to 500 milliseconds. Generally, about 2 pauses to 100 pauses are used, and typically about 3 pauses to 15 pauses. Generally, the DC current density during the second plating time is greater than the DC current density during the initial plating time. Typically, the integrated circuit wafer is rotated during electroplating. Preferably, the wafer is rotated at a slower rotation rate during the second plating time than during the first plating time.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: April 26, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Eric G. Webb, Jonathan D. Reid, John H. Sukamto, Sesha Varadarajan, Margolita M. Pollack, Bryan L. Buckalew, Tariq Majid
  • Publication number: 20040231996
    Abstract: A negative bias is applied to an integrated circuit wafer immersed in an electrolytic plating solution to generate a DC current. After about ten percent to sixty percent of the final layer thickness has formed in a first plating time, biasing is interrupted during short pauses during a second plating time to generate substantially zero DC current. The pauses are from about 2 milliseconds to 5 seconds long, and typically about 10 milliseconds to 500 milliseconds. Generally, about 2 pauses to 100 pauses are used, and typically about 3 pauses to 15 pauses. Generally, the DC current density during the second plating time is greater than the DC current density during the initial plating time. Typically, the integrated circuit wafer is rotated during electroplating. Preferably, the wafer is rotated at a slower rotation rate during the second plating time than during the first plating time.
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Applicant: Novellus Systems, Inc.
    Inventors: Eric G. Webb, Jonathan D. Reid, John H. Sukamto, Sesha Varadarajan, Margolita M. Pollack, Bryan L. Buckalew, Tariq Majid