Patents by Inventor Tatsuo Sasaoka

Tatsuo Sasaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11056632
    Abstract: A thermoelectric conversion substrate includes an insulating substrate and at least one thermoelectric conversion unit. The insulating substrate has a first surface and a second surface at both sides of the insulating substrate in a thickness direction. The at least one thermoelectric conversion unit is incorporated in the insulating substrate. The at least one thermoelectric conversion unit includes a first thermoelectric member, a second thermoelectric member, and a first electrode disposed on the first surface of the insulating substrate. The first thermoelectric member includes a first tubular member having insulation property and a first semiconductor filled in the first tubular member. The second thermoelectric member includes a second tubular member having insulation property and a second semiconductor filled in the second tubular member. The second semiconductor has carriers different from carriers of the first semiconductor.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: July 6, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takuji Aoyama, Satoshi Maeshima, Tatsuo Sasaoka, Junya Tanaka, Noboru Yamamoto
  • Patent number: 11011319
    Abstract: An electronic component includes an electronic element that includes a lead portion, a sealing body that seals the electronic element in a state where an end portion of the lead portion is exposed, a first current collector that is formed on the sealing body and is connected to the end portion, and a first terminal that includes a first portion which is sealed in the sealing body and is connected to the first current collector.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: May 18, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shinji Ishitani, Tatsuo Sasaoka, Renki Yamazaki
  • Patent number: 10679920
    Abstract: A semiconductor device with small variations in high frequency characteristics by suppressing variations in impedance while maintaining high heat radiation is provided. The semiconductor device including a semiconductor package having two terminals, a wiring board having an opening at which the semiconductor package is positioned and having two electrodes connected to the two terminals and a heat sink fixing the semiconductor package in which a center of the semiconductor package is decentered with respect to a center of the opening is used. Also, the semiconductor device in which a center of the two electrodes is decentered from a center of the opening is used.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: June 9, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hideki Niimi, Tatsuo Sasaoka
  • Patent number: 10629792
    Abstract: Wiring substrates include: an insulation resin layer; a conductor-wiring layer that is placed on a surface of the insulation resin layer; and a metal substrate that is placed on an opposite surface of the insulation resin layer and that covers an edge of the insulation resin layer. Also, methods for producing a wiring substrate include: (i) forming a recess on a wiring substrate including a conductor-wiring layer, an insulation resin layer, and a metal substrate that are stacked; and (ii) cutting at least a part of the recess of the wiring substrate by using at least one die to form at least one separated piece of the wiring substrate in which a part of an edge of the insulation resin layer is covered by the metal substrate.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: April 21, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Tatsuo Sasaoka
  • Publication number: 20190333707
    Abstract: An electronic component includes an electronic element that includes a lead portion, a sealing body that seals the electronic element in a state where an end portion of the lead portion is exposed, a first current collector that is formed on the sealing body and is connected to the end portion, and a first terminal that includes a first portion which is sealed in the sealing body and is connected to the first current collector.
    Type: Application
    Filed: March 12, 2019
    Publication date: October 31, 2019
    Inventors: SHINJI ISHITANI, TATSUO SASAOKA, RENKI YAMAZAKI
  • Publication number: 20190229029
    Abstract: A semiconductor device with small variations in high frequency characteristics by suppressing variations in impedance while maintaining high heat radiation is provided. The semiconductor device including a semiconductor package having two terminals, a wiring board having an opening at which the semiconductor package is positioned and having two electrodes connected to the two terminals and a heat sink fixing the semiconductor package in which a center of the semiconductor package is decentered with respect to a center of the opening is used. Also, the semiconductor device in which a center of the two electrodes is decentered from a center of the opening is used.
    Type: Application
    Filed: January 10, 2019
    Publication date: July 25, 2019
    Inventors: HIDEKI NIIMI, TATSUO SASAOKA
  • Publication number: 20190081229
    Abstract: A thermoelectric conversion substrate includes an insulating substrate and at least one thermoelectric conversion unit. The insulating substrate has a first surface and a second surface at both sides of the insulating substrate in a thickness direction. The at least one thermoelectric conversion unit is incorporated in the insulating substrate. The at least one thermoelectric conversion unit includes a first thermoelectric member, a second thermoelectric member, and a first electrode disposed on the first surface of the insulating substrate. The first thermoelectric member includes a first tubular member having insulation property and a first semiconductor filled in the first tubular member. The second thermoelectric member includes a second tubular member having insulation property and a second semiconductor filled in the second tubular member. The second semiconductor has carriers different from carriers of the first semiconductor.
    Type: Application
    Filed: November 14, 2018
    Publication date: March 14, 2019
    Inventors: TAKUJI AOYAMA, SATOSHI MAESHIMA, TATSUO SASAOKA, JUNYA TANAKA, NOBORU YAMAMOTO
  • Publication number: 20180366628
    Abstract: Wiring substrates include: an insulation resin layer; a conductor-wiring layer that is placed on a surface of the insulation resin layer; and a metal substrate that is placed on an opposite surface of the insulation resin layer and that covers an edge of the insulation resin layer. Also, methods for producing a wiring substrate include: (i) forming a recess on a wiring substrate including a conductor-wiring layer, an insulation resin layer, and a metal substrate that are stacked; and (ii) cutting at least a part of the recess of the wiring substrate by using at least one die to form at least one separated piece of the wiring substrate in which a part of an edge of the insulation resin layer is covered by the metal substrate.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 20, 2018
    Inventor: TATSUO SASAOKA
  • Publication number: 20170341188
    Abstract: To provide a solder material capable of performing soldering with high reliability while suppressing materials other than a solder metal to remain inside the solder after the soldering. Coil-shaped carbons are heated by electromagnetic waves by using a solder material in which coil-shaped carbons of 0.5 weight % to 1.5 weight % with respect to a weight of a solder paste are mixed, thereby performing soldering by heating the solder material itself.
    Type: Application
    Filed: April 4, 2017
    Publication date: November 30, 2017
    Inventors: SHINJI ISHITANI, MANABU GOKAN, TATSUO SASAOKA
  • Patent number: 9246073
    Abstract: A mounting structure is provided that can allow gaseous matter generated when performing a heat treatment to escape to outside efficiently. A mounting structure 10 includes a substrate 1 having electrodes 2a and 2b, an electronic component 3 having electrodes 21a and 21b, joints 15a and 15b that electrically connect the electrodes 2a and 2b of the substrate 1 and the electrodes 21a and 21b of the electronic component 3 and also fix the electronic component 3 to the surface of the substrate 1, and a convex portion 4 that abuts against the electrode 2a of the substrate 1 and the electrode 21a of the electronic component 3 and is used as a spacer.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: January 26, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Tatsuo Sasaoka, Kaori Toyoda, Kentaro Nishiwaki, Hiroki Ikeuchi, Hiroshi Nasu
  • Patent number: 9240369
    Abstract: An encapsulated semiconductor device includes: a first conduction path formative plate; a second conduction path formative plate joined to the first conduction path formative plate; a power element bonded to the first conduction path formative plate; a heatsink held by the first conduction path formative plate with an insulation sheet interposed between the heatsink and the first conduction path formative plate; and an encapsulation resin configured to encapsulate the first and second conduction path formative plates. A through hole or a lead gap is formed in a region of the first conduction path formative plate in contact with the insulation sheet. The insulation sheet is press-fitted into the through hole or the lead gap.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: January 19, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Masanori Minamio, Tatsuo Sasaoka
  • Publication number: 20150235928
    Abstract: An encapsulated semiconductor device includes: a first conduction path formative plate; a second conduction path formative plate joined to the first conduction path formative plate; a power element bonded to the first conduction path formative plate; a heatsink held by the first conduction path formative plate with an insulation sheet interposed between the heatsink and the first conduction path formative plate; and an encapsulation resin configured to encapsulate the first and second conduction path formative plates. A through hole or a lead gap is formed in a region of the first conduction path formative plate in contact with the insulation sheet. The insulation sheet is press-fitted into the through hole or the lead gap.
    Type: Application
    Filed: April 9, 2015
    Publication date: August 20, 2015
    Inventors: Masanori MINAMIO, Tatsuo SASAOKA
  • Patent number: 9030003
    Abstract: An encapsulated semiconductor device includes: a first conduction path formative plate (1); a second conduction path formative plate (5) joined to the first conduction path formative plate; a power element (12) bonded to the first conduction path formative plate; a heatsink (14) held by the first conduction path formative plate with an insulation sheet (13) interposed between the heatsink and the first conduction path formative plate; and an encapsulation resin (9) configured to encapsulate the first and second conduction path formative plates. A through hole (3) or a lead gap (1b) is formed in a region of the first conduction path formative plate in contact with the insulation sheet. The insulation sheet is press-fitted into the through hole or the lead gap.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: May 12, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Masanori Minamio, Tatsuo Sasaoka
  • Patent number: 9013029
    Abstract: A joined body which is formed by, first, an aqueous solution containing an oxide film remover is disposed on a junction region of a first metal plate. Then, with the aqueous solution remaining on the first metal plate, a second metal plate is placed on the first metal plate. Thereafter, a load is applied to junction regions of the first metal plate and the second metal plate in the vertical direction, thereby joining the first metal plate and the second metal plate together to form a junction portion.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: April 21, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Masanori Minamio, Tatsuo Sasaoka
  • Patent number: 8686545
    Abstract: A semiconductor device according to the present disclosure includes: a plate (13) having a through hole (15); a metal column (16) fixed to the through hole with an insulating member (17) interposed therebetween, and having a projection projecting from the upper surface of the plate; a semiconductor element (12) fixed to the projection; a lead frame (11) electrically connected to the semiconductor element; and a package (14) covering the semiconductor element, and also covering at least part of each of the plate, the metal column, and the lead frame. The lower surface (13b) of the plate is exposed from the package.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: April 1, 2014
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Tatsuo Sasaoka
  • Publication number: 20130221502
    Abstract: First, an aqueous solution (103) containing an oxide film remover is disposed on a junction region of a first metal plate (101). Then, with the aqueous solution (103) remaining on the first metal plate (101), a second metal plate (102) is placed on the first metal plate (101). Thereafter, a load is applied to junction regions of the first metal plate (101) and the second metal plate (102) in the vertical direction, thereby joining the first metal plate (101) and the second metal plate (102) together to form a junction portion (110). In this manner, a joined body is manufactured.
    Type: Application
    Filed: August 8, 2012
    Publication date: August 29, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Masanori Minamio, Tatsuo Sasaoka
  • Publication number: 20130056885
    Abstract: An encapsulated semiconductor device includes: a first conduction path formative plate (1); a second conduction path formative plate (5) joined to the first conduction path formative plate; a power element (12) bonded to the first conduction path formative plate; a heatsink (14) held by the first conduction path formative plate with an insulation sheet (13) interposed between the heatsink and the first conduction path formative plate; and an encapsulation resin (9) configured to encapsulate the first and second conduction path formative plates. A through hole (3) or a lead gap (1b) is formed in a region of the first conduction path formative plate in contact with the insulation sheet. The insulation sheet is press-fitted into the through hole or the lead gap.
    Type: Application
    Filed: March 26, 2012
    Publication date: March 7, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Masanori Minamio, Tatsuo Sasaoka
  • Patent number: 8240539
    Abstract: The joining apparatus includes a suction nozzle for holding an electronic component, a board stage for holding a circuit board in opposition to the electronic component, and an excimer ultraviolet lamp placed at an irradiation position between the positioned electronic component and circuit board. In such a joining apparatus, ultraviolet irradiation to Au bumps of the electronic component and ultraviolet irradiation to board electrodes of the circuit board are performed concurrently by the excimer ultraviolet lamp to execute a cleaning process of the two metallic portions. Thereafter, ultrasonic vibrations are imparted to the two metallic portions while those metallic portions are kept in contact with each other, by which metal joining between the two metallic portions is fulfilled.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: August 14, 2012
    Assignee: Panasonic Corporation
    Inventors: Kazushi Higashi, Tatsuo Sasaoka, Shinji Ishitani
  • Publication number: 20120161302
    Abstract: A semiconductor device according to the present disclosure includes: a plate (13) having a through hole (15); a metal column (16) fixed to the through hole with an insulating member (17) interposed therebetween, and having a projection projecting from the upper surface of the plate; a semiconductor element (12) fixed to the projection; a lead frame (11) electrically connected to the semiconductor element; and a package (14) covering the semiconductor element, and also covering at least part of each of the plate, the metal column, and the lead frame. The lower surface (13b) of the plate is exposed from the package.
    Type: Application
    Filed: July 21, 2011
    Publication date: June 28, 2012
    Inventors: Masanori Minamio, Tatsuo Sasaoka
  • Patent number: 7968800
    Abstract: A passive component incorporating interposer includes a double-sided circuit board (1) having a wiring layer (8) on both sides, a passive component (2) mounted on the wiring layer (8) on one surface of the double-sided circuit board (1), a second insulating layer (3) made of woven fabric or non-woven fabric or inorganic filler and thermosetting resin laminated on the surface of the double-sided circuit board (1) mounted with the passive component (2), a first insulating layer (4) made of woven fabric or non-woven fabric or inorganic filler and thermosetting resin laminated on the other surface of the double-sided circuit board (1) not mounted with the passive component (2), first and second wiring layers (5, 6) formed on the first and second insulating layers (3, 4), and a through hole (7) for electrically connecting the wiring layers (8) disposed on both surfaces of the double-sided circuit board (1) and the first and second wiring layers (5, 6), where the first wiring layer (5) is formed to enable mounting
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: June 28, 2011
    Assignee: Panasonic Corporation
    Inventors: Tatsuo Sasaoka, Yasuhiro Sugaya, Eiji Kawamoto, Kazuhiko Honjo, Toshiyuki Asahi, Chie Sasaki, Hiroaki Suzuki