Patents by Inventor Tatsushi Asakawa

Tatsushi Asakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5489910
    Abstract: An image display device having an electro-optical medium interposed between a pair of electrode substrates composing a matrix electrode, a driving circuit for driving the electro-optical medium by selectively applying a voltage on the matrix electrode and a reference voltage generator for supplying the driving circuit with a predetermined driving voltage. A noise compensating circuit is interposed between the driving circuit and the reference voltage generator, the noise compensating circuit detecting a noise in a voltage supplied from the reference voltage generator to the electro-optical medium at a predetermined noise detecting position, forming a noise compensating voltage having a first polarity reverse to a second polarity of the noise by using the noise, and supplying the noise compensating voltage to the driving circuit.
    Type: Grant
    Filed: September 28, 1994
    Date of Patent: February 6, 1996
    Assignee: Asahi Glass Company Ltd.
    Inventors: Takeshi Kuwata, Kohji Ikawa, Tatsushi Asakawa, Hiroshi Hasebe, Akira Nakazawa, Hideyuki Nagano, Takanori Ohnishi
  • Patent number: 4570115
    Abstract: The voltage regulator, entirely of monolithic integrated circuit construction, has an output voltage with a temperature gradient similar to that of the saturation and threshold voltages of liquid crystal elements. Constant current flows through temperature sensitive resistive elements in series with temperature insensitive resistance elements. The output voltage taken across at least a portion of the resistance elements has a voltage/temperature characteristic similar to that of the temperature sensitive elements. Both the level of the output voltage and the temperature gradient of the output voltage are independently controllable and independent of source voltage variations. Buffer circuits may be used between the output of the regulator and load, and sampling techniques are also used to conserve energy by duty cycle operation of higher current circuit elements.
    Type: Grant
    Filed: October 12, 1984
    Date of Patent: February 11, 1986
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventors: Toshiyuki Misawa, Tatsushi Asakawa
  • Patent number: 4465379
    Abstract: A circuit for compensation of timekeeping inaccuracies induced by ambient temperature variations. A bridge circuit having a temperature sensitive resistive element in one branch and a resistance of programmed variation in the other branch outputs a changing unbalanced voltage to drive a comparator. A change in polarity of the comparator output detects the ambient temperature and causes a counter controlling the programmed resistance to output signals to a timekeeping regulation circuit whereby timekeeping is made accurate. Initial corrections are made in the programmed resistance branch to adjust for off-design performance of the vibrator in the timepiece oscillator.
    Type: Grant
    Filed: May 22, 1980
    Date of Patent: August 14, 1984
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventors: Toshiyuki Misawa, Tatsushi Asakawa
  • Patent number: 4300224
    Abstract: An electronic timepiece comprising a fundamental frequency oscillator, a plurality of frequency divider stages, a timekeeping mechanism and display, includes circuitry for resetting and setting selective stages of the divider and thereby adding or subtracting timing pulses which are delivered to the timekeeping mechanism. A non-volatile memory stores data which terminates whether a divider stage is to be set or reset. Additionally, a plurality of circuit elements are selectively inserted to modify the circuit of the oscillator and to provide frequency adjustment. External contacts are provided for the inputting of data to memory and for measuring timing rate against an external standard.
    Type: Grant
    Filed: October 18, 1978
    Date of Patent: November 10, 1981
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventors: Yasunori Nakazaki, Tatsushi Asakawa
  • Patent number: 4272840
    Abstract: A semiconductor temperature compensation circuit for an electronic timepiece is provided. The temperature compensation circuit is characterized by a temperature detection circuit comprised of MOS transistors, at least two of which have distinct conductive coefficients for producing signals representative of variations in ambient temperature and a temperature signal converting means including MOS transistors for converting the temperature dependent signal into a temperature compensation value for effecting timing rate adjustment in an electronic timepiece. The temperature detection circuit and the temperature signal converter circuit are both formed of elements that can be monolithically integrated into the same substrate.
    Type: Grant
    Filed: November 22, 1978
    Date of Patent: June 9, 1981
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventors: Shinji Morozumi, Tatsushi Asakawa
  • Patent number: 4266178
    Abstract: A charge control circuit for regulating the current applied to a secondary battery utilized as a power supply in an electronic instrument is provided. The secondary battery is adapted to be charged to a predetermined voltage level in response to a charging current being applied thereto. A charging current is produced by a charging device, such as a solar battery. Voltage regulating circuitry is disposed intermediate the charging device and the secondary battery for detecting the voltage level of the secondary battery and, in response thereto, selectively regulating the application of the charging current to the voltage supply.
    Type: Grant
    Filed: October 5, 1977
    Date of Patent: May 5, 1981
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Tatsushi Asakawa
  • Patent number: 4258310
    Abstract: A voltage detection integrated circuit including a voltage regulation circuit for controlling the operation thereof is provided. The voltage detection integrated circuit includes a reference voltage circuit for producing a predetermined reference voltage, a voltage converter for converting a detected voltage for measurement and a comparator circuit for comparing the level of the reference voltage to the level of the converted voltage and for producing a comparison signal representative of the difference in voltage levels compared thereby. The voltage regulation circuit is coupled to the comparator circuit and the reference voltage circuit and/or voltage conversion circuit for selectively adjusting the level of the reference voltage produced by the reference voltage circuit and/or the converted voltage produced by the voltage converter, to thereby control the comparison signal produced by the comparator circuit.
    Type: Grant
    Filed: April 26, 1978
    Date of Patent: March 24, 1981
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventors: Tatsushi Asakawa, Shinji Morozumi
  • Patent number: 4242679
    Abstract: A liquid crystal display driving circuit arrangement that is formed entirely of elements that can be monolithically integrated in a circuit chip and that adjusts the effective voltage of the drive signals applied to the liquid crystal display cells in response to variations in external conditions is provided. A sensing circuit is adapted to produce a signal representative of a change in an external condition and in response thereto produce a sensing signal representative thereof. A pulse control circuit is adapted to detect the condition signal and in response thereto produce a control signal representative of a variation in effective voltage to be applied to the display cells. A driving circuit is coupled to a liquid crystal display for applying drive signals produced by display control circuit having a variable effective voltage.
    Type: Grant
    Filed: September 13, 1978
    Date of Patent: December 30, 1980
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventors: Shinji Morozumi, Yoshio Yamazaki, Tatsushi Asakawa, Yasunori Nakazaki
  • Patent number: 4184124
    Abstract: An operational amplifier wherein each of the active elements is comprised of complimentary coupled pairs of insulated gate type field effect transistors is provided. A first active stage and a second active stage are coupled together to perform a predetermined transfer function. Each active element in the first and second stages are insulated gate type field effect transistors that are coupled in complementary pairs with the first stage and second stage being coupled to define mirror pairs.
    Type: Grant
    Filed: April 12, 1977
    Date of Patent: January 15, 1980
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Tatsushi Asakawa