Patents by Inventor Tatsuya Miyakawa

Tatsuya Miyakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8653569
    Abstract: An electric-field blocking film is provided between a BL insulation film and BL insulation film of a transistor, and a blocking film includes those three layers. The electric-field blocking film blocks an electric field produced by a drain electrode, a source electrode, and an n+-Si film. Even if misalignment of the drain electrode, the source electrode, and the n+-Si film in each drive transistor varies to make a portion overlying an i-Si film larger, therefore, the electric field at this portion is blocked by the electric-field blocking film, thereby making a variation in characteristic smaller.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: February 18, 2014
    Assignee: Casio Computer Co., Ltd.
    Inventors: Yukio Kashio, Tatsuya Miyakawa
  • Publication number: 20110220896
    Abstract: An electric-field blocking film is provided between a BL insulation film and BL insulation film of a transistor, and a blocking film includes those three layers. The electric-field blocking film blocks an electric field produced by a drain electrode, a source electrode, and an n+-Si film. Even if misalignment of the drain electrode, the source electrode, and the n+-Si film in each drive transistor varies to make a portion overlying an i-Si film larger, therefore, the electric field at this portion is blocked by the electric-field blocking film, thereby making a variation in characteristic smaller.
    Type: Application
    Filed: September 28, 2010
    Publication date: September 15, 2011
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Tatsuya MIYAKAWA, Youkio Kashio
  • Patent number: 7583826
    Abstract: An image reading apparatus for reading an image pattern of a detecting object comprises a detecting surface on which a detecting object is placed, a sensor array having a plurality of sensors arranged to read an image pattern of the detecting object placed on the detecting surface, a first detection electrode, provided on at least an upper portion of the sensor array, having the detecting surface; a second detection electrode provided to be electrically insulated and spaced from the first detection electrode; a counter electrode provided to be opposite to the first detection electrode through an interlayer insulating film; signal voltage applying circuit which applies a signal voltage having a first signal waveform that varies periodically to the counter electrode to excite a second signal waveform to the first detection electrode through the interlayer insulating film, and contact detector which determines whether the detecting object brought into contact with the detecting surface is a specific detecting ob
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: September 1, 2009
    Assignee: Casio Computer Co., Ltd.
    Inventors: Yoshiaki Nakamura, Tatsuya Miyakawa, Shigeru Morikawa, Tomomi Iihama
  • Patent number: 7225986
    Abstract: An image reading system which reads the images of a detectable object comprising an image display device that has an image display area to display images having luminosity corresponding to the display gradation and radiates the display illumination according to this luminosity; a detection surface in which the entire image display area of the image display device is covered with a laminated layer arrangement and a detectable object is placed; an image reading device comprising a first sub-area in the detection surface on which the detectable object is placed and a second sub-area which consists of an area corresponding to at least a portion of the area of the image display area except for the first sub-area; and a plurality of photosensors arranged in a matrix form provided in the first sub-area and second sub-area which has uniform transmittance, wherein at least a portion of the display illumination is permeated and the image of the detectable object is read in the first sub-area.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: June 5, 2007
    Assignee: Casio Computer Co., Ltd.
    Inventors: Yasushi Mizutani, Tomomi Sawano, Yasuo Koshizuka, Tatsuya Miyakawa, Makoto Sasaki
  • Publication number: 20040184027
    Abstract: An image reading system which reads the images of a detectable object comprising an image display device that has an image display area to display images having luminosity corresponding to the display gradation and radiates the display illumination according to this luminosity; a detection surface in which the entire image display area of the image display device is covered with a laminated layer arrangement and a detectable object is placed; an image reading device comprising a first sub-area in the detection surface on which the detectable object is placed and a second sub-area which consists of an area corresponding to at least a portion of the area of the image display area except for the first sub-area; and a plurality of photosensors arranged in a matrix form provided in the first sub-area and second sub-area which has uniform transmittance, wherein at least a portion of the display illumination is permeated and the image of the detectable object is read in the first sub-area.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 23, 2004
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Yasushi Mizutani, Tomomi Sawano, Yasuo Koshizuka, Tatsuya Miyakawa, Makoto Sasaki
  • Publication number: 20040021786
    Abstract: An image reading apparatus for reading an image pattern of a detecting object comprises a detecting surface on which a detecting object is placed, a sensor array having a plurality of sensors arranged to read an image pattern of the detecting object placed on the detecting surface, a first detection electrode, provided on at least an upper portion of the sensor array, having the detecting surface; a second detection electrode provided to be electrically insulated and spaced from the first detection electrode; a counter electrode provided to be opposite to the first detection electrode through an interlayer insulating film; signal voltage applying circuit which applies a signal voltage having a first signal waveform that varies periodically to the counter electrode to excite a second signal waveform to the first detection electrode through the interlayer insulating film, and contact detector which determines whether the detecting object brought into contact with the detecting surface is a specific detecting ob
    Type: Application
    Filed: July 30, 2003
    Publication date: February 5, 2004
    Applicant: Casio Computer Co., Ltd.
    Inventors: Yoshiaki Nakamura, Tatsuya Miyakawa, Shigeru Morikawa, Tomomi Iihama
  • Patent number: 6500701
    Abstract: A protective film for protecting the channel region of a thin film transistor is formed by a dry etching treatment. Therefore, even if there is a defect in a semiconductor film, pin holes are not formed in a gate insulating film. It follows that the breakdown voltage of the gate insulating film is not lowered even if a scanning signal line, etc., including a gate electrode, are formed of only an Al-based metal film that does not have an anodic oxide film formed on the surface.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: December 31, 2002
    Assignee: Casio Computer Co., Ltd.
    Inventors: Toshiaki Higashi, Tatsuya Miyakawa
  • Publication number: 20010036680
    Abstract: A protective film for protecting the channel region of a thin film transistor is formed by a dry etching treatment. Therefore, even if there is a defect in a semiconductor film, pin holes are not formed in a gate insulating film. It follows that the breakdown voltage of the gate insulating film is not lowered even if a scanning signal line, etc. including a gate electrode is formed of only an A-based metal film having an anodic oxide film not formed on the surface.
    Type: Application
    Filed: April 20, 2001
    Publication date: November 1, 2001
    Applicant: Casio Computer Co., Ltd.
    Inventors: Toshiaki Higashi, Tatsuya Miyakawa
  • Patent number: 5328861
    Abstract: An amorphous semiconductor layer is deposited on an insulating substrate, and an excimer laser is radiated thereon, and thus the amorphous is crystallized. A silicon oxide layer is deposited on the semiconductor layer, and a silicon nitride layer is deposited on the silicon oxide layer to be thicker than the silicon oxide layer. Thereafter, a gate electrode is formed on the silicon nitride layer. Thus, there is provided a method for a thin film transistor having a good mobility of carriers and a good characteristic of a breakdown voltage in that a gate insulating film is formed of a double-layer structure having the silicon oxide and silicon nitride layers.
    Type: Grant
    Filed: October 29, 1992
    Date of Patent: July 12, 1994
    Assignee: Casio Computer Co., Ltd.
    Inventor: Tatsuya Miyakawa