Patents by Inventor Tatsuya Yamanaka

Tatsuya Yamanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120163858
    Abstract: What is provided is an image formation apparatus including: an image formation part provided inside a main body so that the image formation part may be attached to the main body and detached from the main body; a plurality of opening-closing parts which may be opened and closed to attach the image formation part to the main body or detach the image formation part from the main body; and a plurality of locking parts latching each of the plurality of opening-closing parts to the main body, wherein when one of the plurality of locking parts undergoes a releasing operation, an other one of the plurality of locking parts also undergoes a releasing operation.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 28, 2012
    Inventors: Hirokazu FUJII, Daijiro UENO, Hiroki TAKAHASHI, Tatsuya YAMANAKA
  • Publication number: 20120083121
    Abstract: Methods for polishing multiple dielectric layers to form replacement metal gate structures include a first chemical mechanical polish step to remove overburden and planarize a top layer to leave a planarized thickness over a gate structure. A second chemical mechanical polish step includes removal of the thickness to expose an underlying covered surface of a dielectric of the gate structure with a slurry configured to polish the top layer and the underlying covered surface substantially equally to accomplish a planar topography. A third chemical mechanical polish step is employed to remove the dielectric of the gate structure and expose a gate conductor.
    Type: Application
    Filed: January 25, 2011
    Publication date: April 5, 2012
    Applicants: JSR CORPORATION, INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Takashi Ando, Leslie Charns, Jason E. Cummings, Lukasz J. Hupka, Dinesh R. Koli, Tomohisa Konno, Mahadevaiyer Krishnan, Michael F. Lofaro, Jakub W. Nalaskowski, Masahiro Noda, Dinesh K. Penigalapati, Tatsuya Yamanaka
  • Publication number: 20120083125
    Abstract: Planarization methods include depositing a mask material on top of an overburden layer on a semiconductor wafer. The mask material is planarized to remove the mask material from up areas of the overburden layer to expose the overburden layer without removing the mask material from down areas. The exposed overburden layer is wet etched and leaves a thickness remaining over an underlying layer. Remaining portions of the mask layer and the exposed portions of the overburden layer are planarized to expose the underlying layer.
    Type: Application
    Filed: January 25, 2011
    Publication date: April 5, 2012
    Applicants: JSR CORPORATION, INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Leslie Charns, John M. Cotte, Jason E. Cummings, Lukasz J. Hupka, Dinesh R. Koli, Tomohisa Konno, Mahadevaiyer Krishnan, Michael F. Lafaro, Jakub W. Nalaskowski, Masahiro Noda, Dinesh K. Penigalapati, Tatsuya Yamanaka
  • Publication number: 20120083122
    Abstract: A polishing method includes polishing, in a first polish, a wafer to remove overburden and planarize a top layer leaving a portion remaining on an underlying layer. A second polishing step includes two phases. In a first phase, the top layer is removed and the underlying layer is exposed, with a top layer to underlying layer selectivity of between about 1:1 to about 2:1 to provide a planar topography. In a second phase, residual portions of the top layer are removed from a top of the underlying layer to ensure complete exposure of an underlying layer surface.
    Type: Application
    Filed: January 24, 2011
    Publication date: April 5, 2012
    Applicants: JSR CORPORATION, INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Leslie Charns, Jason E. Cummings, Lukasz J. Hupka, Dinesh R. Koli, Tomohisa Konno, Mahadevaiyer Krishnan, Michael F. Lofaro, Jakub W. Nalaskowski, Masahiro Noda, Dinesh K. Penigalapati, Tatsuya Yamanaka
  • Publication number: 20120083123
    Abstract: A planarization method includes planarizing a semiconductor wafer in a first chemical mechanical polish step to remove overburden and planarize a top layer leaving a thickness of top layer material over underlying layers. The top layer material is planarized in a second chemical mechanical polish step to further remove the top layer and expose underlying layers of a second material and a third material such that a selectivity of the top layer material to the second material to the third material is between about 1:1:1 to about 2:1:1 to provide a planar topography.
    Type: Application
    Filed: January 25, 2011
    Publication date: April 5, 2012
    Applicants: JSR CORPORATION, INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Josephine B. Chang, Leslie Charns, Jason E. Cummings, Michael A. Guillorn, Lukasz J. Hupka, Dinesh R. Koli, Tomohisa Konno, Mahadevaiyer Krishnan, Michael F. Lofaro, Jakub W. Nalaskowski, Masahiro Noda, Dinesh K. Penigalapati, Tatsuya Yamanaka
  • Patent number: 7893538
    Abstract: An insulating-film-forming composition for a semiconductor device comprising an organic silica sol with a carbon atom content of 11 to 17 atom % and an organic solvent is disclosed. The organic silica sol comprises a hydrolysis-condensation product P1 and a hydrolysis-condensation product P2. The hydrolysis-condensation product P1 is obtained by hydrolyzing and condensing (A) a silane monomer comprising a hydrolyzable group and (B) a polycarbosilane comprising a hydrolyzable group in the presence of (C) a basic catalyst, and the hydrolysis-condensation product P2 is obtained by hydrolyzing and condensing (D) a silane monomer comprising a hydrolyzable group.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: February 22, 2011
    Assignee: JSR Corporation
    Inventors: Hisashi Nakagawa, Tatsuya Yamanaka, Masahiro Akiyama, Terukazu Kokubo, Youhei Nobe
  • Publication number: 20100007025
    Abstract: An insulating-film-forming composition for a semiconductor device comprising an organic silica sol with a carbon atom content of 11 to 17 atom % and an organic solvent is disclosed. The organic silica sol comprises a hydrolysis-condensation product P1 and a hydrolysis-condensation product P2. The hydrolysis-condensation product P1 is obtained by hydrolyzing and condensing (A) a silane monomer comprising a hydrolyzable group and (B) a polycarbosilane comprising a hydrolyzable group in the presence of (C) a basic catalyst, and the hydrolysis-condensation product P2 is obtained by hydrolyzing and condensing (D) a silane monomer comprising a hydrolyzable group.
    Type: Application
    Filed: January 31, 2007
    Publication date: January 14, 2010
    Applicant: JSR CORPORATION
    Inventors: Hisashi Nakagawa, Tatsuya Yamanaka, Masahiro Akiyama, Terukazu Kokubo, Youhei Nobe
  • Patent number: 7556860
    Abstract: A laminate including: a first silica-based film; a second silica-based film; and an organic film, wherein the second silica-based film includes an organic group containing a carbon-carbon double bond or a carbon-carbon triple bond. A method of forming the laminate includes: forming a first coating for a first silica-based film on a substrate; forming a second coating for a second silica-based film on the first coating, the second coating including an organic group containing a carbon-carbon double bond or a carbon-carbon triple bond; forming a third coating for an organic film on the second coating; and curing a multilayer film including the first to third coatings.
    Type: Grant
    Filed: April 26, 2006
    Date of Patent: July 7, 2009
    Assignee: JSR Corporation
    Inventors: Masahiro Akiyama, Seitaro Hattori, Takahiko Kurosawa, Manabu Sekiguchi, Terukazu Kokubo, Michihiro Mita, Tatsuya Yamanaka, Masaki Obi
  • Publication number: 20080268264
    Abstract: A method of forming an organic silica film includes forming a coating including a silicon compound having an —Si—O—Si— structure and an —Si—CH2—Si— structure on a substrate, heating the coating, and curing the coating by applying ultraviolet radiation.
    Type: Application
    Filed: April 28, 2005
    Publication date: October 30, 2008
    Applicant: JSR CORPORATION
    Inventors: Masahiro Akiyama, Hisashi Nakagawa, Tatsuya Yamanaka, Atsushi Shiota, Takahiko Kurosawa
  • Publication number: 20060216531
    Abstract: A laminate including: a first silica-based film; a second silica-based film; and an organic film, wherein the second silica-based film includes an organic group containing a carbon-carbon double bond or a carbon-carbon triple bond. A method of forming the laminate includes: forming a first coating for a first silica-based film on a substrate; forming a second coating for a second silica-based film on the first coating, the second coating including an organic group containing a carbon-carbon double bond or a carbon-carbon triple bond; forming a third coating for an organic film on the second coating; and curing a multilayer film including the first to third coatings.
    Type: Application
    Filed: April 26, 2006
    Publication date: September 28, 2006
    Applicant: JSR CORPORATION
    Inventors: Masahiro Akiyama, Seitaro Hattori, Takahiko Kurosawa, Manabu Sekiguchi, Terukazu Kokubo, Michihiro Mita, Tatsuya Yamanaka, Masaki Obi