Abstract: An information processing apparatus has an objective variable acquirer configured to acquire a multi-dimensional objective variable, an objective variable dimension compressor configured to compress the number of dimensions of the objective variable, an explanatory variable acquirer configured to acquire an explanatory variable, and an influence degree calculator configured to set at least one of a basis characterizing the objective variable and a coefficient weighting the basis as a new objective variable and calculate an influence degree on the new objective variable by using the explanatory variable.

Abstract: A memory system includes a nonvolatile memory having memory blocks; and a controller configured to receive a request for writing user data from a host; select at least a first block having a first percentage of valid data among the memory blocks, determine a second percentage different from the first percentage on the basis of at least the first percentage of the valid data in the first block, determine a first ratio between a write amount of the user data in accordance with the request from the host and a write amount of the valid data in at least the first block on the basis of the second percentage determined, and write the user data and the valid data in the first block into the nonvolatile memory on the basis of the first ratio.

Abstract: According to one embodiment, a memory system is provided with a nonvolatile memory, a controller, a volatile memory and an address translation table. The address translation table includes a high level and a plurality of low levels. The high level indicates positions in the nonvolatile memory in which the low levels are recorded. The low levels indicate positions in the nonvolatile memory in which data is recorded. The controller holds the high level of the address translation table in the first area of the volatile memory, and shuts off the supply of power to the second area of the volatile memory based on a transition from a normal-power state to a low-power state.

Abstract: According to one embodiment, a nonvolatile memory having memory blocks, and a controller configured to select a first block and a second block among the memory blocks, determine a third percentage on the basis of a first percentage of valid data in the first block and a second percentage of valid data in the second block, determine a first ratio between a write amount of user data in accordance with a request from a host and a write amount of the valid data into the first block on the basis of the third percentage, and write the user data and the valid data in the first block into the nonvolatile memory on the basis of the first ratio.

Abstract: According to one embodiment, a nonvolatile memory having memory blocks, and a controller configured to select a first block and a second block among the memory blocks, determine a third percentage on the basis of a first percentage of valid data in the first block and a second percentage of valid data in the second block, determine a first ratio between a write amount of user data in accordance with a request from a host and a write amount of the valid data into the first block on the basis of the third percentage, and write the user data and the valid data in the first block into the nonvolatile memory on the basis of the first ratio.

Abstract: A nonvolatile memory having memory blocks, and a controller configured to select a first block and a second block among the memory blocks, determine a third percentage on the basis of a first percentage of valid data in the first block and a second percentage of valid data in the second block, determine a first ratio between a write amount of user data in accordance with a request from a host and a write amount of the valid data in the first block on the basis of the third percentage, and write the user data and the valid data in the first block into the nonvolatile memory on the basis of the first ratio.

Abstract: According to one embodiment, a memory system includes a nonvolatile memory, a buffer, a battery and a processing circuit. The battery stores energy supplied from the outside. The processing circuit, after start of the supply of energy from the outside, starts the acceptance of a request from the outside, starts a process in accordance with the accepted request, and restricts the amount of data in the buffer referring to a voltage of the battery. The process uses the buffer.

Abstract: During normal power operation, an erased free block is prepared in nonvolatile memory so that at least one erased free block is continuously available as a standby block. If a power failure occurs, volatile data and its address conversion information are written into the standby block in the nonvolatile memory.

Abstract: According to one embodiment, a nonvolatile memory having memory blocks, and a controller configured to select a first block and a second block among the memory blocks, determine a third percentage on the basis of a first percentage of valid data in the first block and a second percentage of valid data in the second block, determine a first ratio between a write amount of user data in accordance with a request from a host and a write amount of the valid data into the first block on the basis of the third percentage, and write the user data and the valid data in the first block into the nonvolatile memory on the basis of the first ratio.

Abstract: According to one embodiment, a memory system includes a nonvolatile memory, a buffer, a battery and a processing circuit. The battery stores energy supplied from the outside. The processing circuit, after start of the supply of energy from the outside, starts the acceptance of a request from the outside, starts a process in accordance with the accepted request, and restricts the amount of data in the buffer referring to a voltage of the battery. The process uses the buffer.

Abstract: During normal power operation, an erased free block is prepared in nonvolatile memory so that at least one erased free block is continuously available as a standby block. If a power failure occurs, volatile data and its address conversion information are written into the standby block in the nonvolatile memory.

Abstract: During normal power operation, an erased free block is prepared in nonvolatile memory so that at least one erased free block is continuously available as a standby block. If a power failure occurs, volatile data and its address conversion information are written into the standby block in the nonvolatile memory.

Abstract: According to one embodiment, a memory system is provided with a nonvolatile memory, a controller, a volatile memory and an address translation table. The address translation table includes a high level and a plurality of low levels. The high level indicates positions in the nonvolatile memory in which the low levels are recorded. The low levels indicate positions in the nonvolatile memory in which data is recorded. The controller holds the high level of the address translation table in the first area of the volatile memory, and shuts off the supply of power to the second area of the volatile memory based on a transition from a normal-power state to a low-power state.

Abstract: A memory device connectable to a host device includes a non-volatile semiconductor memory unit including a plurality of memory blocks, each of the memory blocks including a plurality of pages, and a control unit configured to carry out data writing in the non-volatile semiconductor memory unit in units of a page and data erasing in the non-volatile semiconductor memory unit. When the control unit carries out data writing of a plurality of pages, the control unit splits data erasing of one memory block into a plurality of sub erasing steps and carries out one sub erasing step between the data writing of pages.

Abstract: During normal power operation, an erased free block is prepared in nonvolatile memory so that at least one erased free block is continuously available as a standby block. If a power failure occurs, volatile data and its address conversion information are written into the standby block in the nonvolatile memory.

Abstract: During normal power operation, an erased free block is prepared in nonvolatile memory so that at least one erased free block is continuously available as a standby block. If a power failure occurs, volatile data and its address conversion information are written into the standby block in the nonvolatile memory.

Abstract: During normal power operation, an erased free block is prepared in nonvolatile memory so that at least one erased free block is continuously available as a standby block. If a power failure occurs, volatile data and its address conversion information are written into the standby block in the nonvolatile memory.

Abstract: An efficient retransmission control method, whereby a wasteful retransmission request and retransmission of a packet are not carried out when packet loss occurs. A receiving unit sends the received retransmission request information to a retransmission determining unit. When receiving the retransmission request information, the retransmission determining unit reads out refresh data time information, packet type information of the packet for which a retransmission request is issued, and the time information thereof from a packet information monitoring unit. The retransmission determining unit makes a determination as to whether or not to issue a retransmission request using the read-out refresh data time information, packet type information of the packet for which a retransmission request is issued, and the time information thereof.

Abstract: During an incoming call, when a client apparatus of an incoming side notifies a client apparatus of an outgoing side of hold of the incoming call, the client apparatus notifies the client apparatus of the hold of the incoming call with OK message which is a response to an INVITE message.

Abstract: When mobile communication exchange detects that SIP client has moved out of communication area of base station, the mobile communication exchange generates a BYE message, sends the generated BYE message to SIP client and ends a session.