Patents by Inventor Teppei Nakano
Teppei Nakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240035141Abstract: A substrate processing method includes an oxidation step of heating a plurality of substrates inside an oxidation space while supplying an oxygen gas or an ozone gas to the plurality of substrates to change surface layers of molybdenum films to molybdenum trioxide, a first transfer step of transferring the plurality of substrates inside the oxidation space to an etching space inside the substrate processing apparatus differing from the oxidation space, and an etching step of supplying an etching liquid to the plurality of substrates inside the etching space to make the surface layers that changed to the molybdenum trioxide dissolve in the etching liquid while leaving, on the substrate, portions other than the surface layers of the molybdenum films.Type: ApplicationFiled: July 28, 2023Publication date: February 1, 2024Inventors: Teppei NAKANO, Takayoshi TANAKA, Shota IWAHATA, Hiroyuki YASHIKI
-
Patent number: 10843223Abstract: A substrate processing method includes a rinse liquid supplying step of supplying a rinse liquid containing water to a major surface of a substrate, a rotating step of rotating the substrate around a rotation axis passing through a central portion of the major surface of the substrate, and a hydrophobizing agent supplying step of supplying a hydrophobizing agent containing a first dissolving agent to the major surface of the substrate to replace a liquid held on the major surface of the substrate with the hydrophobizing agent in parallel with the rotating step after the rinse liquid supplying step is performed, and the hydrophobizing agent supplying step includes a hydrophobizing agent discharging step of discharging a continuous flow of the hydrophobizing agent from a discharge port of a nozzle toward the major surface of the substrate held by a substrate holding unit with a Reynolds number at the discharge port being not more than 1500.Type: GrantFiled: May 30, 2018Date of Patent: November 24, 2020Assignee: SCREEN Holdings Co., Ltd.Inventors: Takayoshi Tanaka, Tetsuya Emoto, Akira Oato, Yuta Nakano, Teppei Nakano, Takashi Akiyama, Yuya Tsuchihashi, Reo Tamura, Atsuro Eitoku, Tomomi Iwata
-
Publication number: 20180345315Abstract: A substrate processing method includes a rinse liquid supplying step of supplying a rinse liquid containing water to a major surface of a substrate, a rotating step of rotating the substrate around a rotation axis passing through a central portion of the major surface of the substrate, and a hydrophobizing agent supplying step of supplying a hydrophobizing agent containing a first dissolving agent to the major surface of the substrate to replace a liquid held on the major surface of the substrate with the hydrophobizing agent in parallel with the rotating step after the rinse liquid supplying step is performed, and the hydrophobizing agent supplying step includes a hydrophobizing agent discharging step of discharging a continuous flow of the hydrophobizing agent from a discharge port of a nozzle toward the major surface of the substrate held by a substrate holding unit with a Reynolds number at the discharge port being not more than 1500.Type: ApplicationFiled: May 30, 2018Publication date: December 6, 2018Inventors: Takayoshi TANAKA, Tetsuya EMOTO, Akira OATO, Yuta NAKANO, Teppei NAKANO, Takashi AKIYAMA, Yuya TSUCHIHASHI, Reo TAMURA, Atsuro EITOKU, Tomomi IWATA
-
Patent number: 9185310Abstract: According to one embodiment, a solid-state imaging device includes an illuminance value calculating unit and an illuminance value output unit. The illuminance value calculating unit calculates an illuminance value based on an integration result of luminance values. The illuminance value output unit outputs the illuminance value calculated by the illuminance value calculating unit by setting, as a target, a subject image obtained through application of one of two or more illuminance measurement conditions. The two or more illuminance measurement conditions are set in advance by varying at least one of an electronic shutter time and an analog gain.Type: GrantFiled: January 30, 2013Date of Patent: November 10, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Teppei Nakano, Keizo Tashiro, Junichi Hosokawa, Naoto Mihara
-
Patent number: 9092845Abstract: According to one embodiment, a condition judging unit judges whether a target pixel corresponds to a defect condition based on a signal of the target pixel and a signal of a horizontal peripheral pixel. A signal substituting unit performs signal substitution on the target pixel corresponding to the defect condition. When the condition judging unit judges that at least one of a vertical peripheral pixel and an oblique peripheral pixel corresponds to the defect condition, the signal substituting unit stops the signal substitution on the target pixel.Type: GrantFiled: January 30, 2013Date of Patent: July 28, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Teppei Nakano, Keizo Tashiro
-
Patent number: 8917348Abstract: According to one embodiment, a solid-state imaging device includes a luminance integrating unit, a luminance observation value calculating unit, and an illuminance value conversion unit. The luminance integrating unit integrates a luminance value detected for every pixel. The luminance observation value calculating unit calculates a luminance observation value based on an integration result in the luminance integrating unit. The luminance observation value is an observation result of the luminance for an entire imaging screen. The illuminance value conversion unit converts the luminance observation value to an illuminance value. The luminance integrating unit integrates the luminance value discriminated in accordance with a condition set with respect to a luminance level.Type: GrantFiled: July 25, 2012Date of Patent: December 23, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Naoto Mihara, Teppei Nakano
-
Patent number: 8885072Abstract: According to one embodiment, a solid-state imaging device includes an output level determining unit, a random number data generating unit, and an output selecting unit. The output level determining unit performs a level determination of a digital output signal by comparing a level of the digital output signal with a threshold value. The random number data generating unit generates random number data by random number processing on the level of the digital output signal. The output selecting unit selects any of: the digital output signal subjected to an addition of the random number data, and the digital output signal not subjected to the addition of the random number data corresponding to a result of the level determination.Type: GrantFiled: June 24, 2013Date of Patent: November 11, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Shiroshi Kanemitsu, Teppei Nakano, Hidetoshi Kono
-
Publication number: 20140204256Abstract: According to one embodiment, a solid-state imaging device includes an output level determining unit, a random number data generating unit, and an output selecting unit. The output level determining unit performs a level determination of a digital output signal by comparing a level of the digital output signal with a threshold value. The random number data generating unit generates random number data by random number processing on the level of the digital output signal. The output selecting unit selects any of: the digital output signal subjected to an addition of the random number data, and the digital output signal not subjected to the addition of the random number data corresponding to a result of the level determination.Type: ApplicationFiled: June 24, 2013Publication date: July 24, 2014Inventors: Shiroshi KANEMITSU, Teppei Nakano, Hidetoshi Kono
-
Patent number: 8711262Abstract: A solid-state image sensing device includes an image sensing region having pixels arranged in a two-dimensional array. A vertical shift register circuit selects a desired pixel row of the pixels by changing the number of one or more clock signals supplied and timing thereof in one horizontal period. A pulse selector circuit supplies a drive pulse to the desired pixel row selected by the vertical shift register circuit.Type: GrantFiled: February 3, 2010Date of Patent: April 29, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Teppei Nakano, Motohiro Morisaki
-
Publication number: 20130229552Abstract: According to one embodiment, a solid-state imaging device includes an illuminance value calculating unit and an illuminance value output unit. The illuminance value calculating unit calculates an illuminance value based on an integration result of luminance values. The illuminance value output unit outputs the illuminance value calculated by the illuminance value calculating unit by setting, as a target, a subject image obtained through application of one of two or more illuminance measurement conditions. The two or more illuminance measurement conditions are set in advance by varying at least one of an electronic shutter time and an analog gain.Type: ApplicationFiled: January 30, 2013Publication date: September 5, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Teppei NAKANO, Keizo Tashiro, Junichi Hosokawa, Naoto Mihara
-
Patent number: 8482631Abstract: According to one embodiment, a false color mask signal generation circuit generates a false color pixel mask signal to exclude false color component pixels based on an edge component signal from an edge component extraction circuit. A white balance gain calculation circuit calculates a white balance gain from an integrated value calculated by the false color component pixels being excluded based on the false color pixel mask signal.Type: GrantFiled: March 16, 2011Date of Patent: July 9, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Akira Yoshino, Keiichiro Yanagida, Teppei Nakano
-
Patent number: 8451357Abstract: According to one embodiment, a solid-state imaging sensor includes an imaging area, a vertical selector circuit, a pulse selector circuit and a timing generator circuit. The vertical selector circuit is provided with one row address comparator circuit corresponding to each of pixel rows. The row address comparator circuit is supplied with a row address in time division within one horizontal scanning interval with respect to the imaging area. Based on the comparison result of the row address comparator circuit, the vertical selector circuit outputs an electronic shutter row select signal and a read row select signal for setting an electronic shutter state and a read state of the corresponding pixel row.Type: GrantFiled: May 26, 2010Date of Patent: May 28, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Teppei Nakano
-
Publication number: 20130093930Abstract: According to one embodiment, a solid-state imaging device includes a luminance integrating unit, a luminance observation value calculating unit, and an illuminance value conversion unit. The luminance integrating unit integrates a luminance value detected for every pixel. The luminance observation value calculating unit calculates a luminance observation value based on an integration result in the luminance integrating unit. The luminance observation value is an observation result of the luminance for an entire imaging screen. The illuminance value conversion unit converts the luminance observation value to an illuminance value. The luminance integrating unit integrates the luminance value discriminated in accordance with a condition set with respect to a luminance level.Type: ApplicationFiled: July 25, 2012Publication date: April 18, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Naoto MIHARA, Teppei NAKANO
-
Patent number: 8330838Abstract: A shading correcting device includes a correction-coefficient interpolation unit that calculates a color shading correction coefficient used at a position of a pixel at which the color shading correction coefficient is not set among pixels in an image signal by an interpolation process using a color shading correction coefficient set at a predetermined position. A color shading correction coefficient sent to the correction-coefficient interpolation unit is a color shading correction coefficient that is for a first color and corresponds to a pixel value of a second color adjacent to a pixel of the first color.Type: GrantFiled: September 10, 2009Date of Patent: December 11, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Teppei Nakano, Keizo Tashiro
-
Publication number: 20120288144Abstract: According to one embodiment, an image processing apparatus includes an integrator and a motion determination unit. The motion determination unit determines movement of an object. The integrator integrates information on a first frame in a unit domain in the image of each frame, and integrates information on a second frame while inverting a sign of a signal level in the integration of the first frame. The motion determination unit makes the motion determination in the unit domain according to the integration result of the integrator.Type: ApplicationFiled: March 7, 2012Publication date: November 15, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Keiichiro Yanagida, Akira Yoshino, Teppei Nakano
-
Patent number: 8077253Abstract: An analog signal photo-electrically converted in a pixel of a light receiving area is converted to a digital signal by an ADC. The digital signal is processed by a digital signal processing circuit, and then, successively output as a digital video signal. The digital signal processing circuit has a first signal processing block for detecting and correcting a pixel defect and preventing a noise, and a second signal processing block for restoring apparent resolution lost by the processing by the first signal processing block.Type: GrantFiled: June 16, 2009Date of Patent: December 13, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Junichi Hosokawa, Yuuki Koguchi, Keizo Tashiro, Teppei Nakano
-
Publication number: 20110273583Abstract: According to one embodiment, a false color mask signal generation circuit generates a false color pixel mask signal to exclude false color component pixels based on an edge component signal from an edge component extraction circuit. A white balance gain calculation circuit calculates a white balance gain from an integrated value calculated by the false color component pixels being excluded based on the false color pixel mask signal.Type: ApplicationFiled: March 16, 2011Publication date: November 10, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Akira YOSHINO, Keiichiro YANAGIDA, Teppei NAKANO
-
Publication number: 20100302421Abstract: According to one embodiment, a solid-state imaging sensor includes an imaging area, a vertical selector circuit, a pulse selector circuit and a timing generator circuit. The vertical selector circuit is provided with one row address comparator circuit corresponding to each of pixel rows. The row address comparator circuit is supplied with a row address in time division within one horizontal scanning interval with respect to the imaging area. Based on the comparison result of the row address comparator circuit, the vertical selector circuit outputs an electronic shutter row select signal and a read row select signal for setting an electronic shutter state and a read state of the corresponding pixel row.Type: ApplicationFiled: May 26, 2010Publication date: December 2, 2010Inventor: Teppei NAKANO
-
Publication number: 20100201858Abstract: A solid-state image sensing device includes an image sensing region having pixels arranged in a two-dimensional array. A vertical shift register circuit selects a desired pixel row of the pixels by changing the number of one or more clock signals supplied and timing thereof in one horizontal period. A pulse selector circuit supplies a drive pulse to the desired pixel row selected by the vertical shift register circuit.Type: ApplicationFiled: February 3, 2010Publication date: August 12, 2010Inventors: Teppei Nakano, Motohiro Morisaki
-
Publication number: 20100097504Abstract: A shading correcting device includes a correction-coefficient interpolation unit that calculates a color shading correction coefficient used at a position of a pixel at which the color shading correction coefficient is not set among pixels in an image signal by an interpolation process using a color shading correction coefficient set at a predetermined position. A color shading correction coefficient sent to the correction-coefficient interpolation unit is a color shading correction coefficient that is for a first color and corresponds to a pixel value of a second color adjacent to a pixel of the first color.Type: ApplicationFiled: September 10, 2009Publication date: April 22, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Teppei NAKANO, Keizo Tashiro