Abstract: A current mode power conversion system and method operates in cycles. Each cycle includes an on time and an off time. The system includes an inductor connected to store energy during the on time of each cycle and use the energy during the off time of each cycle. The system provides a stable output voltage and a maximum-limited output current to a load during constant load conditions. The system comprises a feedback control linearly operable so as to control the output voltage across the load during constant load conditions, and non-linearly operable so as to control the output voltage across the load during certain detected changes in load conditions as a function of the derivative of the current in the inductor so as to speed up the transient response of the power conversion system when a fault condition exists.

Abstract: A current mode power conversion system and method operates in cycles. Each cycle includes an on time and an off time. The system includes an inductor connected to store energy during the on time of each cycle and use the energy during the off time of each cycle. The system provides a stable output voltage and a maximum-limited output current to a load during constant load conditions. The system comprises a feedback control linearly operable so as to control the output voltage across the load during constant load conditions, and non-linearly operable so as to control the output voltage across the load during certain detected changes in load conditions as a function of the derivative of the current in the inductor so as to speed up the transient response of the power conversion system when a fault condition exists.

Abstract: A signal regulator includes a switching circuit, a controller, and a threshold generator. The switching circuit generates a regulated output voltage, and the controller activates the switching circuit for a predetermined time when the regulated output signal has a predetermined relationship to a threshold voltage. The threshold generator generates the threshold voltage in response to the controller. Generating the threshold voltage in response to the switching controller can reduce the effect that noise has on the operation of the switching circuit, and can thus decrease the magnitude of the noise-induced jitter in the regulator's steady-state switching frequency as compared to conventional switching regulators.

Abstract: To prevent a voltage glitch in the regulated DC output voltage of a PWM/PFM DC-DC converter when switching between PFM and PMW modes, the error amplifier of the converter's PWM regulation path is provided with a DC voltage offset correction mechanism. This mechanism “zeros-out” DC voltage offsets that may be present in the voltage regulation path, thereby enabling the error amplifier to accurately regulate the converter's output voltage. When the converter transitions between PFM and PWM modes, the DC offset correction mechanism establishes initial conditions of the error amplifier that effectively ensure that the converter's regulated output voltage at the beginning of a new “switched-to” PWM mode cycle is DC offset-free.

Abstract: A dual-output voltage regulator is disclosed, which provides a first terminal voltage and a second terminal voltage to DDR DRAM. The dual-output voltage regulator comprises a first regulator unit for receiving an input voltage and providing the first terminal voltage via a first transistor unit; and a second regulator unit for receiving the input voltage and the first terminal voltage in order to output the second terminal voltage, wherein the second terminal voltage is half of the first terminal voltage.

Abstract: A signal regulator includes a switching circuit, a controller, and a threshold generator. The switching circuit generates a regulated output voltage, and the controller activates the switching circuit for a predetermined time when the regulated output signal has a predetermined relationship to a threshold voltage. The threshold generator generates the threshold voltage in response to the controller. Generating the threshold voltage in response to the switching controller can reduce the affect that noise has on the operation of the switching circuit, and can thus decrease the magnitude of the noise-induced jitter in the regulator's steady-state switching frequency as compared to conventional switching regulators.

Abstract: A constant ON-time controller for a buck converter utilizes dual symmetrical ramps. The ramps may be generated artificially or by sensing the voltage across a sense resistor in the output. The ramp may also be generated by sensing the voltage across the “ON” resistance of the low side FET in the switching regulator. A modified output voltage has one of the ramps superimposed and a modified reference voltage has the other ramps superimposed. The modified output voltage and the modified reference voltage are compared to determine when to start the ON-time of the buck converter. The dual ramps reduce, noise susceptibility. The ON-time is stopped in response to charging a capacitor with the regulator input voltage. An offset may also be generated representing the difference between the average output voltage and the reference voltage. The offset is used to generate a modified reference to compensate for the offset.

Abstract: A plurality of constant ON-time buck converters are coupled to a common load. The output of each buck converter is coupled to a common load via a series sense resistor. The regulated output voltage across the common load is compared to a reference voltage to generate a start signal. The start signal is alternately coupled to the controller on each buck converter. The ON-time of a master buck converter is terminated when a ramp signal generated from the regulator input voltage exceeds the reference voltage. All other slave converters have an ON-time pulse started by the start signal and stopped by comparing a sense voltage corresponding to their output current during their ON-time pulse to the peak current in the master converter during its ON-time. A counting circuit with an output corresponding to each of the plurality of buck converters is used to select which buck converter receives the start signal.

Abstract: A compensated reference voltage for the controller of a buck regulator corrects for offsets and controls the rate at which the output load current can change in response to a change in the reference setting output voltage level of the buck converter. A current source is coupled to a resistor that has one terminal connected to the ground potential of the output voltage. The voltage across this resistor generates a remote reference voltage. A feedback current is generated as a function of the difference between the remote reference voltage and the output voltage. The feedback current is time integrated to form the compensated reference, which is used to control the ON-time of the buck converter.

Abstract: A dual-output voltage regulator is disclosed, which provides a first terminal voltage and a second terminal voltage to DDR DRAM. The dual-output voltage regulator comprises a first regulator unit for receiving an input voltage and providing the first terminal voltage via a first transistor unit; and a second regulator unit for receiving the input voltage and the first terminal voltage in order to output the second terminal voltage, wherein the second terminal voltage is half of the first terminal voltage.