Patents by Inventor Terry J. Hrabik

Terry J. Hrabik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7167485
    Abstract: An arbitration unit according to an embodiment of the present invention is disclosed. The arbitration unit includes an allocation unit that assigns a first number of slots in a frame to a first flow and a second number of slots in the frame to a second flow. The arbitration unit includes a scheduling unit that assigns first slot positions to the first number of slots in the frame and second slot positions to the second number of slots in the frame using a binary distribution tree.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: January 23, 2007
    Assignee: Tellabs Operations, Inc.
    Inventors: Terry J. Hrabik, Robert B. Magill, Ravi Chandran, Kent D. Benson
  • Patent number: 7072295
    Abstract: In allocating bandwidth to data for transfer through a network device, bandwidth is allocated to committed data traffic based on a guaranteed data transfer rate and a queue size of the network device, and bandwidth is allocated to uncommitted data traffic using a weighted maximum/minimum process. The weighted maximum/minimum process allocates bandwidth to the uncommitted data traffic in proportion to a weight associated with the uncommitted data traffic.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: July 4, 2006
    Assignee: Tellabs Operations, Inc.
    Inventors: Kent D. Benson, Robert B. Magill, Terry J. Hrabik, John B. Kenney
  • Patent number: 6915372
    Abstract: A data routing mechanism is disclosed. The data routing mechanism includes virtual output queues (VOQs), corresponding to a first input port, that store data to be sent to one of a first and second output port. The data routing mechanism includes VOQs, corresponding to a second input port, that store data to be sent to one of the first and second output port. The data routing mechanism includes a switch fabric that includes a plurality of buffers at crosspoints between the first and second input ports and the first and second output ports. The data routing mechanism includes a first input scheduler that transmits a first data from the VOQs corresponding to the first input port to one of the plurality of buffers based on lengths of the VOQs corresponding to the first input port and a credit state of the plurality of buffers.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: July 5, 2005
    Assignee: Tellabs Operations, Inc.
    Inventors: Robert B. Magill, Terry J. Hrabik, Tara Javidi
  • Publication number: 20030112750
    Abstract: An arbitration unit according to an embodiment of the present invention is disclosed. The arbitration unit includes an allocation unit that assigns a first number of slots in a frame to a first flow and a second number of slots in the frame to a second flow. The arbitration unit includes a scheduling unit that assigns first slot positions to the first number of slots in the frame and second slot positions to the second number of slots in the frame using a binary distribution tree.
    Type: Application
    Filed: December 17, 2001
    Publication date: June 19, 2003
    Inventors: Terry J. Hrabik, Robert B. Magill, Ravi Chandran, Kent D. Benson
  • Publication number: 20020044546
    Abstract: A data routing mechanism is disclosed. The data routing mechanism includes virtual output queues (VOQs), corresponding to a first input port, that store data to be sent to one of a first and second output port. The data routing mechanism includes VOQs, corresponding to a second input port, that store data to be sent to one of the first and second output port. The data routing mechanism includes a switch fabric that includes a plurality of buffers at crosspoints between the first and second input ports and the first and second output ports. The data routing mechanism includes a first input scheduler that transmits a first data from the VOQs corresponding to the first input port to one of the plurality of buffers based on lengths of the VOQs corresponding to the first input port and a credit state of the plurality of buffers.
    Type: Application
    Filed: June 8, 2001
    Publication date: April 18, 2002
    Inventors: Robert B. Magill, Terry J. Hrabik, Tara Javidi