Patents by Inventor Terry K. Daly

Terry K. Daly has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7935607
    Abstract: According to one aspect of the present invention, a method of forming a microelectronic assembly, such as an integrated passive device (IPD) (72), is provided. An insulating dielectric layer (32) having a thickness (36) of at least 4 microns is formed over a silicon substrate (20). At least one passive electronic component (62) is formed over the insulating dielectric layer (32).
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: May 3, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jonathan K. Abrokwah, Keri L. Costello, James G. Cotronakis, Terry K. Daly, Jason R. Fender, Adolfo G. Reyes
  • Patent number: 7723224
    Abstract: A method is provided for forming a microelectronic assembly. A contact structure (46) is formed over a first side of a first substrate (20) having a microelectronic device formed over a second side thereof. The contact structure is electrically connected to the microelectronic device. A non-solderable layer (52) is formed over at least a portion of the contact structure and at least a portion of the first substrate. The contact structure and a second substrate (62) are interconnected with solder (68).
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: May 25, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Darrell G. Hill, Philip H. Bowles, Jan Campbell, Terry K. Daly, Jason R. Fender, Lakshmi N. Ramanathan, Neil T. Tracht
  • Publication number: 20090236689
    Abstract: According to one aspect of the present invention, a method of forming a microelectronic assembly, such as an integrated passive device (72), is provided. An insulating initial dielectric layer (32) comprising charge trapping films of, for example, aluminum nitride or silicon nitride or silicon oxide or a combination thereof, is formed over a silicon substrate (20). At least one passive electronic component (62) is formed over the initial dielectric layer (32). In an embodiment where silicon nitride or oxide is used in the initial dielectric layer (32) in contact with the silicon substrate (20), it is desirable to pre-treat the silicon surface (22) by exposing it to a surface damage causing treatment (e.g. an argon plasma) prior to depositing the initial dielectric layer, to assist in providing carrier depletion near the silicon surface around zero bias. RF loss in integrated passive devices using such silicon substrates is equal or lower than that obtained with GaAs substrates.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 24, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Terry K. Daly, Keri L. Costello, James G. Cotronakis, Jason R. Fender, Jeff S. Hughes, Agni Mitra, Adolfo C. Reyes
  • Publication number: 20080246114
    Abstract: According to one aspect of the present invention, a method of forming a microelectronic assembly, such as an integrated passive device (IPD) (72), is provided. An insulating dielectric layer (32) having a thickness (36) of at least 4 microns is formed over a silicon substrate (20). At least one passive electronic component (62) is formed over the insulating dielectric layer (32).
    Type: Application
    Filed: April 9, 2007
    Publication date: October 9, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Jonathan K. Abrokwah, Keri L. Costello, James G. Cotronakis, Terry K. Daly, Jason R. Fender, Adolfo C. Reyes
  • Patent number: 7339267
    Abstract: Semiconductor packages (100) that prevent the leaching of gold from back metal layers (118) into the solder (164) and methods for fabricating the same are provided. An exemplary method comprises providing a semiconductor wafer stack (110) including metal pads (112) and a substrate (116). An adhesion/plating layer (115) is formed on the substrate (116). A layer of gold (118) is plated on the adhesion/plating layer (115). The layer of gold is etched in a street area (124) to expose edge portions (128) of the layer of gold (118) and the adhesion/plating layer (115). A layer of barrier metal (130) is deposited to form an edge seal (129) about the exposed edge portions (128). The edge seal (129) prevents the leaching of gold from back metal layers (118) into the solder (162) when the wafer stack (110) is soldered to a leadframe (162).
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: March 4, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Vasile Romega Thompson, Jason Fender, Terry K. Daly, Jin-Wook Jang
  • Publication number: 20070293033
    Abstract: A method is provided for forming a microelectronic assembly. A contact structure (46) is formed over a first side of a first substrate (20) having a microelectronic device formed over a second side thereof. The contact structure is electrically connected to the microelectronic device. A non-solderable layer (52) is formed over at least a portion of the contact structure and at least a portion of the first substrate. The contact structure and a second substrate (62) are interconnected with solder (68).
    Type: Application
    Filed: June 14, 2006
    Publication date: December 20, 2007
    Inventors: Darrell G. Hill, Philip H. Bowles, Jan Campbell, Terry K. Daly, Jason R. Fender, Lakshmi N. Ramanathan, Neil T. Tracht
  • Patent number: 5821170
    Abstract: A method for etching aluminum containing layers. A layer (13) of aluminum nitride is formed on a semiconductor substrate (11). The layer (13) of aluminum nitride is etched using a dilute ammonium hydroxide solution that is diluted with water such that the ammonium hydroxide solution has one part of ammonium hydroxide to at least fifteen parts of water. The dilute ammonium hydroxide solution is showered onto the semiconductor substrate and forms an aluminum hydroxide layer. The aluminum hydroxide layer is dissolved by excess water in the dilute aluminum hydroxide solution and rinsed from the semiconductor substrate (11).
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: October 13, 1998
    Assignee: Motorola, Inc.
    Inventors: Lawrence S. Klingbeil, Jr., Terry K. Daly