Patents by Inventor Terufumi Nagano

Terufumi Nagano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10637525
    Abstract: There is provided a wireless device capable of supporting both of TDD and FDD wireless communications with a simple configuration. The wireless device includes a transmitter that transmits a signal of a first frequency; a DPD receiver that receives signals of the first frequency; a receiver that receives signals of a second frequency; a duplexer having a first filter having passband characteristics in the first frequency band and a second filter having passband characteristics in the second frequency band; and a circulator that splits the signal from the transmitter to output the split signals to the duplexer and the DPD receiver, and outputs a reception signal from the duplexer to the DPD receiver. The duplexer is connected to the circulator on the first filter side and to the receiver on the second filter side, and uses the DPD receiver for FDD and TDD transmission feedback and for TDD reception.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: April 28, 2020
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Terufumi Nagano, Hideaki Shimizu
  • Publication number: 20190393922
    Abstract: There is provided a wireless device capable of supporting both of TDD and FDD wireless communications with a simple configuration. The wireless device includes a transmitter that transmits a signal of a first frequency; a DPD receiver that receives signals of the first frequency; a receiver that receives signals of a second frequency; a duplexer having a first filter having passband characteristics in the first frequency band and a second filter having passband characteristics in the second frequency band; and a circulator that splits the signal from the transmitter to output the split signals to the duplexer and the DPD receiver, and outputs a reception signal from the duplexer to the DPD receiver. The duplexer is connected to the circulator on the first filter side and to the receiver on the second filter side, and uses the DPD receiver for FDD and TDD transmission feedback and for TDD reception.
    Type: Application
    Filed: January 25, 2018
    Publication date: December 26, 2019
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: TERUFUMI NAGANO, HIDEAKI SHIMIZU
  • Patent number: 8035444
    Abstract: An amplifier capable of lowering an electrical current flowing in a peak amplifier before a carrier amplifier becomes saturated to thereby improve the efficiency of an entirety of the amplifier is provided. The amplifier includes a carrier amplifier circuit having an amplifying element operable in class-AB or class-B, and a plurality of peak amplifier circuits which have amplifying elements operating in class-B or class-C and which are arranged to start an operation in stages in response to an input level. An output of the carrier amplifier circuit and outputs of the peak amplifier circuits are combined together for signal output. One of the peak amplifier circuits which is rendered operative at the lowest input level is smaller in saturation output than the carrier amplifier circuit.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: October 11, 2011
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yoichi Okubo, Manabu Nakamura, Yasuhiro Takeda, Taizo Ito, Junya Dosaka, Terufumi Nagano, Hidekatsu Ueno, Toshio Nojima
  • Publication number: 20100117726
    Abstract: An amplifier capable of lowering an electrical current flowing in a peak amplifier before a carrier amplifier becomes saturated to thereby improve the efficiency of an entirety of the amplifier is provided. The amplifier includes a carrier amplifier circuit having an amplifying element operable in class-AB or class-B, and a plurality of peak amplifier circuits which have amplifying elements operating in class-B or class-C and which are arranged to start an operation in stages in response to an input level. An output of the carrier amplifier circuit and outputs of the peak amplifier circuits are combined together for signal output. One of the peak amplifier circuits which is rendered operative at the lowest input level is smaller in saturation output than the carrier amplifier circuit.
    Type: Application
    Filed: November 10, 2009
    Publication date: May 13, 2010
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yoichi OKUBO, Manabu NAKAMURA, Yasuhiro TAKEDA, Taizo ITO, Junya DOSAKA, Terufumi NAGANO, Hidekatsu UENO, Toshio NOJIMA
  • Patent number: 6424214
    Abstract: According to the present invention, there is provided a strain (error) compensation amplifier which realizes miniaturization, loss reduction, and cost reduction. In the strain (error) compensation amplifier, by unifying at least two or more of a power distributor, a first delay unit, a first power synthesizer, a second delay unit, a second power synthesizer, a directional coupler, an isolator and a terminating resistor, the miniaturization, loss reduction, and cost reduction are realized.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: July 23, 2002
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yasuo Sera, Takashi Uchida, Terufumi Nagano, Masahiro Himono
  • Publication number: 20010017570
    Abstract: According to the present invention, there is provided a strain compensation amplifier which realizes miniaturization, loss reduction, and cost reduction.
    Type: Application
    Filed: December 4, 2000
    Publication date: August 30, 2001
    Inventors: Yasuo Sera, Takashi Uchida, Terufumi Nagano, Masahiro Himono
  • Patent number: 6271723
    Abstract: A distortion compensating device comprises a 3 dB coupler having four terminals. The first terminal supplies an input signal to be inputted to an amplifier or is supplied with an input signal from an amplifier. The second terminal is associated with a third-order distortion generator for generating a third-order distortion having an amplitude for canceling out a third-order distortion generated by the amplifier depending on the supplied input signal. The third terminal is associated with a phase adjuster for adjusting the phase of the input signal to set the phase difference between the input signal and the third-order distortion generated by the third-order distortion generator to a phase difference for canceling out the third-order distortion generated by the amplifier.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: August 7, 2001
    Assignee: Kokusai Electric Co., Ltd.
    Inventors: Terufumi Nagano, Yoichi Okubo, Yasuo Sera, Masaki Suto, Hidefumi Ito