Patents by Inventor Tetsunobu Kohchi
Tetsunobu Kohchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20020067419Abstract: An optical apparatus comprises at least image display device, a light source for illuminating the image display device, light-receiving device for receiving the light reflected from the eye of an observer, and calculation device for calculating the line of sight of the observer based on the output of the light-receiving means. At least, a part of the illuminating light from the light source is utilized as the illuminating light for illuminating the eye of the observer.Type: ApplicationFiled: March 9, 1999Publication date: June 6, 2002Inventors: SHUNSUKE INOUE, MAMORU MIYAWAKI, JUNICHI HOSHI, TETSUNOBU KOHCHI
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Patent number: 6329265Abstract: A semiconductor device having a semiconductor layer formed on a substrate having an insulating surface, comprises a first region formed by processing the semiconductor layer from one major surface thereof, and a second region formed by processing the semiconductor layer from the other major surface, the first and second regions cooperating to constitute a semiconductor function element, isolation region or the like.Type: GrantFiled: May 6, 1999Date of Patent: December 11, 2001Assignee: Canon Kabushiki KaishaInventors: Mamoru Miyawaki, Yasushi Kawasumi, Shunsuke Inoue, Yutaka Akino, Toru Koizumi, Tetsunobu Kohchi
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Patent number: 6096582Abstract: A method of making a semiconductor device is disclosed in which the device has an insulated gate transistor in which source and drain regions are provided in a single crystal semiconductor layer formed on an insulating layer with a channel region interposed between the source and drain regions. The insulating layers just below the source and drain regions are made thicker than an insulating layer just below the channel region. The method uses substrate bonding to achieve the device.Type: GrantFiled: July 23, 1997Date of Patent: August 1, 2000Assignee: Canon Kabushiki KaishaInventors: Shunsuke Inoue, Mamoru Miyawaki, Tetsunobu Kohchi
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Patent number: 6081825Abstract: In a semiconductor device in which one terminal of each of plural capacitors is connected to a corresponding multiple input terminal via a switch, and the other terminals of the capacitors are commonly connected to a sense amplifier, the other terminal of at least one capacitor is commonly connected to the sense amplifier via a second switch, thereby reducing circuit scale, increasing operation speed, improving operation precision, and saving power.Type: GrantFiled: January 26, 1996Date of Patent: June 27, 2000Assignee: Canon Kabushiki KaishaInventors: Tetsunobu Kohchi, Mamoru Miyawaki
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Patent number: 5952694Abstract: A semiconductor device having a semiconductor layer formed on a substrate having an insulating surface, comprises a first region formed by processing the semiconductor layer from one major surface thereof, and a second region formed by processing the semiconductor layer from the other major surface, the first and second regions cooperating to constitute a semiconductor function element, isolation region or the like.Type: GrantFiled: March 14, 1995Date of Patent: September 14, 1999Assignee: Canon Kabushiki KaishaInventors: Mamoru Miyawaki, Yasushi Kawasumi, Shunsuke Inoue, Yutaka Akino, Toru Koizumi, Tetsunobu Kohchi
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Patent number: 5926238Abstract: An optical apparatus includes at least an image display device, a light source for illuminating the image display device, a light-receiving device for receiving the light reflected from the eye of an observer, and a calculation device for calculating the line of sight of the observer based on the output of the light-receiving means. At least part of the illuminating light from the light source is utilized as the illuminating light for illuminating the eye of the observer.Type: GrantFiled: April 4, 1997Date of Patent: July 20, 1999Assignee: Canon Kabushiki KaishaInventors: Shunsuke Inoue, Mamoru Miyawaki, Junichi Hoshi, Tetsunobu Kohchi
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Patent number: 5918115Abstract: A semiconductor device including: an insulated gate type transistor having a columnar semiconductor region formed on the main side of a semiconductor substrate, a gate electrode formed on the side surface of the columnar semiconductor region while interposing a gate insulating film and main electrode regions respectively formed on and formed below the columnar semiconductor region; and a memory element which is formed on the upper main electrode region and which can be broken electrically.Type: GrantFiled: July 29, 1997Date of Patent: June 29, 1999Assignee: Canon Kabushiki KaishaInventors: Shin Kikuchi, Mamoru Miyawaki, Genzo Monma, Hayao Ohzu, Shunsuke Inoue, Yoshio Nakamura, Takeshi Ichikawa, Osamu Ikeda, Tetsunobu Kohchi
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Patent number: 5873003Abstract: There is provided a liquid crystal unit having an on-chip photodetector.On a transparent substrate are laid down a metallic wiring, an n-type a-Si, an a-SiGe, and a p-type a-Si successively, an insulating film is formed, and then a transparent electrode is formed to have a light detection region.Type: GrantFiled: October 21, 1997Date of Patent: February 16, 1999Assignee: Canon Kabushiki KaishaInventors: Shunsuke Inoue, Mamoru Miyawaki, Tetsunobu Kohchi, Hidekazu Takahashi, Takanori Watanabe
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Patent number: 5867045Abstract: A signal processor with a simplified circuit configuration provides an improved processing speed and can be realized of small size and at inexpensive cost. The signal processor includes signal holding means for holding output signals from plural signal sources (S1-S4), and signal mixing means (M31-M34) for mixing at least two signals among the plural signals held to output plural mixed signals. Since the mixed signals are less than the signal sources in number, the small number of signal lines can lead to an increased processing speed. Then the mixed signals corresponding to discrete signals from plural signal sources enables processing without substantially destroying information.Type: GrantFiled: November 19, 1996Date of Patent: February 2, 1999Assignee: Canon Kabushiki KaishaInventors: Isamu Ueno, Mamoru Miyawaki, Tetsunobu Kohchi
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Patent number: 5827755Abstract: A liquid crystal image display unit created on a substrate non-transparent to the light in the visible radiation area, characterized in that a portion beneath a liquid crystal pixel part on said substrate is removed, so that the light is made transmissive through said liquid crystal pixel part.Type: GrantFiled: August 22, 1995Date of Patent: October 27, 1998Assignee: Canon Kabushiki KaishaInventors: Takao Yonehara, Mamoru Miyawaki, Akira Ishizaki, Junichi Hoshi, Masaru Sakamoto, Shigetoshi Sugawa, Shunsuke Inoue, Toru Koizumi, Tetsunobu Kohchi, Kiyofumi Sakaguchi, Takanori Watanabe
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Patent number: 5783842Abstract: In a semiconductor device in which a passive element and an active element are formed on a substrate in which a thin film semiconductor layer is formed on an insulating layer or an insulating substrate, the device has a concave portion in at least a part of a portion below a wiring connecting the passive element or the active element.Type: GrantFiled: February 20, 1997Date of Patent: July 21, 1998Assignee: Canon Kabushiki KaishaInventors: Tetsunobu Kohchi, Mamoru Miyawaki
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Patent number: 5694145Abstract: A liquid crystal device of active matrix type includes a layer of a liquid crystal material and a plurality of unit cells each provided with an active element. The device further includes signal lines for supplying signals for determining an optical state of the liquid crystal material, and a circuit for maintaining the signal lines at a certain reference potential during a period other than a period in which signals are supplied to the unit cells.Type: GrantFiled: December 2, 1994Date of Patent: December 2, 1997Assignee: Canon Kabushiki KaishaInventors: Shigeki Kondo, Shigetoshi Sugawa, Tetsunobu Kohchi
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Patent number: 5598037Abstract: A semiconductor device including: an insulated gate type transistor having a columnar semiconductor region formed on the main side of a semiconductor substrate, a gate electrode formed on the side surface of the columnar semiconductor region while interposing a gate insulating film and main electrode regions respectively formed on and formed below the columnar semiconductor region; and a memory element which is formed on the upper main electrode region and which can be broken electrically.Type: GrantFiled: March 15, 1995Date of Patent: January 28, 1997Assignee: Canon Kabushiki KaishaInventors: Shin Kikuchi, Mamoru Miyawaki, Genzo Monma, Hayao Ohzu, Shunsuke Inoue, Yoshio Nakamura, Takeshi Ichikawa, Osamu Ikeda, Tetsunobu Kohchi
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Patent number: 5595920Abstract: A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.Type: GrantFiled: April 6, 1995Date of Patent: January 21, 1997Assignee: Canon Kabushiki KaishaInventors: Mamoru Miyawaki, Akira Ishizaki, Genzo Momma, Hiroshi Yuzurihara, Tetsunobu Kohchi
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Patent number: 5585814Abstract: A resetting circuit for a device including a plurality of cells adapted to be reset, the resetting circuit including a reference voltage source for providing a reference voltage, connecting paths for connecting the cells to the reference voltage source for resetting the cells, and altering means for altering during a resetting period, an impedance of the connecting paths to an impedance of lower value.Type: GrantFiled: June 7, 1995Date of Patent: December 17, 1996Assignee: Canon Kabushiki KaishaInventors: Isamu Ueno, Tetsunobu Kohchi
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Patent number: 5567962Abstract: A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.Type: GrantFiled: June 21, 1994Date of Patent: October 22, 1996Assignee: Canon Kabushiki KaishaInventors: Mamoru Miyawaki, Akira Ishizaki, Genzo Momma, Hiroshi Yuzurihara, Tetsunobu Kohchi
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Patent number: 5530266Abstract: A liquid crystal image display unit created on a substrate non-transparent to the light in the visible radiation area, characterized in that a portion beneath a liquid crystal pixel part on said substrate is removed, so that the light is made transmissive through said liquid crystal pixel part.Type: GrantFiled: May 13, 1994Date of Patent: June 25, 1996Assignee: Canon Kabushiki KaishaInventors: Takao Yonehara, Mamoru Miyawaki, Akira Ishizaki, Junichi Hoshi, Masaru Sakamoto, Shigetoshi Sugawa, Shunsuke Inoue, Toru Koizumi, Tetsunobu Kohchi, Kiyofumi Sakaguchi, Takanori Watanabe
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Patent number: 5466961Abstract: A semiconductor device including: an insulated gate type transistor having a columnar semiconductor region formed on the main side of a semiconductor substrate, a gate electrode formed on the side surface of the columnar semiconductor region while interposing a gate insulating film and main electrode regions respectively formed on and formed below the columnar semiconductor region; and a memory element which is formed on the upper main electrode region and which can be broken electrically.Type: GrantFiled: April 22, 1992Date of Patent: November 14, 1995Assignee: Canon Kabushiki KaishaInventors: Shin Kikuchi, Mamoru Miyawaki, Genzo Monma, Hayao Ohzu, Shunsuke Inoue, Yoshio Nakamura, Takeshi Ichikawa, Osamu Ikeda, Tetsunobu Kohchi
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Patent number: 5331197Abstract: A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.Type: GrantFiled: April 17, 1992Date of Patent: July 19, 1994Assignee: Canon Kabushiki KaishaInventors: Mamoru Miyawaki, Akira Ishizaki, Genzo Momma, Hiroshi Yuzurihara, Tetsunobu Kohchi