Patents by Inventor Tetsuo Hatakenaka

Tetsuo Hatakenaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6552642
    Abstract: An electronic device such as a chip coil including an electric wire firmly connected to electrodes in a highly reliable fashion is constructed to be mounted on a printed circuit board or substrate in a stable and reliable manner. At both ends of a core of the chip coil, there are provided electrodes having a multilayer structure including a high-conductivity layer made of Ag, Ag—Pd, or a similar material; a solder barrier layer made of Ni; and an easy-soldering layer made of Sn or solder. End portions of the electric wire are embedded in the easy-soldering layer so that the resultant electrode structure has a substantially flat surface. A thermo-compression process is performed so that the end portions of the electric wire are connected to the solder barrier layer via solid welding and to the easy-soldering layer via brazing.
    Type: Grant
    Filed: May 24, 1999
    Date of Patent: April 22, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takaomi Toi, Tetsuya Morinaga, Masahiro Bando, Tetsuo Hatakenaka, Kazuo Kasahara, Koki Sasaki, Takayuki Hirotsuji
  • Patent number: 6119924
    Abstract: An electronic device such as a chip coil including an electric wire firmly connected to electrodes in a highly reliable fashion is constructed to be mounted on a printed circuit board or substrate in a stable and reliable manner. At both ends of a core of the chip coil, there are provided electrodes having a multilayer structure including a high-conductivity layer made of Ag, Ag--Pd, or a similar material; a solder barrier layer made of Ni; and an easy-soldering layer made of Sn or solder. End portions of the electric wire are embedded in the easy-soldering layer so that the resultant electrode structure has a substantially flat surface. A thermo-compression process is performed so that the end portions of the electric wire are connected to the solder barrier layer via solid welding and to the easy-soldering layer via brazing.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: September 19, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takaomi Toi, Tetsuya Morinaga, Masahiro Bando, Tetsuo Hatakenaka, Kazuo Kasahara, Koki Sasaki, Takayuki Hirotsuji
  • Patent number: 6027008
    Abstract: An electronic device such as a chip coil including an electric wire firmly connected to electrodes in a highly reliable fashion is constructed to be mounted on a printed circuit board or substrate in a stable and reliable manner. At both ends of a core of the chip coil, there are provided electrodes having a multilayer structure including a high-conductivity layer made of Ag, Ag--Pd, or a similar material; a solder barrier layer made of Ni; and an easy-soldering layer made of Sn or solder. End portions of the electric wire are embedded in the easy-soldering layer so that the resultant electrode structure has a substantially flat surface. A thermo-compression process is performed so that the end portions of the electric wire are connected to the solder barrier layer via solid welding and to the easy-soldering layer via brazing.
    Type: Grant
    Filed: May 12, 1998
    Date of Patent: February 22, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takaomi Toi, Tetsuya Morinaga, Masahiro Bando, Tetsuo Hatakenaka, Kazuo Kasahara, Koki Sasaki, Takayuki Hirotsuji
  • Patent number: 5936504
    Abstract: A method for accurately and inexpensively producing a chip-type coil device comprises first forming an insulating plate. A plurality of parallel division grooves are then formed in a first direction on the insulating plate on one surface thereof. Thereafter, a conductive layer is formed on the insulating plate, wherein the conductive layer also coats the division grooves. The process then entails forming recess grooves between the division grooves on the insulating plate on which the conductive layer has been formed, and then dividing the insulating plate by forming slots within the division grooves, wherein the slots have widths which are smaller than widths of the division grooves.
    Type: Grant
    Filed: May 25, 1998
    Date of Patent: August 10, 1999
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tetsuo Hatakenaka
  • Patent number: 5787571
    Abstract: A method for accurately and inexpensively producing a chip-type coil device comprises first forming an insulating plate. A plurality of parallel division grooves are then formed in a first direction on the insulating plate on one surface thereof. Thereafter, a conductive layer is formed on the insulating plate, wherein the conductive layer also coats the division grooves. The process then entails forming recess grooves between the division grooves on the insulating plate on which the conductive layer has been formed, and then dividing the insulating plate by forming slots within the division grooves, wherein the slots have widths which are smaller than widths of the division grooves.
    Type: Grant
    Filed: January 10, 1997
    Date of Patent: August 4, 1998
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tetsuo Hatakenaka
  • Patent number: 5010313
    Abstract: A chip coil wherein the coil wound around the core is enclosed with a sleeve core. The upper surfaces of the core and the sleeve core are ground so as to adjust the inductance of the chip coil.
    Type: Grant
    Filed: May 30, 1990
    Date of Patent: April 23, 1991
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Toshimi Kaneko, Tetsuya Morinaga, Tetsuo Hatakenaka