Patents by Inventor Tetsuro Okura

Tetsuro Okura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11095276
    Abstract: A relaxation oscillator with an aging effect reduction technique comprises a comparator (CP) coupled with its input side (CP1, CP2) to a network comprising at least one capacitor (C, C1, C2), a plurality of transistors (M1, M2, M3, M4) and a plurality of controllable switches (SW11, . . . , SW8, SW111, . . . , SW180). The relaxation oscillator uses a switching method such that the roles of current/voltage generator's transistor and current mirror transistor are periodically swapping by the output signal of the relaxation oscillator. Reducing mismatch of operating points between current/voltage generator and current minor transistors achieves a decrease of frequency degradation caused by aging effect.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: August 17, 2021
    Assignee: AMS AG
    Inventor: Tetsuro Okura
  • Publication number: 20200412347
    Abstract: A relaxation oscillator with an aging effect reduction technique comprises a comparator (CP) coupled with its input side (CP1, CP2) to a network comprising at least one capacitor (C, C1, C2), a plurality of transistors (M1, M2, M3, M4) and a plurality of controllable switches (SW11, . . . , SW8, SW111, . . . , SW180). The relaxation oscillator uses a switching method such that the roles of current/voltage generator's transistor and current mirror transistor are periodically swapping by the output signal of the relaxation oscillator. Reducing mismatch of operating points between current/voltage generator and current minor transistors achieves a decrease of frequency degradation caused by aging effect.
    Type: Application
    Filed: November 27, 2018
    Publication date: December 31, 2020
    Inventor: Tetsuro OKURA
  • Publication number: 20160099721
    Abstract: An analog-digital conversion system includes an analog-digital converter; and a preamplifier circuit which is provided in the previous stage of the analog-digital converter and differentially amplifies an input analog signal. In the preamplifier circuit, an offset voltage and/or a noise occurs and/or is mixed. The preamplifier circuit outputs two types of analog amplified differential signals where a phase is inverted only with respect to the offset voltage and/or the noise. The analog-digital converter has an averaging circuit which averages the two types of analog amplified differential signals for each clock cycle of sampling preceding an analog-digital conversion and outputs a digital signal based on the differential signal averaged by the averaging circuit.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 7, 2016
    Inventors: Tetsuro OKURA, Yusaku Ito, Hirohiko Sadamatsu
  • Patent number: 9306589
    Abstract: An analog-digital conversion system includes an analog-digital converter; and a preamplifier circuit which is provided in the previous stage of the analog-digital converter and differentially amplifies an input analog signal. In the preamplifier circuit, an offset voltage and/or a noise occurs and/or is mixed. The preamplifier circuit outputs two types of analog amplified differential signals where a phase is inverted only with respect to the offset voltage and/or the noise. The analog-digital converter has an averaging circuit which averages the two types of analog amplified differential signals for each clock cycle of sampling preceding an analog-digital conversion and outputs a digital signal based on the differential signal averaged by the averaging circuit.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: April 5, 2016
    Assignee: Cypress Semicondcutor Corporation
    Inventors: Tetsuro Okura, Yusaku Ito, Hirohiko Sadamatsu