Patents by Inventor Tetsuya Kakehata

Tetsuya Kakehata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9837300
    Abstract: A semiconductor substrate and a base substrate are prepared; an oxide film is formed over the semiconductor substrate; the semiconductor substrate is irradiated with accelerated ions through the oxide film to form a separation layer at a predetermined depth from a surface of the semiconductor substrate; a nitrogen-containing layer is formed over the oxide film after the ion irradiation; the semiconductor substrate and the base substrate are disposed opposite to each other to bond a surface of the nitrogen-containing layer and a surface of the base substrate to each other; and the semiconductor substrate is heated to cause separation along the separation layer, thereby forming a single crystal semiconductor layer over the base substrate with the oxide film and the nitrogen-containing layer interposed therebetween.
    Type: Grant
    Filed: May 9, 2012
    Date of Patent: December 5, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Kazutaka Kuriki
  • Publication number: 20170025543
    Abstract: An insulator is formed over a substrate, an opening is formed in the insulator, and an oxide semiconductor is formed in the opening. Then, part of the insulator is removed to expose a side surface of the oxide semiconductor.
    Type: Application
    Filed: July 15, 2016
    Publication date: January 26, 2017
    Inventor: Tetsuya KAKEHATA
  • Patent number: 9536774
    Abstract: An SOI substrate having an SOI layer that can be used in practical applications even when a substrate with low upper temperature limit, such as a glass substrate, is used, is provided. A semiconductor device using such an SOI substrate, is provided. In bonding a single-crystal semiconductor layer to a substrate having an insulating surface or an insulating substrate, a silicon oxide film formed using organic silane as a material on one or both surfaces that are to form a bond is used. According to the present invention, a substrate with an upper temperature limit of 700° C. or lower, such as a glass substrate, can be used, and an SOI layer that is strongly bonded to the substrate can be obtained. In other words, a single-crystal semiconductor layer can be formed over a large-area substrate that is longer than one meter on each side.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: January 3, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideto Ohnuma, Tetsuya Kakehata, Yoichi Iikubo
  • Patent number: 9231070
    Abstract: An object is to provide a technique to manufacture an insulating film having excellent film characteristics. In particular, an object is to provide a technique to manufacture a dense insulating film with a high withstand voltage. Moreover, an object is to provide a technique to manufacture an insulating film with few electron traps. An insulating film including oxygen is subjected to plasma treatment using a high frequency under the conditions where the electron density is 1×1011 cm?3 or more and the electron temperature is 1.5 eV or less in an atmosphere including oxygen.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: January 5, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Tetsuhiro Tanaka, Yoshinobu Asami
  • Patent number: 9184173
    Abstract: The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: November 10, 2015
    Assignee: Semiconductor Enery Laboratory Co., Ltd.
    Inventors: Tamae Takano, Tetsuya Kakehata, Shunpei Yamazaki
  • Patent number: 8912624
    Abstract: A semiconductor device and a method for manufacturing thereof are provided. The method includes a step of forming a first insulating film containing silicon and oxygen as its composition over a single-crystal semiconductor substrate, a step of forming a second insulating film containing silicon and nitrogen as its composition over the first insulating film, a step of irradiating the second insulating film with first ions to form a separation layer in the single-crystal semiconductor substrate, a step of irradiating the second insulating film with second ions so that halogen is contained in the first insulating film, and a step of performing heat treatment to separate the single-crystal semiconductor substrate with a single-crystal semiconductor film left over the supporting substrate.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: December 16, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tetsuya Kakehata
  • Patent number: 8895388
    Abstract: An object is to provide a technique for manufacturing an insulating layer with favorable withstand voltage. Another object is to provide a technique for manufacturing a semiconductor device having an insulating layer with favorable withstand voltage. By subjecting a semiconductor layer or semiconductor substrate mainly containing silicon to a high density plasma treatment, an insulating layer is formed on a surface of the semiconductor layer or a top surface of the semiconductor substrate. At this time, the high density plasma treatment is performed by switching a supply gas in the middle of the treatment from a gas containing a rare gas, oxygen, and hydrogen, to a gas containing a rare gas and oxygen.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: November 25, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Tomokazu Yokoi
  • Patent number: 8884371
    Abstract: An object is to provide an SOI substrate provided with a semiconductor layer which can be used practically even when a glass substrate is used as a base substrate. Another object is to provide a semiconductor device having high reliability using such an SOI substrate. An altered layer is formed on at least one surface of a glass substrate used as a base substrate of an SOI substrate to form the SOI substrate. The altered layer is formed on at least the one surface of the glass substrate by cleaning the glass substrate with solution including hydrochloric acid, sulfuric acid or nitric acid. The altered layer has a higher proportion of silicon oxide in its composition and a lower density than the glass substrate.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Hideto Ohnuma, Yoshiaki Yamamoto, Kenichiro Makino
  • Publication number: 20140329371
    Abstract: An SOI substrate having an SOI layer that can be used in practical applications even when a substrate with low upper temperature limit, such as a glass substrate, is used, is provided. A semiconductor device using such an SOI substrate, is provided. In bonding a single-crystal semiconductor layer to a substrate having an insulating surface or an insulating substrate, a silicon oxide film formed using organic silane as a material on one or both surfaces that are to form a bond is used. According to the present invention, a substrate with an upper temperature limit of 700° C. or lower, such as a glass substrate, can be used, and an SOI layer that is strongly bonded to the substrate can be obtained. In other words, a single-crystal semiconductor layer can be formed over a large-area substrate that is longer than one meter on each side.
    Type: Application
    Filed: July 21, 2014
    Publication date: November 6, 2014
    Inventors: Hideto OHNUMA, Tetsuya KAKEHATA, Yoichi IIKUBO
  • Patent number: 8828844
    Abstract: A damaged region is formed by generation of plasma by excitation of a source gas, and by addition of ion species contained in the plasma from one of surfaces of a single crystal semiconductor substrate; an insulating layer is formed over the other surface of the single crystal semiconductor substrate; a supporting substrate is firmly attached to the single crystal semiconductor substrate so as to face the single crystal semiconductor substrate with the insulating layer interposed therebetween; separation is performed at the damaged region into the supporting substrate to which a single crystal semiconductor layer is attached and part of the single crystal semiconductor substrate by heating of the single crystal semiconductor substrate; dry etching is performed on a surface of the single crystal semiconductor layer attached to the supporting substrate; the single crystal semiconductor layer is recrystallized by irradiation of the single crystal semiconductor layer with a laser beam to melt at least part of the
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: September 9, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideto Ohnuma, Tetsuya Kakehata, Akihisa Shimomura, Shinya Sasagawa, Motomu Kurata
  • Patent number: 8823063
    Abstract: An SOI substrate having an SOI layer that can be used in practical applications even when a substrate with low upper temperature limit, such as a glass substrate, is used, is provided. A semiconductor device using such an SOI substrate, is provided. In bonding a single-crystal semiconductor layer to a substrate having an insulating surface or an insulating substrate, a silicon oxide film formed using organic silane as a material on one or both surfaces that are to form a bond is used. According to the present invention, a substrate with an upper temperature limit of 700° C. or lower, such as a glass substrate, can be used, and an SOI layer that is strongly bonded to the substrate can be obtained. In other words, a single-crystal semiconductor layer can be formed over a large-area substrate that is longer than one meter on each side.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: September 2, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideto Ohnuma, Tetsuya Kakehata, Yoichi Iikubo
  • Patent number: 8815657
    Abstract: After a single crystal semiconductor layer provided over a base substrate by attaching is irradiated with a laser beam, characteristics thereof are improved by first heat treatment, and after adding an impurity element imparting conductivity to the single crystal semiconductor layer, second heat treatment is performed at lower temperature than that of the first heat treatment.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: August 26, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Suguru Ozawa, Atsuo Isobe, Takashi Hamada, Junpei Momo, Hiroaki Honda, Takashi Shingu, Tetsuya Kakehata
  • Publication number: 20140103409
    Abstract: An object is to provide an SOI substrate provided with a semiconductor layer which can be used practically even when a glass substrate is used as a base substrate. Another object is to provide a semiconductor device having high reliability using such an SOI substrate. An altered layer is formed on at least one surface of a glass substrate used as a base substrate of an SOI substrate to form the SOI substrate. The altered layer is formed on at least the one surface of the glass substrate by cleaning the glass substrate with solution including hydrochloric acid, sulfuric acid or nitric acid. The altered layer has a higher proportion of silicon oxide in its composition and a lower density than the glass substrate.
    Type: Application
    Filed: December 19, 2013
    Publication date: April 17, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya KAKEHATA, Hideto OHNUMA, Yoshiaki YAMAMOTO, Kenichiro MAKINO
  • Publication number: 20140035028
    Abstract: The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
    Type: Application
    Filed: October 1, 2013
    Publication date: February 6, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tamae TAKANO, Tetsuya KAKEHATA, Shunpei YAMAZAKI
  • Patent number: 8633542
    Abstract: An object is to provide an SOI substrate provided with a semiconductor layer which can be used practically even when a glass substrate is used as a base substrate. Another object is to provide a semiconductor device having high reliability using such an SOI substrate. An altered layer is formed on at least one surface of a glass substrate used as a base substrate of an SOI substrate to form the SOI substrate. The altered layer is formed on at least the one surface of the glass substrate by cleaning the glass substrate with solution including hydrochloric acid, sulfuric acid or nitric acid. The altered layer has a higher proportion of silicon oxide in its composition and a lower density than the glass substrate.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: January 21, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Hideto Ohnuma, Yoshiaki Yamamoto, Kenichiro Makino
  • Patent number: 8581332
    Abstract: The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: November 12, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tamae Takano, Tetsuya Kakehata, Shunpei Yamazaki
  • Patent number: 8535965
    Abstract: The present invention provides a method for forming by plasma CVD a silicon nitride film that can be formed over heat-sensitive elements as well as an electroluminescent element and that has favorable barrier characteristics. Further, the present invention also provides a semiconductor device, a display device and a light-emitting display device formed by using the silicon nitride film. In the method for forming a silicon nitride film by plasma CVD, silane (SiH4), nitrogen (N2) and a rare gas are introduced into a deposition chamber in depositing, and the reaction pressure is within the range from 0.01 Torr to 0.1 Torr.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: September 17, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinji Maekawa, Tetsuya Kakehata, Yuuichi Takehara
  • Patent number: 8470648
    Abstract: A semiconductor device including a plurality of field-effect transistors which are stacked with a planarization layer interposed therebetween over a substrate having an insulating surface, in which semiconductor layers in the plurality of field-effect transistors are separated from semiconductor substrates, and the semiconductor layers are bonded to an insulating layer formed over the substrate having an insulating surface or an insulating layer formed over the planarization layer.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: June 25, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideto Ohnuma, Tetsuya Kakehata
  • Patent number: 8420504
    Abstract: There are provided a semiconductor device having a structure which can realize not only suppression of a punch-through current but also reuse of a silicon wafer used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. A semiconductor film into which an impurity imparting a conductivity type opposite to that of a source region and a drain region is implanted is formed over a substrate, and a single crystal semiconductor film is bonded to the semiconductor film by an SOI technique to form a stacked semiconductor film. A channel formation region is formed using the stacked semiconductor film, thereby suppressing a punch-through current in a semiconductor device.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: April 16, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sho Kato, Fumito Isaka, Tetsuya Kakehata, Hiromichi Godo, Akihisa Shimomura
  • Patent number: 8390067
    Abstract: A substrate with which a semiconductor device with excellent electric characteristics and high reliability can be manufactured is provided. An aspect of the invention is a method for manufacturing a substrate for manufacturing a semiconductor device: a first silicon oxide film, a silicon nitride film, and a second silicon oxide film are stacked in this order over a surface of a semiconductor substrate by a thermal CVD method, and then a weakened layer is formed at a given depth of the semiconductor substrate; the semiconductor substrate and a substrate having an insulating surface are arranged to face each other, and the second silicon oxide film provided for the semiconductor substrate and a supporting substrate are bonded to each other; and the semiconductor substrate is separated at the weakened layer by heat treatment, whereby a semiconductor film separated from the semiconductor substrate is left over the substrate having the insulating surface.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: March 5, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Kazutaka Kuriki