Patents by Inventor The TRAN

The TRAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6598132
    Abstract: A traffic manager for a network switch port includes a buffer memory and a buffer manager for writing incoming cells into the buffer memory and for thereafter reading the cells out of the buffer memory and forwarding them. The traffic manager also includes a queue manager for determining an order in which the buffer manager is to forward a set of cells stored in the buffer memory. The queue manager supplies the buffer manager with a sequence of pointers, each pointer referencing a separate cell of the set of cells, with the sequence of pointers being ordered to indicate an order in which the buffer manager is to forward the set of cells. After receiving the pointer sequence, the buffer manager changes the order of pointers in the pointer sequence to optimize a rate at which it can read the cells out of the buffer memory.
    Type: Grant
    Filed: July 18, 2001
    Date of Patent: July 22, 2003
    Assignee: Zettacom, Inc.
    Inventors: Toan D. Tran, Robert J. Divivier, Siyad Ma
  • Publication number: 20030134871
    Abstract: Compounds of the formula: 1
    Type: Application
    Filed: January 10, 2003
    Publication date: July 17, 2003
    Applicant: Wyeth
    Inventors: Megan Tran, Gary P. Stack
  • Publication number: 20030134870
    Abstract: Compounds of the formula 1
    Type: Application
    Filed: January 9, 2003
    Publication date: July 17, 2003
    Applicant: Wyeth
    Inventors: Gary P. Stack, Megan Tran, Byron A. Bravo
  • Publication number: 20030134739
    Abstract: A method of preparing catalyst agglomerates for electrochemical devices is provided. The method comprises dispersing particles of a catalyst in a non-aqueous solvent to form a dispersion of the catalyst, adding an ion conducting polymer in a dilute solution to the dispersion of the catalyst under agitation to form catalyst agglomerates, and stirring the dispersion of the catalyst and the catalyst agglomerates to control the growth of the agglomerates. A directly applicable catalyst composition is also provided. The catalyst composition comprises the catalyst agglomerates prepared according to the present invention, a solvent to plasticize surfaces of the catalyst agglomerates and the membrane, and a non-aqueous carrier solvent.
    Type: Application
    Filed: November 21, 2002
    Publication date: July 17, 2003
    Inventors: Philip Cox, Suk-Yal Cha, Gouyan Hou, Ngan Tran, Anh Duong
  • Publication number: 20030132319
    Abstract: A showerhead assembly for distributing gases within a processing chamber is provided. In one embodiment, the showerhead assembly includes a cylindrical member having a faceplate coupled thereto. The cylindrical member has an outwardly extending first flange at a first end. The faceplate is coupled to a second end of the cylindrical member and has a plurality of holes formed though a center region of the faceplate. The joint between the cylindrical member and the faceplate allow for relative movement when subjected to thermal stresses. In another embodiment, at least one clamp member retains the faceplate to the second end of the cylindrical member.
    Type: Application
    Filed: January 15, 2002
    Publication date: July 17, 2003
    Inventors: Mark M. Hytros, Truc T. Tran, Hongbee Teoh, Lawrence Chung-Lai Lei, Avgerinos Gelatos, Salvador P. Umotoy
  • Publication number: 20030134540
    Abstract: The present invention relates to apparatus and methods that proactively ensure alignment (parallelism) of the connectors on the circuit board during the solder assembly of the connectors to the circuit board. The apparatus and methods include an alignment fixture that has been specifically designed to ensure parallelism of straddle-mounted connectors during the solder reflow assembly process. The fixture has connector slots and a circuit board slot. The slots help to detect whether the connectors meet the X- and Y-axis alignment requirements after the insertion process (after the connectors have been placed onto the circuit board). That is, if the X- and Y-axis alignment specifications are met, the circuit board with its attached connectors can be completely fitted into the slots of the alignment fixture.
    Type: Application
    Filed: January 15, 2002
    Publication date: July 17, 2003
    Applicant: SUN MICROSYSTEMS, INC.
    Inventor: Camnhung T. Tran
  • Patent number: 6593350
    Abstract: Compounds of the formula are useful in the treatment of central nervous system disorders including depression, obsessive compulsive disorder, panic attacks, generalized anxiety disorder, sexual dysfunction, eating disorders and addictive disorders caused by ethanol or cocaine abuse.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: July 15, 2003
    Assignee: Wyeth
    Inventors: Gary P. Stack, Megan Tran, Byron A. Bravo
  • Patent number: 6594647
    Abstract: An infrastructure for a real time bank-centric universal payment system (2) in which a central processing system (CPU) defines an electronic commerce trust system (1) formed from a plurality of financial service provider members (4) subscribing to a common standard having applicability throught the infrastructure. The central processing unit is operatively interconnected to the correspondent processing units of financial service provider members (4) that in turn are operatively interconnected through access mechanisms to a network of customers (3) and goods and services providers (5) who are account subscribers with the financial service provider member (4) and subject to the common standard of the system. The CPU provides non-revocable real time debit and credit transactions and effects net settlement between and among members through a central exchange monetary system.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: July 15, 2003
    Assignees: Huntington Bancshares Incorporated, Hewlett-Packard Company
    Inventors: William Randle, Richard Ercole, Terry L. Geer, David L. James, Jodie M. Fredelake, Dennis Roman, Fabio Fontana, Rick Bartlett, Ruth Rosenberg, Robert W. Murphy, Tuong T. Tran, Paul Lampru
  • Patent number: 6593608
    Abstract: A magnetic memory device is disclosed that includes first and second soft reference layers, first and second barrier layers, and a sense layer, bound between the first and second barrier layers, which are further bound by the first and second soft reference layers.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: July 15, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Manish Sharma, Lung T. Tran
  • Patent number: 6594283
    Abstract: A network communications device is arranged to have a fast throughput of data packets. This is achieved by recognising that, in protocols such as Ethernet, the first symbols in a data packet do not carry any data and therefore do not necessarily require to be properly carried through a communications hub. Rather, a known number of symbols are discarded from the start of a packet on receipt and replaced on re-transmission. This discarding reduces the reception delays particularly in bussed-architecture repeaters where bus arbitration must take place for each received packet.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: July 15, 2003
    Assignee: 3Com Corporation
    Inventors: Nigel Horspool, David Law, Quang Tran, Patrick Overs
  • Publication number: 20030128594
    Abstract: A memory device includes an array of memory cells arranged in rows and columns with a portion of the rows of the memory cells being divided into segments. A global bias circuit generates a plurality of first bias currents. Each of a plurality of local bias networks includes a local bias circuit that generates a plurality of second bias currents in response to a corresponding one of the plurality of first bias currents, and includes a plurality of segment bias circuits that each generates a third bias current. Each segment bias circuit is adjacent to a corresponding segment of the memory cells. Each segment bias circuit provides a ground feedback signal to the local bias circuit, which adjusts the second bias current in response to the ground feedback signal.
    Type: Application
    Filed: January 10, 2002
    Publication date: July 10, 2003
    Inventors: Hieu Van Tran, William John Saiki
  • Publication number: 20030128560
    Abstract: A high voltage generator provides high voltage signals with different regulated voltage levels. A charge pump generates the high voltage, and includes a quadrature phase forward and backward Vt-canceling high-voltage self-biasing charge pump with a powerup-assist diode. A high voltage series regulator generates the high voltage supply levels, and includes slew rate enhancement and trimmable diode regulation. A nested loop regulator eliminates shunt regulation.
    Type: Application
    Filed: January 10, 2002
    Publication date: July 10, 2003
    Inventors: William John Saiki, Hieu Van Tran, Sakhawat M. Khan
  • Publication number: 20030128072
    Abstract: An operational amplifier comprises multiple stages. A differential input stage that includes an adaptive high voltage differential pair generates up and down output currents in response to up and down input voltages. The differential input stage includes adaptive common input high voltage (HV) bias. An intermediate stage converts the up and down output currents into a first output voltage signal. The intermediate stage includes a folded cascode arrangement. The intermediate stage is biased by fixed voltage bias signals. The intermediate stage also includes unaffected slew rate stability compensation and a combined split stability compensation. An output stage includes a class AB source follower driver that generates a second output voltage signal in response to the first output voltage signal. The output stage is biased with an adaptive push-pull source follower output HV bias. The output stage includes feed-forward slew rate enhancement.
    Type: Application
    Filed: February 26, 2003
    Publication date: July 10, 2003
    Inventors: Hieu Van Tran, Sakhawat M, Khan, William John Saiki
  • Publication number: 20030128781
    Abstract: The DPIC makes use of the D detected symbols from the output of the Slicer to estimate the precursor ISI which still exists at the input sample of the Slicer. The estimation of the residual ISI value is done by a D-tap Finite Impulse Filter (FIR). This D-tap FIR has the same structure as the DFE or the Echo or NEXT canceller except the values of the coefficients. Since it calculates, A D-symbol delay element is used to keep the DT-delayed sample, from which the corresponding residual precursor ISI computed the D-tap FIR, is removed.
    Type: Application
    Filed: January 13, 2003
    Publication date: July 10, 2003
    Inventors: Tho Le-Ngoc, Francois Trans
  • Publication number: 20030129083
    Abstract: Multi-purpose solutions for contact lens care provide substantial lens wearer/user comfort and/or acceptability. Such solutions include an aqueous liquid medium; an antimicrobial component, preferably a biguanide polymer present in an amount of less than about 5 ppm; propylene glycol or glycerin in an amount sufficient to increase antimicrobial activity; a surfactant component, preferably a poly(oxyethylene)-poly(oxypropylene) block copolymer surfactant, in an effective amount; a phosphate buffer component in an effective amount; a viscosity inducing component, preferably selected from cellulosic derivatives, in an effective amount; and a tonicity component in an effective amount. Such solutions have substantial performance, comfort and acceptability benefits, which, ultimately, lead to ocular health advantages and avoidance of problems caused by contact lens wear.
    Type: Application
    Filed: November 18, 2002
    Publication date: July 10, 2003
    Applicant: ADVANCED MEDICAL OPTICS, INC.
    Inventors: Richard S. Graham, Lam N. Tran
  • Publication number: 20030130274
    Abstract: The present invention relates to new 2-Phenyl-1-[4-(2-Aminoethoxy)-Benzyl]-Indole compounds which are useful as estrogenic agents, as well as pharmaceutical compositions and methods of treatment utilizing these compounds, which have the general structures below: 1
    Type: Application
    Filed: July 10, 2002
    Publication date: July 10, 2003
    Applicant: Wyeth
    Inventors: Chris P. Miller, Michael D. Collini, Bach D. Tran, Arthur A. Santilli
  • Patent number: 6588070
    Abstract: A low profile pipe leak repair clamp for sealing a leak in a wide range of pipe sizes includes a flexible, circular metal band lined with a sealing gasket. The clamp a tightening assembly comprising a pair of open and close lugs and a nut and bolt for tightening the band around a leaking pipe. Each lug includes an open slot leading to an inner recess adapted to firmly engage a folded end of the flexible metal band, the recess being of such dimensions as to maintain each folded end in its original shape, thus preventing the metal band from being pulled from the slot upon tightening the clamp. Each lug has an upper jaw and a lower pressure jaw forming the slot and recess. The lower pressure jaw is arcuate at its end and its lower surface chamfered downward to the lower lug surface.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: July 8, 2003
    Inventor: Hai Tran
  • Patent number: 6590453
    Abstract: An operational amplifier comprises multiple stages. A differential input stage that includes an adaptive high voltage differential pair generates up and down output currents in response to up and down input voltages. The differential input stage includes adaptive common input high voltage (HV) bias. An intermediate stage converts the up and down output currents into a first output voltage signal. The intermediate stage includes a folded cascode arrangement. The intermediate stage is biased by fixed voltage bias signals. The intermediate stage also includes unaffected slew rate stability compensation and a combined split stability compensation. An output stage includes a class AB source follower driver that generates a second output voltage signal in response to the first output voltage signal. The output stage is biased with an adaptive push-pull source follower output HV bias. The output stage includes feed-forward slew rate enhancement.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: July 8, 2003
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, Sakhawat M. Khan, William John Saiki
  • Patent number: 6589876
    Abstract: Methods of forming conductive capacitor plugs, methods of forming capacitor contact openings, and methods of forming memory arrays are described. In one embodiment, a conductive capacitor plug is formed to extend from proximate a substrate node location to a location elevationally above all conductive material of an adjacent bit line. In another embodiment, a capacitor contact opening is etched through a first insulative material received over a bit line and a word line substantially selective relative to a second insulative material covering portions of the bit line and the word line. The opening is etched to a substrate location proximate the word line in a self-aligning manner relative to both the bit line and the word line. In another embodiment, capacitor contact openings are formed to elevationally below the bit lines after the bit lines are formed. In a preferred embodiment, capacitor-over-bit line memory arrays are formed.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: July 8, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Luan C. Tran
  • Patent number: 6589408
    Abstract: A non-planar target can be configured for use in a plasma vapor deposition (PVD) process in which ions bombard the non-planar target and cause alloy atoms present in the non-planar target to be knocked loose and form an alloy film layer. The target includes a top planar section having a first alloy concentration and a side annular section having a second alloy concentration. The side annular section has ends coupled to ends of the top planar section. The first alloy concentration and the second alloy concentration are different.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: July 8, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Pin-Chin Connie Wang, Paul R. Besser, Sergey D. Lopatin, Minh Q. Tran