Patents by Inventor Themistoklis Prodromakis

Themistoklis Prodromakis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240265248
    Abstract: A fuzzy logic gate comprising an input node configured to receive an analogue input signal. A complementary metal oxide semiconductor (CMOS) logic gate is connected to the input node. A tunable load is connected to the CMOS logic gate such that the tunable load is provided on a current path connected to an output node. The output node is configured to output an analogue output signal.
    Type: Application
    Filed: March 21, 2024
    Publication date: August 8, 2024
    Applicant: UNIVERSITY COURT OF THE UNIVERSITY OF EDINBURGH
    Inventors: Alexantrou SERB, Themistoklis PRODROMAKIS
  • Patent number: 11966834
    Abstract: A tunable CMOS circuit comprising a CMOS element and a tunable load. The CMOS element is configured to receive an analogue input signal. The tunable load is connected to the CMOS element and configured to set a switch point of the CMOS element. The CMOS element is configured to output an output current that is largest when the analogue input signal is equal to the switch point. The combination of a CMOS element with a tunable load may also provide a hardware implementation of fuzzy logic. A fuzzy logic gate comprises an input node, a CMOS logic gate, a tunable load, and an output node. The input node is configured to receive an analogue input signal. The CMOS logic gate is connected to the input node. The tunable load is connected to the CMOS logic gate such that the tunable load is provided on a current path connected to the output node. The output node is configured to output an analogue output signal.
    Type: Grant
    Filed: April 26, 2023
    Date of Patent: April 23, 2024
    Assignee: THE UNIVERSITY COURT OF THE UNIVERSITY OF EDINBURGH
    Inventors: Alexantrou Serb, Themistoklis Prodromakis
  • Publication number: 20230259751
    Abstract: A tunable CMOS circuit comprising a CMOS element and a tunable load. The CMOS element is configured to receive an analogue input signal. The tunable load is connected to the CMOS element and configured to set a switch point of the CMOS element. The CMOS element is configured to output an output current that is largest when the analogue input signal is equal to the switch point. The combination of a CMOS element with a tunable load may also provide a hardware implementation of fuzzy logic. A fuzzy logic gate comprises an input node, a CMOS logic gate, a tunable load, and an output node. The input node is configured to receive an analogue input signal. The CMOS logic gate is connected to the input node. The tunable load is connected to the CMOS logic gate such that the tunable load is provided on a current path connected to the output node. The output node is configured to output an analogue output signal.
    Type: Application
    Filed: April 26, 2023
    Publication date: August 17, 2023
    Applicant: UNIVERSITY OF SOUTHAMPTON
    Inventors: Alexantrou SERB, Themistoklis PRODROMAKIS
  • Patent number: 11669721
    Abstract: A tunable CMOS circuit comprising a CMOS element and a tunable load. The CMOS element is configured to receive in an analogue input signal. The tunable load is connected to the CMOS element and configured to set a switch point of the CMOS element. The CMOS element is configured to output an output current that is largest when the analogue input signal is equal to the switch point. The combination of a CMOS element with a tunable load may also provide a hardware implementation of fuzzy logic. A fuzzy logic gate comprises an input node, a CMOS logic gate including a tunable load, and an output node. The input node is configured to receive an analogue input signal. The CMOS logic gate is connected to the input node. The tunable load is provided on a current path connected to the output node. The output node is configured to output an analogue output signal.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: June 6, 2023
    Assignee: UNIVERSITY OF SOUTHAMPTON
    Inventors: Alexantrou Serb, Themistoklis Prodromakis
  • Patent number: 11622731
    Abstract: The present invention provides a method and system for processing data from an event, such as a neurological event. When a neurological event occurs, a spike in a neural waveform is generated. The spike can be detected and used to determine information about the neurological event. The method uses data values from a resistive switching component capable of undergoing a resistive state change when a voltage is applied to it. The data values represent a sequence of resistive state changes of the resistive switching component which correspond to the neurological event. The method further comprises processing the received data values to identify a resistive state change corresponding to the neurological event and to obtain information about the neurological event. Thus, a method and system for processing neural spikes is provided.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: April 11, 2023
    Assignee: UNIVERSITY OF SOUTHAMPTON
    Inventors: Isha Gupta, Alexantrou Serb, Themistoklis Prodromakis
  • Patent number: 11596364
    Abstract: The present invention provides a method for detecting events in an input signal. The method uses a volatile resistive switching component to detect the events in the input signal. The method comprising identifying the events based on sampling an output from the resistive switching component.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: March 7, 2023
    Assignee: UNIVERSITY OF SOUTHAMPTON
    Inventors: Isha Gupta, Alexantrou Serb, Themistoklis Prodromakis
  • Publication number: 20210004669
    Abstract: A tunable CMOS circuit comprising a CMOS element and a tunable load. The CMOS element is configured to receive in an analogue input signal. The tunable load is connected to the CMOS element and configured to set a switch point of the CMOS element. The CMOS element is configured to output an output current that is largest when the analogue input signal is equal to the switch point. The combination of a CMOS element with a tunable load may also provide a hardware implementation of fuzzy logic. A fuzzy logic gate comprises an input node, a CMOS logic gate including a tunable load, and an output node. The input node is configured to receive an analogue input signal. The CMOS logic gate is connected to the input node. The tunable load is provided on a current path connected to the output node. The output node is configured to output an analogue output signal.
    Type: Application
    Filed: May 29, 2018
    Publication date: January 7, 2021
    Applicant: UNIVERSITY OF SOUTHAMPTON
    Inventors: Alexantrou SERB, Themistoklis PRODROMAKIS
  • Publication number: 20190269372
    Abstract: The present invention provides a method for detecting events in an input signal. The method volatile resistive switching component to detect the events in the input signal. The method comprising identifying the events based on sampling an output from the resistive switching component.
    Type: Application
    Filed: October 16, 2017
    Publication date: September 5, 2019
    Applicant: UNIVERSITY OF SOUTHAMPTON
    Inventors: Isha GUPTA, Alexantrou SERB, Themistoklis PRODROMAKIS
  • Publication number: 20190246993
    Abstract: The present invention provides a method and system for processing data from an event, such as a neurological event. When a neurological event occurs, a spike in a neural waveform is generated. The spike can be detected and used to determine information about the neurological event. The method uses data values from a resistive switching component capable of undergoing a resistive state change when a voltage is applied to it. The data values represent a sequence of resistive state changes of the resistive switching component which correspond to the neurological event. The method further comprises processing the received data values to identify a resistive state change corresponding to the neurological event and to obtain information about the neurological event. Thus, a method and system for processing neural spikes is provided.
    Type: Application
    Filed: October 16, 2017
    Publication date: August 15, 2019
    Applicant: UNIVERSITY OF SOUTHAMPTON
    Inventors: Isha GUPTA, Alexantrou SERB, Themistoklis PRODROMAKIS
  • Publication number: 20130130261
    Abstract: A sensor comprising a memory device having a first electrode and a first chemical-sensing layer coupled to the first electrode. The chemical-sensing layer, in the presence of an analyte, is arranged to change a property of the Memristive device. The sensor can detect an analyte by providing a sample to be detected proximate the chemical sensing layer, observing the state of the memory element; and determining a property of the sample by comparing the observed state of the memory element with a previous state. The sensor is manufactured by depositing a second electrode on a surface, depositing an active layer or layers onto said second electrode, depositing a first electrode onto said active layer(s), and coupling a chemically sensitive layer to the first electrode.
    Type: Application
    Filed: September 6, 2011
    Publication date: May 23, 2013
    Applicant: VAGONYX LIMITED
    Inventors: Themistoklis Prodromakis, Christofer Toumazou
  • Publication number: 20130098780
    Abstract: A sensor system comprising a substrate and integrated onto the substrate an array (7) of sensor elements (1), each sensor element comprising one or more inductors (3), one or more electrochemical sensors (4), and one or more optical sensors (2). The system further comprising a controller configured in use to separately address each of the sensor elements (1) to drive the respective inductors and receive outputs of the respective sensors.
    Type: Application
    Filed: January 28, 2011
    Publication date: April 25, 2013
    Applicant: DNA Electronics Limited
    Inventors: Pantelis Georgiou, Themistoklis Prodromakis, Timothy G. Constandinou, Christofer Toumazou
  • Publication number: 20130087755
    Abstract: A method of manufacturing an electrically actuable switch and comprising: depositing a first electrode on a surface; depositing an active layer or layers on top of said first electrode; and depositing a second electrode on top of said active layer(s), wherein said step of depositing an active layer or layers is performed in an atmosphere into which a reactive gas is introduced, the partial pressure of the reactive gas being varied during the process so as to introduce dopants into the active layer in a concentration which varies across the active layer.
    Type: Application
    Filed: January 6, 2011
    Publication date: April 11, 2013
    Inventors: Themistoklis Prodromakis, Christofer Toumazou, Konstantinos Michelakis