Patents by Inventor Theresa A. Sitnik

Theresa A. Sitnik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5576517
    Abstract: An electronic structure includes a circuit chip having chip pads and supported by a substrate, and a low dielectric constant porous polymer layer having pores and situated over the substrate and circuit chip. The porous polymer layer has at least one via therein aligned with at least one of the chip pads, and a pattern of electrical conductors extends over a portion of the porous polymer layer and into the at least one via. The pattern of electrical conductors does not significantly protrude into the pores of the porous polymer layer.
    Type: Grant
    Filed: March 27, 1995
    Date of Patent: November 19, 1996
    Assignee: General Electric Company
    Inventors: Robert J. Wojnarowski, Herbert S. Cole, Theresa A. Sitnik-Nieters, Wolfgang Daum
  • Patent number: 5554305
    Abstract: A method for processing a low dielectric constant material includes dispersing an additive material in a porous low dielectric constant layer, fabricating a desired electronic structure, and then removing the additive material from the pores of the low dielectric constant layer. The removal of the additive material from the pores can be accomplished by sublimation, evaporation, and diffusion. Applications for the low dielectric constant layer include the use as an overlay layer for interconnecting a circuit chip supported by a substrate and the use as printed circuit board material.
    Type: Grant
    Filed: March 27, 1995
    Date of Patent: September 10, 1996
    Assignee: General Electric Company
    Inventors: Robert J. Wojnarowski, Herbert S. Cole, Theresa A. Sitnik-Nieters, Wolfgang Daum
  • Patent number: 5548099
    Abstract: In a method for preserving an air bridge structure on an integrated circuit chip, without sacrificing metallization routing area in an overlying high density interconnect structure, a protective layer is sublimed over the air bridge to provide mechanical strength while preventing contamination and deformation during processing. A high density interconnect structure is applied over the chip and protective layer. A small portion of the high density interconnect structure is removed from the area over the air bridge structure, and the protective layer is then sublimed away, leaving the resultant structure with an undamaged air bridge which is free of residue.
    Type: Grant
    Filed: September 13, 1994
    Date of Patent: August 20, 1996
    Assignee: Martin Marietta Corporation
    Inventors: Herbert S. Cole, Jr., Theresa A. Sitnik-Nieters
  • Patent number: 5449427
    Abstract: A method for processing a low dielectric constant material includes dispersing an additive material in a porous low dielectric constant layer, fabricating a desired electronic structure, and then removing the additive material from the pores of the low dielectric constant layer. The removal of the additive material from the pores can be accomplished by sublimation, evaporation, and diffusion. Applications for the low dielectric constant layer include the use as an overlay layer for interconnecting a circuit chip supported by a substrate and the use as printed circuit board material.
    Type: Grant
    Filed: May 23, 1994
    Date of Patent: September 12, 1995
    Assignee: General Electric Company
    Inventors: Robert J. Wojnarowski, Herbert S. Cole, Theresa A. Sitnik-Nieters, Wolfgang Daum
  • Patent number: 5434751
    Abstract: A multichip module (incorporating a high density interconnect structure) has: a first portion containing a substrate with semiconductor chips therein, with each chip having contact pads; a second portion comprising a (HDI) structure interconnecting the chip pads; and a solvent-soluble release layer bonding the two portions together and allowing for easy removal of the HDI structure from the substrate of the module by immersion in an appropriate solvent for the release layer.
    Type: Grant
    Filed: April 11, 1994
    Date of Patent: July 18, 1995
    Assignee: Martin Marietta Corporation
    Inventors: Herbert S. Cole, Jr., Theresa A. Sitnik-Nieters, Robert J. Wojnarowski, John H. Lupinski
  • Patent number: 5401687
    Abstract: In a method for preserving an air bridge structure on an integrated circuit chip used in an overlay process, a patternable protective layer is applied for providing mechanical strength to prevent deformation during subsequent processing. A polymeric film layer is applied over the chip and protective layer, and interconnections are fabricated through the polymeric film layer. The polymeric film layer is removed from the area over the air bridge structure. The patternable protective layer is then removed, leaving the resultant structure with an undamaged air bridge which is free of residue.
    Type: Grant
    Filed: April 15, 1993
    Date of Patent: March 28, 1995
    Assignee: Martin Marietta Corporation
    Inventors: Herbert S. Cole, Theresa A. Sitnik-Nieters, Bernard Gorowitz
  • Patent number: 5300812
    Abstract: A plasticized polyetherimide, such as a blend of polyetherimide and a pentaerythritol tetrabenzoate ester, has been found useful as a low temperature laminating adhesive for making high density interconnect circuit arrays.
    Type: Grant
    Filed: December 9, 1992
    Date of Patent: April 5, 1994
    Assignee: General Electric Company
    Inventors: John H. Lupinski, Theresa A. Sitnik, Thomas B. Gorczyca, Steven T. Rice, Herbert S. Cole
  • Patent number: 5091466
    Abstract: A polyhydrazine is used to insolubilize a soluble polyimide. Soluble polyimide films on printed circuit boards can be insolubilized in this manner.
    Type: Grant
    Filed: April 23, 1990
    Date of Patent: February 25, 1992
    Assignee: General Electric Company
    Inventors: Siegfried Aftergut, Theresa A. Sitnik
  • Patent number: 5008049
    Abstract: A device containing a fluid material is sealed by sealant material placed essentially completely around the periphery of the device to join spaced apart first and second members of the device; and aperture is formed through the seal and the device interior is evacuated. Then fluid material is introduced into the device interior through the aperture and only a limited region of the device, confined substantially to the aperture is exposed to electromagnetic radiation from a laser or the like, to hermetically close the aperture when a photoreactive adhesive is injected into the aperture to cause the adhesive to solidify when contacted by the electromagnetic radiation. In an alternate embodiment, the aperture is filled with a plug of thermoplastic material, which is then selectively heat treated by a laser or the like to cause the plug to bind to the aperture boundary and hermetically enclose the fluid material.
    Type: Grant
    Filed: September 21, 1989
    Date of Patent: April 16, 1991
    Assignee: General Electric Company
    Inventors: James W. Rose, Theresa A. Sitnik
  • Patent number: 4865873
    Abstract: A metal is electrolessly plated on a substrate which is first coated with at least one ablatively-removable layer that is selectively irradiated with laser radiation to obtain a pattern for the deposition of metal on the substrate. The electroless plating solution applied to the substrate after the irradiated substrate is coated with a catalyst also serves to remove the unirradiated portion of the ablatively-removable layer. The method is particularly suited for plating fine lines of metal, especially on non-planar surfaces.
    Type: Grant
    Filed: December 7, 1987
    Date of Patent: September 12, 1989
    Assignee: General Electric Company
    Inventors: Herbert S. Cole, Jr., Lionel M. Levinson, Yung S. Liu, Theresa A. Sitnik