Patents by Inventor Theresa Kramer Guarini
Theresa Kramer Guarini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210010160Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.Type: ApplicationFiled: September 29, 2020Publication date: January 14, 2021Inventors: Christopher S. OLSEN, Theresa Kramer GUARINI, Jeffrey A. TOBIN, Lara HAWRYLCHAK, Peter STONE, Chi Wei LO, Saurabh CHOPRA
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Publication number: 20200161171Abstract: Generally, examples described herein relate to methods and processing systems for forming isolation structures (e.g., shallow trench isolations (STIs)) between fins on a substrate. In an example, fins are formed on a substrate. A liner layer is conformally formed on and between the fins. Forming the liner layer includes conformally depositing a pre-liner layer on and between the fins, and densifying, using a plasma treatment, the pre-liner layer to form the liner layer. A dielectric material is formed on the liner layer.Type: ApplicationFiled: September 23, 2019Publication date: May 21, 2020Inventors: Benjamin COLOMBEAU, Theresa Kramer GUARINI, Malcolm BEVAN, Rui CHENG
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Publication number: 20200111659Abstract: A method of modifying a layer in a semiconductor device is provided. The method includes depositing a low quality film on a semiconductor substrate, and exposing a surface of the low quality film to a first process gas comprising helium while the substrate is heated to a first temperature, and exposing a surface of the low quality film to a second process gas comprising oxygen gas while the substrate is heated to a second temperature that is different than the first temperature. The electrical properties of the film are improved by undergoing the aforementioned processes.Type: ApplicationFiled: October 4, 2018Publication date: April 9, 2020Inventors: Wei LIU, Theresa Kramer GUARINI, Linlin WANG, Malcolm BEVAN, Johanes S. SWENBERG, Vladimir NAGORNY, Bernard L. HWANG, Kin Pong LO, Lara HAWRYLCHAK, Rene GEORGE
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Patent number: 10573719Abstract: Embodiments described herein generally relate to methods and apparatus for horizontal gate all around (hGAA) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. The different materials may be silicon containing materials and one or more III/V materials. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.Type: GrantFiled: September 28, 2016Date of Patent: February 25, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Shiyu Sun, Naomi Yoshida, Theresa Kramer Guarini, Sung Won Jun, Benjamin Colombeau, Michael Chudzik
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Publication number: 20200035822Abstract: Embodiments described herein generally relate to methods and device structures for horizontal gate all around (hGAA) isolation and fin field effect transistor (FinFET) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.Type: ApplicationFiled: October 3, 2019Publication date: January 30, 2020Inventors: Shiyu SUN, Naomi YOSHIDA, Theresa Kramer GUARINI, Sung Won JUN, Vanessa PENA, Errol Antonio C. SANCHEZ, Benjamin COLOMBEAU, Michael CHUDZIK, Bingxi WOOD, Nam Sung KIM
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Publication number: 20190385825Abstract: Embodiments described herein generally relate to a method and apparatus for fabricating a chamber component for a plasma process chamber. In one embodiment a chamber component used within a plasma processing chamber is provided that includes a metallic base material comprising a roughened non-planar first surface, wherein the roughened non-planar surface has an Ra surface roughness of between 4 micro-inches and 80 micro-inches, a planar silica coating formed over the roughened non-planar surface, wherein the planar silica coating has a surface that has an Ra surface roughness that is less than the Ra surface roughness of the roughened non-planar surface, a thickness between about 0.2 microns and about 10 microns, less than 1% porosity by volume, and contains less than 2E12 atoms/centimeters2 of aluminum.Type: ApplicationFiled: May 21, 2019Publication date: December 19, 2019Inventors: Jian WU, Wei LIU, Theresa Kramer GUARINI, Linlin WANG, Malcolm BEVAN, Lara HAWRYLCHAK
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Patent number: 10490666Abstract: Embodiments described herein generally relate to methods and device structures for horizontal gate all around (hGAA) isolation and fin field effect transistor (FinFET) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.Type: GrantFiled: November 6, 2017Date of Patent: November 26, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Shiyu Sun, Nam Sung Kim, Naomi Yoshida, Theresa Kramer Guarini, Sung Won Jun, Vanessa Pena, Errol Antonio C. Sanchez, Benjamin Colombeau, Michael Chudzik, Bingxi Wood
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Patent number: 10290504Abstract: Embodiments described herein generally relate to a method and apparatus for plasma treating a process chamber. A substrate having a gate stack formed thereon may be placed in a process chamber, and hydrogen containing plasma may be used to treat the gate stack in order to cure the defects in the gate stack. As the result of hydrogen containing plasma treatment, the gate stack has lower leakage and improved reliability. To protect the process chamber from Hx+ ions and H* radicals generated by the hydrogen containing plasma, the process chamber may be treated with a plasma without the substrate placed therein and prior to the hydrogen containing plasma treatment. In addition, components of the process chamber that are made of a dielectric material may be coated with a ceramic coating including an yttrium containing oxide in order to protect the components from the plasma.Type: GrantFiled: November 27, 2017Date of Patent: May 14, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Wei Liu, Theresa Kramer Guarini, Huy Q. Nguyen, Malcolm Bevan, Houda Graoui, Philip A. Bottini, Bernard L. Hwang, Lara Hawrylchak, Rene George
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Publication number: 20180211833Abstract: Processing platforms having a central transfer station with a robot and an environment having greater than or equal to about 0.1% by weight water vapor, a pre-clean chamber connected to a side of the transfer station and a batch processing chamber connected to a side of the transfer station. The processing platform configured to pre-clean a substrate to remove native oxides from a first surface, form a blocking layer using a alkylsilane and selectively deposit a film. Methods of using the processing platforms and processing a plurality of wafers are also described.Type: ApplicationFiled: January 24, 2018Publication date: July 26, 2018Inventors: Ning Li, Mihaela Balseanu, Li-Qun Xia, Dongqing Yang, Lala Zhu, Malcolm J. Bevan, Theresa Kramer Guarini, Wenbo Yan
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Publication number: 20180082847Abstract: Embodiments described herein generally relate to a method and apparatus for plasma treating a process chamber. A substrate having a gate stack formed thereon may be placed in a process chamber, and hydrogen containing plasma may be used to treat the gate stack in order to cure the defects in the gate stack. As the result of hydrogen containing plasma treatment, the gate stack has lower leakage and improved reliability. To protect the process chamber from Hx+ ions and H* radicals generated by the hydrogen containing plasma, the process chamber may be treated with a plasma without the substrate placed therein and prior to the hydrogen containing plasma treatment. In addition, components of the process chamber that are made of a dielectric material may be coated with a ceramic coating including an yttrium containing oxide in order to protect the components from the plasma.Type: ApplicationFiled: November 27, 2017Publication date: March 22, 2018Inventors: Wei LIU, Theresa Kramer GUARINI, Huy Q. NGUYEN, Malcolm BEVAN, Houda GRAOUI, Philip A. BOTTINI, Bernard L. HWANG, Lara HAWRYLCHAK, Rene GEORGE
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Publication number: 20180061978Abstract: Embodiments described herein generally relate to methods and device structures for horizontal gate all around (hGAA) isolation and fin field effect transistor (FinFET) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.Type: ApplicationFiled: November 6, 2017Publication date: March 1, 2018Inventors: Shiyu SUN, Naomi YOSHIDA, Theresa Kramer GUARINI, Sung Won JUN, Vanessa PENA, Errol Antonio C. SANCHEZ, Benjamin COLOMBEAU, Michael CHUDZIK, Bingxi Sun WOOD, Nam Sung KIM
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Patent number: 9865735Abstract: Embodiments described herein generally relate to methods and device structures for horizontal gate all around (hGAA) isolation and fin field effect transistor (FinFET) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.Type: GrantFiled: May 11, 2016Date of Patent: January 9, 2018Assignee: Applied Materials, Inc.Inventors: Shiyu Sun, Naomi Yoshida, Theresa Kramer Guarini, Sung Won Jun, Vanessa Pena, Errol Antonio C. Sanchez, Benjamin Colombeau, Michael Chudzik, Bingxi Wood, Nam Sung Kim
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Patent number: 9831091Abstract: Embodiments described herein generally relate to a method and apparatus for plasma treating a process chamber. A substrate having a gate stack formed thereon may be placed in a process chamber, and hydrogen containing plasma may be used to treat the gate stack in order to cure the defects in the gate stack. As the result of hydrogen containing plasma treatment, the gate stack has lower leakage and improved reliability. To protect the process chamber from Hx+ ions and H* radicals generated by the hydrogen containing plasma, the process chamber may be treated with a plasma without the substrate placed therein and prior to the hydrogen containing plasma treatment. In addition, components of the process chamber that are made of a dielectric material may be coated with a ceramic coating including an yttrium containing oxide in order to protect the components from the plasma.Type: GrantFiled: June 2, 2016Date of Patent: November 28, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Wei Liu, Theresa Kramer Guarini, Huy Q. Nguyen, Malcolm Bevan, Houda Graoui, Philip A. Bottini, Bernard L. Hwang, Lara Hawrylchak, Rene George
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Publication number: 20170018624Abstract: Embodiments described herein generally relate to methods and apparatus for horizontal gate all around (hGAA) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. The different materials may be silicon containing materials and one or more III/V materials. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.Type: ApplicationFiled: September 28, 2016Publication date: January 19, 2017Inventors: Shiyu SUN, Naomi YOSHIDA, Theresa Kramer GUARINI, Sung Won JUN, Benjamin COLOMBEAU, Michael CHUDZIK
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Publication number: 20160358781Abstract: Embodiments described herein generally relate to a method and apparatus for plasma treating a process chamber. A substrate having a gate stack formed thereon may be placed in a process chamber, and hydrogen containing plasma may be used to treat the gate stack in order to cure the defects in the gate stack. As the result of hydrogen containing plasma treatment, the gate stack has lower leakage and improved reliability. To protect the process chamber from Hx+ ions and H* radicals generated by the hydrogen containing plasma, the process chamber may be treated with a plasma without the substrate placed therein and prior to the hydrogen containing plasma treatment. In addition, components of the process chamber that are made of a dielectric material may be coated with a ceramic coating including an yttrium containing oxide in order to protect the components from the plasma.Type: ApplicationFiled: June 2, 2016Publication date: December 8, 2016Inventors: Wei LIU, Theresa Kramer GUARINI, Huy Q. NGUYEN, Malcolm BEVAN, Houda GRAOUI, Philip A. BOTTINI, Bernard L. HWANG, Lara HAWRYLCHAK, Rene GEORGE
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Publication number: 20160336405Abstract: Embodiments described herein generally relate to methods and device structures for horizontal gate all around (hGAA) isolation and fin field effect transistor (FinFET) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.Type: ApplicationFiled: May 11, 2016Publication date: November 17, 2016Inventors: Shiyu SUN, Naomi YOSHIDA, Theresa Kramer GUARINI, Sung Won JUN, Vanessa PENA, Errol Antonio C. SANCHEZ, Benjamin COLOMBEAU, Michael CHUDZIK, Bingxi WOOD, Nam Sung KIM
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Patent number: 9460920Abstract: Embodiments described herein generally relate to methods and apparatus for horizontal gate all around (hGAA) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. The different materials may be silicon containing materials and one or more III/V materials. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.Type: GrantFiled: June 30, 2015Date of Patent: October 4, 2016Assignee: APPLIED MATERIALS, INC.Inventors: Shiyu Sun, Naomi Yoshida, Theresa Kramer Guarini, Sung Won Jun, Benjamin Colombeau, Michael Chudzik
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Patent number: 9177787Abstract: Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method includes placing a substrate having a first layer disposed thereon on a substrate support of a process chamber; heating the substrate to a first temperature; and exposing the first layer to an RF plasma formed from a process gas comprising ammonia (NH3) to transform the first layer into a nitrogen-containing layer, wherein the plasma has an ion energy of less than about 8 eV.Type: GrantFiled: March 3, 2014Date of Patent: November 3, 2015Assignee: APPLIED MATERIALS, INC.Inventors: Theresa Kramer Guarini, Wei Liu
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Patent number: 9023700Abstract: Methods and apparatus for selective one-step nitridation of semiconductor substrates is provided. Nitrogen is selectively incorporated in silicon regions of a semiconductor substrate having silicon regions and silicon oxide regions by use of a selective nitridation process. Nitrogen containing radicals may be directed toward the substrate by forming a nitrogen containing plasma and filtering or removing ions from the plasma, or a thermal nitridation process using selective precursors may be performed. A remote plasma generator may be coupled to a processing chamber, optionally including one or more ion filters, showerheads, and radical distributors, or an in situ plasma may be generated and one or more ion filters or shields disposed in the chamber between the plasma generation zone and the substrate support.Type: GrantFiled: June 9, 2014Date of Patent: May 5, 2015Assignee: Applied Materials, Inc.Inventors: Udayan Ganguly, Theresa Kramer Guarini, Matthew Scott Rogers, Yoshitaka Yokota, Johanes S. Swenberg, Malcolm J. Bevan
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Publication number: 20140342543Abstract: Methods and apparatus for selective one-step nitridation of semiconductor substrates is provided. Nitrogen is selectively incorporated in silicon regions of a semiconductor substrate having silicon regions and silicon oxide regions by use of a selective nitridation process. Nitrogen containing radicals may be directed toward the substrate by forming a nitrogen containing plasma and filtering or removing ions from the plasma, or a thermal nitridation process using selective precursors may be performed. A remote plasma generator may be coupled to a processing chamber, optionally including one or more ion filters, showerheads, and radical distributors, or an in situ plasma may be generated and one or more ion filters or shields disposed in the chamber between the plasma generation zone and the substrate support.Type: ApplicationFiled: June 9, 2014Publication date: November 20, 2014Inventors: Udayan GANGULY, Theresa Kramer GUARINI, Matthew Scott ROGERS, Yoshitaka YOKOTA, Johanes S. SWENBERG, Malcolm J. BEVAN