Patents by Inventor Thomas H. Lee

Thomas H. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10401135
    Abstract: A munition, such as a warhead, includes a penetrator casing for penetrating hard targets, such as a fortification or reinforced building or other structure, with the penetrator casing having reduced-thickness portions. The reduced-thickness portions provide weak points to the casing that facilitate the casing being transformed into fragments of a desired size/quantity when an explosive within the casing is detonated after the penetration occurs, thus enhancing the effectiveness of the munition. In addition, the warhead may have lethality-enhancing materials, such as additional fragments and/or energetic materials, at the reduced-thickness portions of the penetrator casing. The reduced-thickness portions may be holes, such as longitudinal holes, in the casing, or may be grooves on an inner and/or outer surface of the casing. The munition may be a dual-use munition, with the explosive able to be detonated at a burst height for use of the warhead as a non-penetrating area fragmentation weapon.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: September 3, 2019
    Assignee: Raytheon Company
    Inventors: Thomas H. Bootes, George D. Budy, Wayne Y. Lee, Richard K. Polly, Jason M. Shire, Jesse T. Waddell
  • Publication number: 20190173696
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Application
    Filed: November 7, 2018
    Publication date: June 6, 2019
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • Publication number: 20180254286
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
    Type: Application
    Filed: May 4, 2018
    Publication date: September 6, 2018
    Inventors: Thomas H. Lee, Igor G. Kouznetsov
  • Patent number: 10008511
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: June 26, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventor: Thomas H. Lee
  • Publication number: 20170179603
    Abstract: A device comprising: a substrate; a transmit antenna fabricated on the substrate and configured to transmit radio-frequency (RF) signals; a receive antenna fabricated on the substrate and configured to receive RF signals; and circuitry, disposed on the substrate and differentially coupled to the transmit and receive antennas, and configured to provide to the transmit antenna RF signals to be transmitted by the transmit antenna and to process RF signals received by the receive antenna, wherein the substrate comprises material for reducing harmonic coupling between the transmit antenna and the receive antenna.
    Type: Application
    Filed: December 16, 2016
    Publication date: June 22, 2017
    Applicant: Humatics Corporation
    Inventors: Gregory L. Charvat, Thomas H. Lee, David A. Mindell
  • Publication number: 20170084627
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
    Type: Application
    Filed: December 2, 2016
    Publication date: March 23, 2017
    Inventor: Thomas H. Lee
  • Patent number: 9559110
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive levels is planarized by chemical mechanical polishing.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: January 31, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventor: Thomas H. Lee
  • Publication number: 20160079258
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive levels is planarized by chemical mechanical polishing.
    Type: Application
    Filed: September 16, 2015
    Publication date: March 17, 2016
    Inventor: Thomas H. Lee
  • Patent number: 9214243
    Abstract: A three-dimensional memory is provided that includes a first memory level and a second memory level monolithically formed above the first memory level. The first memory level includes a first steering element coupled in series with and vertically stacked above or below a first non-volatile state change element. The second memory level includes a second steering element coupled in series with and vertically stacked above or below a second non-volatile state change element. Other aspects are also provided.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: December 15, 2015
    Assignee: SanDisk 3D LLC
    Inventors: Mark G. Johnson, Thomas H. Lee, Vivek Subramanian, Paul Michael Farmwald, James M. Cleeves
  • Patent number: 9171857
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: October 27, 2015
    Assignee: SANDISK 3D LLC
    Inventors: Thomas H. Lee, Vivek Subramanian, James M. Cleeves, Igor G. Kouznetsov, Mark G. Johnson, Paul Michael Farmwald
  • Publication number: 20150168482
    Abstract: An electronic component test device capable of testing electronic components in a plurality of test configurations. The device includes a probe head for providing a plurality of probe contact structures to an electronic component to be tested. The device includes an interconnect board coupled to the probe head. The interconnect board includes a plurality of conductive terminals, each of a first subset of the plurality of conductive terminals is coupled to one of a group of electrical signal lines for coupling to different types of external signals. The interconnect board includes a plurality of conductive lines. Each conductive line is coupled between a corresponding one of a plurality of conductive terminals in a second subset of the plurality of conductive terminals and a terminal for coupling to one of the plurality of probe contact structures.
    Type: Application
    Filed: December 12, 2013
    Publication date: June 18, 2015
    Inventors: Todd M. Flynn, Christopher W. Argento, Steven A. Faillaci, Thomas H. Lee
  • Patent number: 8981457
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: March 17, 2015
    Assignee: SanDisk 3D LLC
    Inventors: Thomas H. Lee, Vivek Subramanian, James M. Cleeves, Mark G. Johnson, Paul Michael Farmwald, Igor G. Kouznetzov
  • Publication number: 20150044833
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
    Type: Application
    Filed: September 23, 2014
    Publication date: February 12, 2015
    Inventors: Thomas H. Lee, Vivek Subramanian, James M. Cleeves, Igor G. Kouznetsov, Mark G. Johnson, Paul Michael Farmwald
  • Patent number: 8897056
    Abstract: A pillar-shaped memory cell is provided that includes a steering element, and a non-volatile state change element coupled in series with the steering element. Other aspects are also provided.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: November 25, 2014
    Assignee: SanDisk 3D LLC
    Inventors: Mark G. Johnson, Thomas H. Lee, Vivek Subramanian, Paul Michael Farmwald, James M. Cleeves
  • Patent number: 8853765
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: October 7, 2014
    Assignee: Sandisk 3D LLC
    Inventors: Thomas H. Lee, Vivek Subramanian, James M. Cleeves, Igor G. Kouznetsov, Mark G. Johnson, Paul Michael Farmwald
  • Patent number: 8823076
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: September 2, 2014
    Assignee: SanDisk 3D LLC
    Inventors: Thomas H. Lee, Vivek Subramanian, James M. Cleeves, Igor G. Kouznetzov, Mark G. Johnson, Paul Michael Farmwald
  • Publication number: 20140239248
    Abstract: A three-dimensional memory is provided that includes a first memory level and a second memory level monolithically formed above the first memory level. The first memory level includes a first steering element coupled in series with and vertically stacked above or below a first non-volatile state change element. The second memory level includes a second steering element coupled in series with and vertically stacked above or below a second non-volatile state change element. Other aspects are also provided.
    Type: Application
    Filed: May 6, 2014
    Publication date: August 28, 2014
    Applicant: SanDisk 3D LLC
    Inventors: Mark G. Johnson, Thomas H. Lee, Vivek Subramanian, Paul Michael Farmwald, James M. Cleeves
  • Publication number: 20140225180
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
    Type: Application
    Filed: March 27, 2014
    Publication date: August 14, 2014
    Applicant: SANDISK 3D LLC
    Inventors: Thomas H. Lee, Vivek Subramanian, James M. Cleeves, Igor G. Kouznetsov, Mark G. Johnson, Paul Michael Farmwald
  • Publication number: 20140217491
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
    Type: Application
    Filed: March 27, 2014
    Publication date: August 7, 2014
    Applicant: SANDISK 3D LLC
    Inventors: Thomas H. Lee, Vivek Subramanian, James M. Cleeves, Igor G. Kouznetzov, Mark G. Johnson, Paul Michael Farmwald
  • Patent number: D858327
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: September 3, 2019
    Assignee: Applied Ideation, LLC
    Inventors: Taylor E. Matthews, Jin H. Lee, Thomas A. Jung