Patents by Inventor Thomas Happ

Thomas Happ has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTEGRATED CIRCUIT WITH RESISTIVITY CHANGING MATERIAL HAVING A STEP-LIKE PROGRAMMING CHARACTERISTITIC
    Publication number: 20080019257
    Abstract: A memory cell includes a first electrode, a second electrode, and phase change material contacting the first electrode and the second electrode. The phase change material has a step-like programming characteristic. The first electrode, the second electrode, and the phase change material form a planar or bridge phase change memory cell.
    Type: Application
    Filed: July 18, 2006
    Publication date: January 24, 2008
    Inventors: Jan Boris Philipp, Thomas Happ
  • Phase change memory cell including nanocomposite insulator
    Publication number: 20080017842
    Abstract: A memory cell includes a first electrode, a second electrode, storage material positioned between the first electrode and the second electrode, and a nanocomposite insulator contacting the storage material.
    Type: Application
    Filed: July 20, 2006
    Publication date: January 24, 2008
    Inventors: Thomas Happ, Jan Boris Philipp
  • INTEGRATED CIRCUIT WITH MEMORY HAVING A STEP-LIKE PROGRAMMING CHARACTERISTIC
    Publication number: 20080017894
    Abstract: A memory cell includes a first electrode, a second electrode, and phase change material between the first electrode and the second electrode. The phase change material has a step-like programming characteristic. The first electrode, the second electrode, and the phase change material form a via or trench memory cell.
    Type: Application
    Filed: July 18, 2006
    Publication date: January 24, 2008
    Inventors: Thomas Happ, Jan Boris Philipp
  • Resistive semiconductor element based on a solid-state ion conductor
    Patent number: 7319235
    Abstract: A nonvolatile, resistively switching memory cell has a layer of a porous dielectric between a first electrode. The dielectric is not a chalcogenide.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: January 15, 2008
    Assignee: Infineon Technologies AG
    Inventor: Thomas Happ
  • Integrated circuit havng a memory cell
    Publication number: 20080006811
    Abstract: A memory cell includes a first electrode and an opposing second electrode, and a memory stack between the first and second electrodes. The memory stack includes a first layer of thermal isolation material contacting the first electrode, a second layer of thermal isolation material contacting the second electrode, and a phase change material between the first layer of thermal isolation material and the second layer of thermal isolation material. In this regard, the phase change material defines an active region width that is less than a width of either of the first layer of thermal isolation material and the second layer of thermal isolation material.
    Type: Application
    Filed: July 10, 2006
    Publication date: January 10, 2008
    Inventors: Jan Boris Philipp, Thomas Happ
  • Memory cell programmed using a temperature controlled set pulse
    Publication number: 20070297221
    Abstract: A memory device includes a phase change memory cell and a circuit. The circuit is for programming the memory cell to a selected one of more than two states by applying a temperature controlled set pulse to the memory cell.
    Type: Application
    Filed: June 19, 2006
    Publication date: December 27, 2007
    Inventors: Jan Boris Philipp, Thomas Happ
  • Intergrated circuit having a precharging circuit
    Publication number: 20070285976
    Abstract: A memory includes a phase change element having a first side and a second side and a first line coupled to the first side of the element. The memory includes an access device coupled to the second side of the element and a second line coupled to the access device for controlling the access device. The memory includes a circuit for precharging the first line to a first voltage and for applying a voltage pulse to the second line such that a current pulse is generated through the access device to the element to program the element to a selected one of more than two states. The voltage pulse has an amplitude based on the selected state.
    Type: Application
    Filed: June 9, 2006
    Publication date: December 13, 2007
    Inventors: Thomas Happ, Jan Boris Philipp, Ming-Hsiu Lee
  • Phase change memory having temperature budget sensor
    Publication number: 20070280023
    Abstract: A semiconductor device includes a plurality of memory cells, a temperature budget sensor, and a circuit. The circuit periodically compares a signal from the temperature budget sensor to a reference signal and refreshes the memory cells based on the comparison.
    Type: Application
    Filed: May 18, 2006
    Publication date: December 6, 2007
    Inventors: Thomas Happ, Jan Philipp
  • High density memory array for low power application
    Publication number: 20070279962
    Abstract: A memory device includes a first bit line in a first conducting layer and a second bit line parallel to the first bit line. The second bit line is in a second conducting layer. The memory device includes a MOS select transistor and a word line coupled to a gate of the MOS select transistor. The word line is at an angle with respect to the first bit line and the second bit line. The memory device includes a first resistive memory element coupled between a source of the MOS select transistor and the first bit line. The memory device includes a second resistive memory element coupled between a drain of the MOS select transistor and the second bit line.
    Type: Application
    Filed: January 5, 2007
    Publication date: December 6, 2007
    Inventors: Thomas Nirschl, Thomas Happ
  • Memory cell including doped phase change material
    Publication number: 20070267620
    Abstract: A phase change memory cell includes a phase change material doped with a first material having a resistivity that decreases less than one decade per 20 degrees Celsius when transitioning from an amorphous state to a crystalline state.
    Type: Application
    Filed: May 18, 2006
    Publication date: November 22, 2007
    Inventor: Thomas Happ
  • Memory cell having sidewall spacer for improved homogeneity
    Publication number: 20070246782
    Abstract: A memory cell includes a first electrode, a second electrode, a layer of phase change material extending from a first contact with the first electrode to a second contact with the second electrode, and a sidewall spacer contacting the second electrode and a sidewall of the layer of phase change material adjacent to the second contact.
    Type: Application
    Filed: April 19, 2006
    Publication date: October 25, 2007
    Inventors: Jan Philipp, Thomas Happ
  • Memory having storage locations within a common volume of phase change material
    Publication number: 20070247898
    Abstract: A memory includes a volume of phase change material, a first transistor coupled to the volume of phase change material for accessing a first storage location within the volume of phase change material, and a second transistor coupled to the volume of phase change material for accessing a second storage location within the volume of phase change material.
    Type: Application
    Filed: April 7, 2006
    Publication date: October 25, 2007
    Inventors: Thomas Nirschl, Thomas Happ, Jan Philipp
  • Phase change memory fabricated using self-aligned processing
    Publication number: 20070230237
    Abstract: A memory includes transistors in rows and columns providing an array, conductive lines in columns across the array, and phase change elements contacting the conductive lines and self-aligned to the conductive lines. The memory includes bottom electrodes contacting the phase change elements, each bottom electrode self-aligned to a conductive line and coupled to one side of a source-drain path of a transistor.
    Type: Application
    Filed: March 2, 2006
    Publication date: October 4, 2007
    Inventors: Ulrike Schwerin, Thomas Happ
  • Phase change memory fabricated using self-aligned processing
    Publication number: 20070230238
    Abstract: A memory includes transistors in rows and columns providing an array and conductive lines in columns across the array. The memory includes phase change elements contacting the conductive lines and self-aligned to the conductive lines. Each phase change element is coupled to one side of a source-drain path of a transistor.
    Type: Application
    Filed: March 2, 2006
    Publication date: October 4, 2007
    Inventors: Ulrike Schwerin, Thomas Happ
  • High density memory array for low power application
    Publication number: 20070217318
    Abstract: A phase change memory cell includes a MOS select transistor having a gate coupled to a word line, and a source and drain region coupled between first and second bit lines, respectively. A first phase change element is coupled between the first bit line and the source region of the MOS select transistor. A method of reading a selected cell in the array is provided by evaluating a body effect impact of a state of the phase change element associated with the selected cell on a MOS select transistor.
    Type: Application
    Filed: March 17, 2006
    Publication date: September 20, 2007
    Inventors: Thomas Nirschl, Thomas Happ
  • Phase change memory fabricated using self-aligned processing
    Publication number: 20070206408
    Abstract: A memory includes transistors in rows and columns providing an array, first conductive lines in columns across the array, and second conductive lines encapsulated by dielectric material in rows across the array. Each second conductive line is coupled to one side of the source-drain path of the transistors in each row. The memory includes phase change elements between the second conductive lines and contacting the first conductive lines and self-aligned to the first conductive lines. Each phase change element is coupled to the other side of the source-drain path of a transistor.
    Type: Application
    Filed: March 2, 2006
    Publication date: September 6, 2007
    Inventors: Ulrike Schwerin, Thomas Happ
  • Sense circuit for resistive memory
    Publication number: 20070201267
    Abstract: A memory includes a phase-change memory cell and a circuit. The phase-change memory cell can be set to at least three different states including a substantially crystalline state, a substantially amorphous state, and at least one partially crystalline and partially amorphous state. The circuit applies a first voltage across the memory cell to determine whether the memory cell is set at the substantially crystalline state and applies a second voltage across the memory cell to determine whether the memory cell is set at a partially crystalline and partially amorphous state.
    Type: Application
    Filed: February 24, 2006
    Publication date: August 30, 2007
    Inventors: Thomas Happ, Matthew Breitwisch, Hsiang-Lang Lung
  • PHASE CHANGE MEMORY CELL WITH HIGH READ MARGIN AT LOW POWER OPERATION
    Publication number: 20070190696
    Abstract: A memory cell device includes a first electrode, phase-change material adjacent the first electrode, a second electrode adjacent the phase-change material, a diffusion barrier adjacent the phase-change material, and isolation material adjacent the diffusion barrier for thermally isolating the phase-change material. The diffusion barrier prevents diffusion of the phase-change material into the isolation material.
    Type: Application
    Filed: April 20, 2007
    Publication date: August 16, 2007
    Applicant: Infineon Technologies AG
    Inventor: Thomas Happ
  • PHASE CHANGE MEMORY CELL WITH HIGH READ MARGIN AT LOW POWER OPERATION
    Publication number: 20070187664
    Abstract: A memory cell device includes a first electrode, phase-change material adjacent the first electrode, a second electrode adjacent the phase-change material, a diffusion barrier adjacent the phase-change material, and isolation material adjacent the diffusion barrier for thermally isolating the phase-change material. The diffusion barrier prevents diffusion of the phase-change material into the isolation material.
    Type: Application
    Filed: April 20, 2007
    Publication date: August 16, 2007
    Applicant: Infineon Technologies AG
    Inventor: Thomas Happ
  • Thermal isolation of phase change memory cells
    Publication number: 20070181932
    Abstract: A memory includes an array of resistive memory cells, bit lines between rows of the memory cells for accessing the memory cells, and a conductive plate coupled to each of the memory cells.
    Type: Application
    Filed: May 19, 2006
    Publication date: August 9, 2007
    Inventors: Thomas Happ, Jan Philipp, Ulrike Gruening-von Schwerin