Patents by Inventor Thomas J. Haigh
Thomas J. Haigh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240079266Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.Type: ApplicationFiled: April 7, 2023Publication date: March 7, 2024Inventors: Kangguo Cheng, Thomas J. Haigh, Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen, Chanro Park, Tenko Yamashita
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Patent number: 11791398Abstract: A method of making a semiconductor device includes forming a gate stack on a substrate. The method further includes depositing a first spacer layer on a sidewall of the gate stack. The first spacer layer includes silicon and carbon. The method includes performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer. The method further includes depositing a second spacer layer on the first spacer layer. The second spacer layer includes silicon, carbon, and nitrogen.Type: GrantFiled: December 29, 2020Date of Patent: October 17, 2023Assignee: International Business Machines CorporationInventors: Donald Canaperi, Richard A. Conti, Thomas J. Haigh, Jr., Eric Miller, Son Nguyen
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Patent number: 11756786Abstract: A method of fabricating a dielectric film includes depositing a first precursor on a substrate. The first precursor includes a cyclic carbosiloxane group comprising a six-membered ring. The method also includes depositing a second precursor on the substrate. The first precursor and the second precursor form a preliminary film on the substrate, and the second precursor includes silicon, carbon, and hydrogen. The method further includes exposing the preliminary film to energy from an energy source to form a porous dielectric film.Type: GrantFiled: January 18, 2019Date of Patent: September 12, 2023Assignee: International Business Machines CorporationInventors: Benjamin D. Briggs, Donald F. Canaperi, Huy Cao, Thomas J. Haigh, Jr., Son Nguyen, Hosadurga Shobha, Devika Sil, Han You
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Patent number: 11658062Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.Type: GrantFiled: May 13, 2019Date of Patent: May 23, 2023Assignee: TESSERA LLCInventors: Kangguo Cheng, Thomas J. Haigh, Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen, Chanro Park, Tenko Yamashita
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Publication number: 20210151579Abstract: A method of making a semiconductor device includes forming a gate stack on a substrate. The method further includes depositing a first spacer layer on a sidewall of the gate stack. The first spacer layer includes silicon and carbon. The method includes performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer. The method further includes depositing a second spacer layer on the first spacer layer. The second spacer layer includes silicon, carbon, and nitrogen.Type: ApplicationFiled: December 29, 2020Publication date: May 20, 2021Inventors: Donald Canaperi, Richard A. Conti, Thomas J. Haigh, JR., Eric Miller, Son Nguyen
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Patent number: 10937892Abstract: A method of making a semiconductor device includes forming a gate stack on a substrate. The method further includes depositing a first spacer layer on a sidewall of the gate stack. The first spacer layer includes silicon and carbon. The method includes performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer. The method further includes depositing a second spacer layer on the first spacer layer. The second spacer layer includes silicon, carbon, and nitrogen.Type: GrantFiled: September 11, 2018Date of Patent: March 2, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Donald Canaperi, Richard A. Conti, Thomas J. Haigh, Jr., Eric Miller, Son Nguyen
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Publication number: 20200234949Abstract: A method of fabricating a dielectric film includes depositing a first precursor on a substrate. The first precursor includes a cyclic carbosiloxane group comprising a six-membered ring. The method also includes depositing a second precursor on the substrate. The first precursor and the second precursor form a preliminary film on the substrate, and the second precursor includes silicon, carbon, and hydrogen. The method further includes exposing the preliminary film to energy from an energy source to form a porous dielectric film.Type: ApplicationFiled: January 18, 2019Publication date: July 23, 2020Inventors: Benjamin D. Briggs, Donald F. Canaperi, Huy Cao, Thomas J. Haigh, JR., Son Nguyen, Hosadurga Shobha, Devika Sil, Han You
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Publication number: 20200083345Abstract: A method of making a semiconductor device includes forming a gate stack on a substrate. The method further includes depositing a first spacer layer on a sidewall of the gate stack. The first spacer layer includes silicon and carbon. The method includes performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer. The method further includes depositing a second spacer layer on the first spacer layer. The second spacer layer includes silicon, carbon, and nitrogen.Type: ApplicationFiled: September 11, 2018Publication date: March 12, 2020Inventors: Donald Canaperi, Richard A. Conti, Thomas J. Haigh, JR., ERIC MILLER, SON NGUYEN
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Patent number: 10418277Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.Type: GrantFiled: May 11, 2018Date of Patent: September 17, 2019Assignee: International Business Machines CorporationInventors: Kangguo Cheng, Thomas J. Haigh, Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen, Chanro Park, Tenko Yamashita
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Publication number: 20190267279Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.Type: ApplicationFiled: May 13, 2019Publication date: August 29, 2019Inventors: Kangguo Cheng, Thomas J. Haigh, Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen, Chanro Park, Tenko Yamashita
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Publication number: 20190172704Abstract: A method for depositing a dielectric layer that includes introducing a substrate into a process chamber of a deposition tool; and heating the substrate to a process temperature. The method may further include introducing precursors that include at least one dielectric providing gas species for a deposited layer and at least one hydrogen precursor gas into the process chamber of the deposition tool. The hydrogen precursor gas is introduced to the deposition chamber at a flow rate ranging from 50 sccm to 5000 sccm. The molar ratio for Hydrogen/Silicon gas precursor can be equal or greater than 0.05.Type: ApplicationFiled: January 17, 2019Publication date: June 6, 2019Inventors: Thomas J. Haigh, JR., Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
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Patent number: 10242865Abstract: A method for depositing a dielectric layer that includes introducing a substrate into a process chamber of a deposition tool; and heating the substrate to a process temperature. The method may further include introducing precursors that include at least one dielectric providing gas species for a deposited layer and at least one hydrogen precursor gas into the process chamber of the deposition tool. The hydrogen precursor gas is introduced to the deposition chamber at a flow rate ranging from 50 sccm to 5000 sccm. The molar ratio for Hydrogen/Silicon gas precursor can be equal or greater than 0.05.Type: GrantFiled: March 24, 2017Date of Patent: March 26, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas J. Haigh, Jr., Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
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Patent number: 10236176Abstract: A method for depositing a dielectric layer that includes introducing a substrate into a process chamber of a deposition tool; and heating the substrate to a process temperature. The method may further include introducing precursors that include at least one dielectric providing gas species for a deposited layer and at least one hydrogen precursor gas into the process chamber of the deposition tool. The hydrogen precursor gas is introduced to the deposition chamber at a flow rate ranging from 50 sccm to 5000 sccm. The molar ratio for Hydrogen/Silicon gas precursor can be equal or greater than 0.05.Type: GrantFiled: March 24, 2017Date of Patent: March 19, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas J. Haigh, Jr., Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
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Patent number: 10115629Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.Type: GrantFiled: October 20, 2017Date of Patent: October 30, 2018Assignee: International Business Machines CorporationInventors: Kangguo Cheng, Thomas J. Haigh, Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen, Chanro Park, Tenko Yamashita
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Publication number: 20180261494Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.Type: ApplicationFiled: May 11, 2018Publication date: September 13, 2018Inventors: Kangguo Cheng, Thomas J. Haigh, Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen, Chanro Park, Tenko Yamashita
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Publication number: 20180047617Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.Type: ApplicationFiled: October 20, 2017Publication date: February 15, 2018Inventors: Kangguo Cheng, Thomas J. Haigh, Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen, Chanro Park, Tenko Yamashita
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Publication number: 20180047615Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.Type: ApplicationFiled: August 9, 2016Publication date: February 15, 2018Inventors: Kangguo Cheng, Thomas J. Haigh, Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen, Chanro Park, Tenko Yamashita
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Patent number: 9892961Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.Type: GrantFiled: August 9, 2016Date of Patent: February 13, 2018Assignee: International Business Machines CorporationInventors: Kangguo Cheng, Thomas J. Haigh, Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen, Chanro Park, Tenko Yamashita
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Publication number: 20170263449Abstract: A method for depositing a dielectric layer that includes introducing a substrate into a process chamber of a deposition tool; and heating the substrate to a process temperature. The method may further include introducing precursors that include at least one dielectric providing gas species for a deposited layer and at least one hydrogen precursor gas into the process chamber of the deposition tool. The hydrogen precursor gas is introduced to the deposition chamber at a flow rate ranging from 50 sccm to 5000 sccm. The molar ratio for Hydrogen/Silicon gas precursor can be equal or greater than 0.05.Type: ApplicationFiled: March 24, 2017Publication date: September 14, 2017Inventors: Thomas J. Haigh, JR., Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha
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Publication number: 20170263451Abstract: A method for depositing a dielectric layer that includes introducing a substrate into a process chamber of a deposition tool; and heating the substrate to a process temperature. The method may further include introducing precursors that include at least one dielectric providing gas species for a deposited layer and at least one hydrogen precursor gas into the process chamber of the deposition tool. The hydrogen precursor gas is introduced to the deposition chamber at a flow rate ranging from 50 sccm to 5000 sccm. The molar ratio for Hydrogen/Silicon gas precursor can be equal or greater than 0.05.Type: ApplicationFiled: March 24, 2017Publication date: September 14, 2017Inventors: Thomas J. Haigh, JR., Son V. Nguyen, Deepika Priyadarshini, Hosadurga Shobha