Abstract: A method of acquiring a communications signal is provided. The method includes the steps of storing a forward chirp sync segment (106) of an auto-correlating forward chirp sync (102) and storing a reverse chirp sync segment (108) of a symmetric auto-correlating reverse chirp sync (104). A header comprising of either a forward chirp sync FCS (102) or a reverse chirp sync RCS (104), a predetermined number of data blocks comprising a data frame (308), and the symmetric auto-correlating trailer is received. The header, the data blocks, and the symmetric trailer are susceptible to frequency error. The method correlates the FCS segment (106) with the auto-correlating FCS (102) to provide a FCS correlation signal (312) and correlates the RCS segment (104) with the auto-correlating RCS (108) to provide a RCS correlation signal (314). The method determines the frequency error, symbol timing, and frame timing based upon the FCS correlation signal (312) and the RCS correlation signal (314).

Abstract: Apparatus is provided for communicating data packets in variable length bursts over a physical layer in a multilayer data communication scheme. Each burst contains information data (40, 50, 60, 64, 74, 78, 82) and overhead (30, 32, 34, 36, 38, 42, 44, 62, 66, 76, 80, 84). The overhead includes forward error control (FEC) data (42, 62, 66, 76, 80, 84). Different burst modes (FIG. 2, 3, 4, 5) are provided to enable a trade-off to be made between bandwidth efficiency and data transmission robustness. The burst modes provide different combinations of modulation (such as QPSK and 16-QAM), symbol rates, FEC coding levels and frame and preamble structure. The apparatus is particularly suitable for use in upstream communications over hybrid fiber coax cable television plants.

Abstract: A modulated clock MSK modulator that separately modulates a sinusoidal clock signal by square wave I and Q digital data signals prior to the I and Q data signals being modulated onto a carrier wave signal. Mixers or applicable biphase switches are utilized to impress the I and Q digital data signal information onto the clock signal by inverting or non-inverting the clock signal on separate I and Q data rails to create I and Q modulated clock signals separated in phase. The I channel data modulated clock signal and the Q channel data modulated clock signal are then separately applied to a conventional quadraphase modulator to be separately modulated onto a carrier wave signal, and the summed together to be transmitted.

Abstract: A modulated clock MSK modulator that separately modulates a sinusoidal clock signal by square wave I and Q digital data signals prior to the I and Q data signals being modulated onto a carrier wave signal. Mixers or applicable biphase switches are utilized to impress the I and Q digital data signal information onto the clock signal by inverting or non-inverting the clock signal on separate I and Q data rails to create I and Q modulated clock signals separated in phase. The I channel data modulated clock signal and the Q channel data modulated clock signal are then separately applied to a conventional quadraphase modulator to be separately modulated onto a carrier wave signal, and the summed together to be transmitted.

Abstract: A method and apparatus are provided for achieving synchronization and detecting errors in a data stream such as an MPEG-2 transport packet stream. In an MPEG embodiment, the MPEG sync word is removed and replaced with a parity code that is used at the decoder for both synchronization and error detection. A syndrome calculator in the decoder can be implemented using a unique one bit in, one bit out FIR filter. Codewords used to generate the parity code can be provided by a linear block code that is a dual of a shortened cyclic code.

Abstract: A high performance, low cost technique for carrier recovery and tracking of high rate demodulator (>200 Mbps to multi-gigabits per second) system is presented. The locally generated carrier is held in phase locked synchronism with the incoming modulated carrier through a carrier recovery scheme in which the modulated data is detected and subsampled using the bit synchronizing circuitry to provide a strobe signal for subsampling. The voltage levels of the subsampled data are analyzed to determine a phase error signal. The subsampled data are used to address a lookup table of error values stored in memory.