Patents by Inventor Thomas V. Sikina

Thomas V. Sikina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11089673
    Abstract: A circuit assembly is provided and includes a printed circuit board (PCB) having a circuit element region and defining a trench surrounding an entirety of the circuit element region, a circuit element disposed within the circuit element region of the PCB; and a Faraday wall. The Faraday wall includes a solid, unitary body having a same shape as the trench. The Faraday wall is disposed within the trench to surround an entirety of the circuit element.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: August 10, 2021
    Assignee: RAYTHEON COMPANY
    Inventors: Andrew Southworth, Kevin Wilder, James Benedict, Mary K. Herndon, Thomas V. Sikina, John P. Haven
  • Patent number: 11089687
    Abstract: A method of manufacturing a power divider circuit includes milling a conductive material disposed upon a first substrate to form a signal trace. The signal trace includes a division from a single trace to two arm traces, with each of the two arm traces having a proximal end electrically connected to the single trace and a distal end electrically connected to each of two secondary traces. The method further includes depositing a resistive ink between the two distal ends to form a resistive electrical connection between the two arm traces, bonding a second substrate to the first substrate to substantially encapsulate the traces between the first substrate and the second substrate, and milling through at least one of the first substrate or the second substrate to provide access to at least one of the traces. A signal divider is further disclosed.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: August 10, 2021
    Assignee: RAYTHEON COMPANY
    Inventors: Jonathan E. Nufio-Molina, Thomas V. Sikina, James E. Benedict, Andrew R. Southworth, Semira M. Azadzoi
  • Publication number: 20210226343
    Abstract: An antenna and method of manufacturing an antenna. The antenna includes a radiator feed layer, a first radiator patch assembly attached to the radiator feed layer, and a second radiator patch assembly attached to the radiator feed layer. The first radiator patch assembly is separated from the second radiator patch assembly by an air gap. The first radiator patch assembly is attached to the radiator feed layer and the second radiator patch assembly is attached to the radiator feed layer separated from the first radiator patch assembly by the air gap.
    Type: Application
    Filed: January 16, 2020
    Publication date: July 22, 2021
    Inventors: Thomas V. Sikina, John P. Haven, Gregory M. Fagerlund, James Benedict, Andrew Southworth, Kevin Wilder
  • Publication number: 20210151855
    Abstract: A communications array includes a support structure configured to array elements, and a plurality of array elements supported by the support structure. Each array element is fabricated from an advanced manufacturing techniques (AMT) process. The support structure may be fabricated from a printed circuit board (PCB) or similar dielectric material. Each array element may include a radiator and/or a beamformer manufactured using the AMT process. The communications array further may include a copper vertical launch (CVL) and/or an electromagnetic boundary.
    Type: Application
    Filed: November 14, 2019
    Publication date: May 20, 2021
    Inventors: Thomas V. Sikina, John P. Haven, Kevin Wilder, James E. Benedict, Andrew R. Southworth, Mary K. Herndon
  • Publication number: 20210066830
    Abstract: A stripline radio-frequency (RF) connection interface is provided and includes first and second printed circuit boards (PCBs). The first PCB includes a first trace, ground planes at opposite sides of the first trace, dielectric material interposed between the first trace and the ground planes and a first end. The first end is formed as a first rabbet at which the first trace is exposed. The second PCB includes a second trace, ground planes at opposite sides of the second trace, dielectric material interposed between the second trace and the ground planes and a second end. The second end is formed as a second rabbet, which is substantially identical to the first rabbet, at which the second trace is exposed. The first and second ends are mated in a shiplap joint to electrically couple the first and second traces.
    Type: Application
    Filed: August 27, 2019
    Publication date: March 4, 2021
    Inventors: Kevin Wilder, Alan C. Smith, James Benedict, Andrew Southworth, Thomas V. Sikina, Mary K. Herndon, John P. Haven
  • Publication number: 20210059043
    Abstract: A radio frequency connector includes a substrate, a first ground plane disposed upon the substrate, a signal conductor having a first contact point, with the first contact point being configured to electrically mate with a second contact point, and a first ground boundary configured to electrically mate with a second ground boundary, with the first ground boundary being formed as an electrically continuous conductor within the substrate.
    Type: Application
    Filed: November 6, 2020
    Publication date: February 25, 2021
    Inventors: Thomas V. Sikina, James E. Benedict, John P. Haven, Andrew R. Southworth, Semira M. Azadzoi
  • Publication number: 20210051805
    Abstract: An apparatus for automating the fabrication of a copper vertical launch (CVL) within a printed circuit board (PCB) includes a feed mechanism to feed and extrude copper wire from a spool of copper wire and a wire cutting and gripping mechanism to receive copper wire from the feed mechanism, cut and secure a segment of copper wire, insert the segment of copper wire into a hole formed within the PCB, solder an end of the segment of copper wire to a signal trace of the PCB, and flush cut an opposite end of the segment of the copper wire to a surface of the PCB. The wire cutting and gripping mechanism includes a wire cutter to flush cut the segment of copper wire and an integrated heated gripper device to receive the copper wire from the spool of copper wire and cut and grab a segment from copper wire.
    Type: Application
    Filed: August 15, 2019
    Publication date: February 18, 2021
    Inventors: Mikhail Pevzner, James E. Benedict, Andrew R. Southworth, Thomas V. Sikina, Kevin Wilder, Matthew Souza, Aaron Michael Torberg
  • Publication number: 20210022238
    Abstract: A circuit assembly is provided and includes a printed circuit board (PCB) having a circuit element region and defining a trench surrounding an entirety of the circuit element region, a circuit element disposed within the circuit element region of the PCB; and a Faraday wall. The Faraday wall includes a solid, unitary body having a same shape as the trench. The Faraday wall is disposed within the trench to surround an entirety of the circuit element.
    Type: Application
    Filed: July 19, 2019
    Publication date: January 21, 2021
    Inventors: Andrew Southworth, Kevin Wilder, James Benedict, Mary K. Herndon, Thomas V. Sikina, John P. Haven
  • Publication number: 20200395651
    Abstract: An array includes a support structure configured to support columns of beamformer assemblies, and a plurality of beamformer assemblies supported by the support structure. Each beamformer assembly includes at least one beamformer having at least one first beamformer segment and at least one second beamformer segment configured to interconnect with the first beamformer segment.
    Type: Application
    Filed: June 14, 2019
    Publication date: December 17, 2020
    Inventors: Kevin Wilder, Jonathan E. Nufio-Molina, Phillip W. Thiessen, Thomas V. Sikina, James E. Benedict, Andrew R. Southworth, Erika Klek
  • Patent number: 10849219
    Abstract: A radio frequency connector includes a substrate, a first ground plane disposed upon the substrate, a signal conductor having a first contact point, with the first contact point being configured to electrically mate with a second contact point, and a first ground boundary configured to electrically mate with a second ground boundary, with the first ground boundary being formed as an electrically continuous conductor within the substrate.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: November 24, 2020
    Assignee: RAYTHEON COMPANY
    Inventors: Thomas V. Sikina, James E. Benedict, John P. Haven, Andrew R. Southworth, Semira M. Azadzoi
  • Publication number: 20200365300
    Abstract: A method includes blending a dielectric material including a titanate with a carbon-based ink to form a modified carbon-based ink. The method also includes printing the modified carbon-based ink onto a structure. The method further includes curing the printed modified carbon-based ink on the structure at a temperature that does not exceed about 250° C. In addition, the method includes processing the cured printed modified carbon-based ink to form a thick film resistor. Blending the dielectric material with the carbon-based ink causes the modified carbon-based ink to have a resistivity that is at least double a resistivity of the carbon-based ink.
    Type: Application
    Filed: June 15, 2020
    Publication date: November 19, 2020
    Inventors: Erika C. Klek, Mary K. Herndon, Thomas V. Sikina, James E. Benedict, Andrew R. Southworth, Kevin M. Wilder, Oshadha K. Ranasingha, Alkim Akyurtlu
  • Publication number: 20200367357
    Abstract: A circuit structure includes a signal substrate having a signal trace formed thereon and a microstrip substrate disposed above the signal substrate that includes a microstrip trace formed thereon and a hole passing through it. The circuit structure also includes a conductor passing through and substantially filling the hole passing through the microstrip substrate and electrically contacting the signal trace on the signal substrate and a flat wire connector electrically connecting the microstrip trace to a first end of the conductor, the flat wire connector being arranged such that a gap is formed between the flat wire connector and a top surface of the microstrip substrate.
    Type: Application
    Filed: May 13, 2020
    Publication date: November 19, 2020
    Inventors: James E. Benedict, Paul A. Danello, Mary K. Herndon, Thomas V. Sikina, Andrew R. Southworth, Kevin Wilder
  • Patent number: 10839992
    Abstract: A method includes blending a dielectric material including a titanate with a carbon-based ink to form a modified carbon-based ink. The method also includes printing the modified carbon-based ink onto a structure. The method further includes curing the printed modified carbon-based ink on the structure at a temperature that does not exceed about 250° C. In addition, the method includes processing the cured printed modified carbon-based ink to form a thick film resistor. An amount of the dielectric material blended with the carbon-based ink does not exceed about 15% by weight of the modified carbon-based ink. The modified carbon-based ink has a resistivity that is at least double a resistivity of the carbon-based ink. The thick film resistor may be configured to handle up to about 200 mA of current without fusing and/or handle up to about 1.0 W of power without fusing.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: November 17, 2020
    Assignees: Raytheon Company, University of Massachusetts
    Inventors: Erika C. Klek, Mary K. Herndon, Thomas V. Sikina, James E. Benedict, Andrew R. Southworth, Kevin M. Wilder, Oshadha K. Ranasingha, Alkim Akyurtlu
  • Patent number: 10826147
    Abstract: Circuits and methods include transmission lines formed from a conductive cladding on a substrate surface. The transmission line includes additional reference conductors positioned co-planar on the surface, including a gap between the transmission line and each of the reference conductors. The transmission line and the reference conductors are at least partially encapsulated (e.g., sandwiched) between two substrates. Isolation boundaries may be included as ground planes, e.g., above and below the transmission line, on opposing surfaces of the substrates, and Faraday walls, e.g., vertically, through the substrates. Current densities generated by various electromagnetic signals are distributed among the transmission line and the reference conductors (as a tri-conductor arrangement), and may be partially further distributed to the isolation (ground) boundaries.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: November 3, 2020
    Assignee: RAYTHEON COMPANY
    Inventors: Thomas V. Sikina, John P. Haven, James E. Benedict
  • Patent number: 10813210
    Abstract: A radio frequency circuit includes at least one dielectric substrate, a trench formed in the dielectric substrate, and an electrically continuous conductive material in the trench. The radio frequency circuit further may include a first dielectric substrate, a second dielectric substrate, with the trench being formed in the first and second dielectric substrates. A method of fabricating an electromagnetic circuit includes providing at least one dielectric substrate, machining a trench in the at least one dielectric substrate, and filling the trench with an electrically conductive material to form an electrically continuous conductor.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: October 20, 2020
    Assignee: RAYTHEON COMPANY
    Inventors: Semira M. Azadzoi, James E. Benedict, John P. Haven, Thomas V. Sikina, Andrew R. Southworth
  • Patent number: 10631405
    Abstract: A multilayer printed circuit board includes a first dielectric layer and a second dielectric layer, each layer having a top surface and a bottom surface. The first dielectric layer is positioned above the second dielectric layer with the bottom surface of the first dielectric layer facing the top surface of the second dielectric layer. The top surface of the second dielectric layer has a conductive trace. The second dielectric layer has a through-hole that extends through the conductive trace. The multilayer printed circuit board includes an inverted pad interface structure including an inverted pad provided on the bottom surface of the first dielectric layer, a first solder layer provided on a surface of the inverted pad, a second solder layer provided on the conductive trace, and a copper wire positioned within the through-hole to provide the vertical and electrical connection with the conductive trace.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: April 21, 2020
    Assignee: RAYTHEON COMPANY
    Inventors: James E. Benedict, Timothy David Deley, Thomas V. Sikina, Michael Ryan Souliotis, Andrew R. Southworth, Kevin Wilder
  • Publication number: 20200028257
    Abstract: A wave phased array is manufactured using additive manufacturing technology (AMT). The wave phased array includes a radiator, a radiator dilation layer supporting the radiator, a beamformer supporting the radiator dilation layer, a beamformer dilation layer supporting the beamformer, and a substrate support layer supporting the beamformer dilation layer. At least one of the radiator, the radiator dilation layer, the beamformer, the beamformer dilation layer and the substrate support layer is fabricated at least in part by an AMT process.
    Type: Application
    Filed: May 21, 2019
    Publication date: January 23, 2020
    Inventors: James E. Benedict, John P. Haven, Peter J. Adams, Thomas V. Sikina
  • Publication number: 20190357363
    Abstract: A reactive beamformer includes a radiator disposed within a substrate and configured to radiate a received electromagnetic signal, a plurality of receptors disposed within the substrate, each of the plurality of receptors configured to receive a portion of the radiated electromagnetic signal, and a plurality of signal lines. Each signal line of the plurality of signal lines is coupled to a respective receptor of the plurality of receptors to convey the portion of the radiated electromagnetic signal from the respective receptor and to provide the portion of the radiated electromagnetic signal to an output.
    Type: Application
    Filed: May 16, 2019
    Publication date: November 21, 2019
    Inventors: Thomas V. Sikina, John P. Haven, Peter J. Adams, James E. Benedict, Carolyn R. Reistad
  • Publication number: 20190269007
    Abstract: A radio frequency connector includes a substrate, a first ground plane disposed upon the substrate, a signal conductor having a first contact point, with the first contact point being configured to electrically mate with a second contact point, and a first ground boundary configured to electrically mate with a second ground boundary, with the first ground boundary being formed as an electrically continuous conductor within the substrate.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 29, 2019
    Inventors: Thomas V. Sikina, James E. Benedict, John P. Haven, Andrew R. Southworth, Semira M. Azadzoi
  • Publication number: 20190269021
    Abstract: A method of manufacturing a power divider circuit includes milling a conductive material disposed upon a first substrate to form a signal trace. The signal trace includes a division from a single trace to two arm traces, with each of the two arm traces having a proximal end electrically connected to the single trace and a distal end electrically connected to each of two secondary traces. The method further includes depositing a resistive ink between the two distal ends to form a resistive electrical connection between the two arm traces, bonding a second substrate to the first substrate to substantially encapsulate the traces between the first substrate and the second substrate, and milling through at least one of the first substrate or the second substrate to provide access to at least one of the traces. A signal divider is further disclosed.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 29, 2019
    Inventors: Jonathan E. Nufio-Molina, Thomas V. Sikina, James E. Benedict, Andrew R. Southworth, Semira M. Azadzoi