Patents by Inventor Thomas W. Goodman

Thomas W. Goodman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8141245
    Abstract: A circuit board or each circuit board of a multi-layer circuit board includes an electrically conductive sheet coated with an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet. An insulating interlayer can be sandwiched between a pair of adjacent circuit boards of a multi-layer circuit board assembly. A landless through-hole or via can extend through one or more of the circuit boards for connecting electrical conductors on opposing surfaces thereof.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: March 27, 2012
    Assignee: PPG Industries Ohio, Inc
    Inventors: Kevin C. Olson, Alan E. Wang, Peter Elenius, Thomas W. Goodman
  • Publication number: 20090101274
    Abstract: A circuit board or each circuit board of a multi-layer circuit board includes an electrically conductive sheet coated with an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet. An insulating interlayer can be sandwiched between a pair of adjacent circuit boards of a multi-layer circuit board assembly. A landless through-hole or via can extend through one or more of the circuit boards for connecting electrical conductors on opposing surfaces thereof.
    Type: Application
    Filed: December 29, 2008
    Publication date: April 23, 2009
    Inventors: Kevin C. Olson, Alan E. Wang, Peter Elenius, Thomas W. Goodman
  • Patent number: 7485812
    Abstract: A circuit board or each circuit board of a multi-layer circuit board includes an electrically conductive sheet coated with an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet. An insulating interlayer can be sandwiched between a pair of adjacent circuit boards of a multi-layer circuit board assembly. A landless through-hole or via can extend through one or more of the circuit boards for connecting electrical conductors on opposing surfaces thereof.
    Type: Grant
    Filed: November 11, 2004
    Date of Patent: February 3, 2009
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Kevin C. Olson, Alan E. Wang, Peter Elenius, Thomas W. Goodman
  • Publication number: 20080302564
    Abstract: A substrate for an electronic device package includes an electrically conductive core shaped to define a cavity for receiving an electronic device, a first insulating layer positioned on a first side of the core, and a first contact positioned adjacent to a surface within the cavity. Method of fabricating the substrates is also provided.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 11, 2008
    Applicant: PPG INDUSTRIES OHIO, INC.
    Inventors: Kevin C. Olson, Thomas W. Goodman, Peter Elenius
  • Patent number: 5519176
    Abstract: A substrate or a ceramic package for packaging semiconductor chips, which comprises an insulating layer having a signal line on one surface of said insulating layer and a power line or ground line corresponding to said signal line on the other surface of said insulating layer. A well-controlled constant high frequency characteristics, and particularly, characteristic impedance, can be obtained on the signal line without being influenced by the power line or ground line.
    Type: Grant
    Filed: April 5, 1994
    Date of Patent: May 21, 1996
    Assignee: Sony Corporation
    Inventors: Thomas W. Goodman, Hiroyuki Fujita, Yoshikazu Murakami, Arthur T. Murphy, Daniel I. Amey
  • Patent number: 5477419
    Abstract: A method of mounting an electronic part having a terminal portion on a board on which a circuit including a connection portion is formed. It includes a process of forming a conductive layer on the surface of the terminal portion; a process of forming, on the surface of the connection portion, a conductive layer having a melting point different from that of the conductive layer formed on the surface of the terminal portion; and a process of melting the conductive layer having a low melting point in such a state that the conductive layer of the terminal portion is contacted with the conductive layer of the connection portion, thereby fusing the conductive layer having a low melting point onto the conductive layer having a high melting point.
    Type: Grant
    Filed: April 11, 1994
    Date of Patent: December 19, 1995
    Assignee: Sony Corporation
    Inventors: Thomas W. Goodman, Hiroyuki Fujita, Yoshikazu Murakami, Arthur T. Murphy