Patents by Inventor Tian (Alan) Shen

Tian (Alan) Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9621290
    Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: April 11, 2017
    Assignee: Juniper Networks, Inc.
    Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen
  • Publication number: 20160211937
    Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.
    Type: Application
    Filed: March 29, 2016
    Publication date: July 21, 2016
    Applicant: Juniper Networks, Inc.
    Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen
  • Patent number: 9319164
    Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: April 19, 2016
    Assignee: Juniper Networks, Inc.
    Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen
  • Patent number: 8670459
    Abstract: An apparatus and method of scheduling timing packets to enhance time distribution includes an improved apparatus in a system in which at least one of time and frequency information is derived based on information distributed in timing packets, at least some of the timing packets being transmitted by or received by the apparatus. The improvement includes a scheduling module that determines a first packet transmission time offset of a first timing packet based on a first predetermined identifier associated with the apparatus, and a second packet transmission time offset of a second timing packet based on the first packet transmission time offset and a timing packet spacing that is independent of the first predetermined identifier. The improvement further includes a transmission module that transmits the first timing packet based on the first packet transmission time offset, and the second timing packet based on the second packet transmission time offset.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: March 11, 2014
    Assignee: Juniper Networks, Inc.
    Inventors: Charles Frederick Barry, Tian (Alan) Shen, Feng Frank Pan, DeviPrasad Natesan
  • Publication number: 20130301660
    Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.
    Type: Application
    Filed: July 17, 2013
    Publication date: November 14, 2013
    Applicant: Juniper Networks, Inc.
    Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen
  • Patent number: 8494011
    Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: July 23, 2013
    Assignee: Juniper Networks, Inc.
    Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian Alan Shen, Philip Kruzinski, Guochun George Zhao, DeviPrasad Natesan, David R. Jorgensen
  • Publication number: 20130010815
    Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.
    Type: Application
    Filed: September 13, 2012
    Publication date: January 10, 2013
    Applicant: Juniper Networks, Inc.
    Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen
  • Patent number: 8270438
    Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: September 18, 2012
    Assignee: Juniper Networks, Inc.
    Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian Alan Shen, Philip Kruzinski, Guochun George Zhao, DeviPrasad Natesan, David R. Jorgensen
  • Publication number: 20110310766
    Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.
    Type: Application
    Filed: August 30, 2011
    Publication date: December 22, 2011
    Applicant: JUNIPER NETWORKS, INC.
    Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun George Zhao, DeviPrasad Natesan, David R. Jorgensen
  • Patent number: 8031747
    Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: October 4, 2011
    Assignee: Juniper Networks, Inc.
    Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen
  • Publication number: 20110128976
    Abstract: An apparatus and method of scheduling timing packets to enhance time distribution includes an improved apparatus in a system in which at least one of time and frequency information is derived based on information distributed in timing packets, at least some of the timing packets being transmitted by or received by the apparatus. The improvement includes a scheduling module that determines a first packet transmission time offset of a first timing packet based on a first predetermined identifier associated with the apparatus, and a second packet transmission time offset of a second timing packet based on the first packet transmission time offset and a timing packet spacing that is independent of the first predetermined identifier. The improvement further includes a transmission module that transmits the first timing packet based on the first packet transmission time offset, and the second timing packet based on the second packet transmission time offset.
    Type: Application
    Filed: November 30, 2009
    Publication date: June 2, 2011
    Inventors: Charles Frederick Barry, Tian (Alan) Shen, Feng Frank Pan, DeviPrasad Natesan
  • Publication number: 20100278055
    Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.
    Type: Application
    Filed: April 29, 2009
    Publication date: November 4, 2010
    Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen