Abstract: A tri-state liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer, a first electrode, a second electrode, a third electrode and a fourth electrode. The first substrate and the second substrate are disposed oppositely. The liquid crystal layer disposed between the first substrate and the second substrate includes a plurality of polymer network liquid crystals. The first electrode is disposed between the first substrate and the liquid crystal layer, the second electrode is disposed between the second substrate and the liquid crystal layer, and the first and second electrodes include planar electrodes. The third and fourth electrodes are disposed between the first substrate and the liquid crystal layer, and the third and fourth electrodes include patterned electrodes. The tri-state liquid crystal display panel has a transmission state display mode, a dark state display mode and a haze state display mode.

Abstract: A display panel including a plurality of pixel units is provided. Each pixel unit includes a first substrate, a second substrate and a display media therebetween. The first substrate includes a first sub-pixel and a second sub-pixel adjacent to the first sub-pixel. The first sub-pixel includes a first active device and a first pixel electrode electrically connected to the first active device, wherein the first pixel electrode has a first main slit and a plurality of first branch slits connected thereto. The second sub-pixel includes a second active device and a second pixel electrode electrically connected to the second active device, wherein the second pixel electrode has a second main slit and a plurality of second branch slits connected thereto. The second substrate includes a first electrode pattern and a second electrode pattern respectively corresponding to the first pixel electrode and the second pixel electrode, and a connecting portion therebetween.

Abstract: A pixel structure includes a substrate, an opposite substrate, a scan line and a data line, an active device, a pixel electrode, and a passivation layer. The pixel electrode has at least one block-shaped electrode and a plurality of first branch electrodes. The passivation layer has at least one block-shaped protrusion pattern, a plurality of branch protrusion patterns, and a plurality of grooves. The first branch electrodes are located on the block-shaped protrusion patterns. An Edge of the block-shaped electrodes further extends to the block-shaped protrusion patterns. An orthogonal projection gap W1 is between an orthogonal projection edge of the block-shaped electrode and an orthogonal projection edge of the nearest first branch electrode, and 0 ?m<W1?5 ?m. An orthogonal projection distance W2 is between the orthogonal projection edge of the block-shaped electrode and an orthogonal projection edge of the block-shaped protrusion pattern, and 0 ?m<W2?10 ?m.

Abstract: A pixel structure includes a scan line, a data line, an active device, a first electrode layer, a second electrode layer, and an insulation layer. The active device is electrically connected to the scan line and the data line. The first electrode layer is electrically connected to the active device. The second electrode layer is electrically insulated from the first electrode layer. The insulation layer is located between the first electrode layer and the second electrode layer, and the first electrode layer or the second electrode layer includes an enclosed-frame-shaped portion, first V-shaped branch portions, and second V-shaped branch portions. The first V-shaped branch portions and the second V-shaped branch portions are arranged within the enclosed-frame-shaped portion in opposite directions, and end terminals of the first V-shaped branch portions and end terminals of the second V-shaped branch portions are connected to the enclosed-frame-shaped portion.

Abstract: A display panel includes a first substrate, plural pixel structures on the first substrate, a second substrate and a display medium between the two substrates. Each of the pixel structures includes a scan line, a data line, an active device, a pixel electrode, a common electrode, an insulating layer and a counter electrode. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The common electrode is electrically insulated from the pixel electrode. The insulating layer is between the pixel electrode and the common electrode. The counter electrode is electrically insulated from the pixel electrode and the common electrode, wherein the counter electrode is disposed symmetrically around the pixel electrode, and the voltage absolute value of the counter electrode is greater than the voltage absolute value of the pixel electrode.

Abstract: A pixel array includes pixel units. A gate of a sharing switch device is electrically connected to a signal line. A source of the sharing switch device is electrically connected to an active device and a sub-pixel electrode. A terminal of a first capacitance Cpp is electrically connected to the source of the sharing switch device and the sub-pixel electrode. Another terminal of the first capacitance Cpp is electrically connected to a main pixel electrode of the next pixel unit. A terminal of a second capacitance Ccc is electrically connected to a drain of the sharing switch device. Another terminal of the second capacitance Ccc is electrically connected to the main pixel electrode of the next pixel unit. 5%?(Ccc/Cpp)?25%.

Abstract: A pixel array includes a first color pixel unit, a second color pixel unit and a third pixel unit, and the first, second and third pixel units respectively include a scan line, a data line, an active device electrically connected to the scan line and the data line and a first pixel electrode electrically connected to the active device. The first pixel electrode has at least one first slit, and a first acute angle is formed between an extending direction of the first slit and an extending direction of the scan line. Any two of the first acute angle of the first color pixel unit, the first acute angle of the second color pixel unit, and the first acute angle of the third color pixel unit are different.

Abstract: A pixel array includes pixel units. A gate of a sharing switch device is electrically connected to a signal line. A source of the sharing switch device is electrically connected to an active device and a sub-pixel electrode. A terminal of a first capacitance Cpp is electrically connected to the source of the sharing switch device and the sub-pixel electrode. Another terminal of the first capacitance Cpp is electrically connected to a main pixel electrode of the next pixel unit. A terminal of a second capacitance Ccc is electrically connected to a drain of the sharing switch device. Another terminal of the second capacitance Ccc is electrically connected to the main pixel electrode of the next pixel unit. 5%?(Ccc/Cpp)?25%.

Abstract: A display panel includes a first substrate, first gate lines, first data lines, second data lines, third data lines, fourth data lines, first sub-pixels, second sub-pixels and first shielding electrodes. The first substrate has a plurality of first sub-pixel regions and second sub-pixel regions. The first gate lines extend along a first direction. The first data lines, the second data lines, the third data lines and the fourth data lines extend along a second direction and are sequentially arranged in the first direction. The first sub-pixel is electrically connected to one of the first data line and the second data line. The second sub-pixel is electrically connected to one of the third data line and the fourth data line. The first shielding electrodes extend along the second direction and are disposed in a common boundary between the first sub-pixel region and the second sub-pixel region adjacent to each other.

Abstract: A pixel structure of display panel includes a first substrate, a second substrate, a liquid crystal layer, a first pixel electrode, an insulation layer, a second pixel electrode and a common electrode. The first substrate has a plurality of alignment regions. The second substrate and the first substrate are disposed opposite to each other. The first pixel electrode is a patterned electrode, which includes a plurality of branch electrodes disposed in the alignment regions. The insulation layer is disposed between the first pixel electrode and the liquid crystal layer. The second pixel electrode is a patterned electrode disposed in at least one boundary of each of the alignment regions. The common electrode is disposed on the second substrate.

Abstract: A pixel structure including a first and a second pixel electrode is provided. The first pixel electrode includes a first main portion and first branches. The second pixel electrode includes a second main portion and second branches. The first and second main portions are disposed at an edge of a pixel region. The first and second branches respectively extend from the first and second main portions. The second branches and the first branches are arranged in alternation, and the first branch is parallel to the adjacent second branch. A first opening is formed at neighboring ends of the first main portion and the second main portion. The end of the first main portion has a first bending part, the first bending part is disposed at the edge of the pixel region, and an end of the second branch close to the first opening is surrounded by the first bending part.

Abstract: A driving circuit electrically coupled between a first data line and a second data line and between a first scan line and a second scan line. The driving circuit includes a first switch, a second switch, a third switch, a fourth switch, a first sub-capacitor, a second sub-capacitor, a fifth switch, a sixth switch, a first voltage dividing unit and a second voltage dividing unit. The first voltage dividing unit is coupled between a second end of the fifth switch and a reference voltage end. The second voltage dividing unit is coupled between a second end of the sixth switch and the reference voltage end, for redistributing stored electric charges.

Abstract: A pixel array substrate and a display panel are provided. The pixel array substrate includes a substrate, scan line groups, data lines, and pixel structures. The scan line groups are disposed on the substrate. The data lines are intersected with the scan line groups. The pixel structures are connected to the scan line groups and the data lines. Each pixel structure includes an active device group, a first pixel electrode, a second pixel electrode, and a connection electrode. The first pixel electrode is located between the second pixel electrode and the nth scan line group. The connection electrode is located at a side of the first pixel electrode adjacent to one data line. The second pixel electrode is electrically connected to the active device group through the connection electrode. The connection electrode, the first pixel electrode, and the second pixel electrode are of the same layer.

Abstract: A pixel structure having a first region and a second region adjacent to each other is provided. The pixel structure includes a first pixel electrode and a second pixel electrode. The first pixel electrode forms a plurality of first V-shaped electrode patterns. A tip of the first V-shaped electrode patterns is located at a boundary of the first region and the second region. The second pixel electrode includes a plurality of second V-shaped electrode patterns and a first protrusion electrode pattern. The first protrusion electrode pattern is connected to one of the second V-shaped electrode patterns and protrudes towards an adjacent first V-shaped electrode pattern from the tip of the second V-shaped electrode pattern.

Abstract: A liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer, a plurality of first regions and a plurality of second regions. The first regions and the second regions are formed on the first substrate and the second substrate. In a narrow viewing mode, the luminous flux of the first regions along a first viewing direction is different from that of the first regions along a second viewing direction opposite to the first viewing direction, and the luminous flux of the second regions along the first viewing direction is substantially different from that of the first regions along the first viewing direction.

Abstract: A liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer, a plurality of first regions and a plurality of second regions. The first regions and the second regions are formed on the first substrate and the second substrate. In a narrow viewing mode, the luminous flux of the first regions along a first viewing direction is different from that of the first regions along a second viewing direction opposite to the first viewing direction, and the luminous flux of the second regions along the first viewing direction is substantially different from that of the first regions along the first viewing direction.

Abstract: In an exemplary flat display apparatus and control circuit and method for controlling the flat display apparatus, the flat display apparatus includes a plurality of gate driving units, each of which controls the operation of a scan line in the flat display apparatus. The flat display apparatus provides a first gate high level voltage signal and a second gate high level voltage signal to the gate driving units such that the first and second gate high level voltage signals are used as voltage signals transmitted to corresponding scan lines. The first and second gate high level voltage signals respectively include a falling edge with a slope. Duration time of the falling edge of the first gate high level voltage signal is longer than that of the falling edge of the second gate high level voltage signal.

Abstract: A pixel array includes a first color pixel unit, a second color pixel unit and a third pixel unit, and the first, second and third pixel units respectively include a scan line, a data line, an active device electrically connected to the scan line and the data line and a first pixel electrode electrically connected to the active device. The first pixel electrode has at least one first slit, and a first acute angle is formed between an extending direction of the first slit and an extending direction of the scan line. Any two of the first acute angle of the first color pixel unit, the first acute angle of the second color pixel unit, and the first acute angle of the third color pixel unit are different.

Abstract: A sub-pixel circuit, display panel and driving method of the display panel are provided. The display panel has a plurality of data lines, scan lines and sub-pixel circuits. At least one of the sub-pixel circuits is electrically coupled to one data line and three scan lines. The sub-pixel circuit determines whether to receive data from the coupled data line or not according to scan signals transmitted on the coupled three scan lines, and controls transmittance itself accordingly. Specifically, the scan signals transmitted on the coupled three scan lines are different from each other.

Abstract: A pixel structure includes a scan line, a data line, an active device, a first electrode layer, a second electrode layer, and an insulation layer. The active device is electrically connected to the scan line and the data line. The first electrode layer is electrically connected to the active device. The second electrode layer is electrically insulated from the first electrode layer. The insulation layer is located between the first electrode layer and the second electrode layer, and the first electrode layer or the second electrode layer includes an enclosed-frame-shaped portion, first V-shaped branch portions, and second V-shaped branch portions. The first V-shaped branch portions and the second V-shaped branch portions are arranged within the enclosed-frame-shaped portion in opposite directions, and end terminals of the first V-shaped branch portions and end terminals of the second V-shaped branch portions are connected to the enclosed-frame-shaped portion.