Patents by Inventor Ti-Ku Yu

Ti-Ku Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9473195
    Abstract: A phased-array transceiver includes: a plurality of antennas; a plurality of transceiving elements respectively coupled to the plurality of antennas; a signal processing block; and a first distributed network, coupled between the signal processing block and the transceiving elements, wherein the transceiving elements, the signal processing block, and the first distributed network are configured as a single chip, and a first transceiving path between one of the plurality of transceiving elements and the signal processing block and a second transceiving path between another of the plurality of transceiving elements and the signal processing block share at least partial signal traces of the first distributed network.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: October 18, 2016
    Assignee: MEDIATEK INC.
    Inventors: Jing-Hong Conan Zhan, Chuan-Kang Liang, Ti-Ku Yu, Zhiming Deng
  • Patent number: 9184780
    Abstract: A transceiver includes a power amplifying circuit, a first balance-unbalance circuit, a switchable matching circuit, and a low-noise amplifying circuit. The power amplifying circuit generates differential output signals during a transmitting mode of the transceiver. The first balance-unbalance circuit converts the differential output signals into a single-ended output signal. The switchable matching circuit receives the single-ended output signal on a signal port of the transceiver during the transmitting mode, and converts a single-ended receiving signal on the signal port into a single-ended input signal during a receiving mode of the transceiver. The low-noise amplifying circuit converts the single-ended input signal into a low-noise input signal during the receiving mode.
    Type: Grant
    Filed: April 19, 2015
    Date of Patent: November 10, 2015
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Ti-Ku Yu, Sang Won Son, Chia-Hsin Wu, Tsung-Ming Chen, Wei-Chia Chan
  • Publication number: 20150288411
    Abstract: A phased-array transceiver includes: a plurality of antennas; a plurality of transceiving elements respectively coupled to the plurality of antennas; a signal processing block; and a first distributed network, coupled between the signal processing block and the transceiving elements, wherein the transceiving elements, the signal processing block, and the first distributed network are configured as a single chip, and a first transceiving path between one of the plurality of transceiving elements and the signal processing block and a second transceiving path between another of the plurality of transceiving elements and the signal processing block share at least partial signal traces of the first distributed network.
    Type: Application
    Filed: June 17, 2015
    Publication date: October 8, 2015
    Inventors: Jing-Hong Conan Zhan, Chuan-Kang Liang, Ti-Ku Yu, Zhiming Deng
  • Publication number: 20150229347
    Abstract: A transceiver includes a power amplifying circuit, a first balance-unbalance circuit, a switchable matching circuit, and a low-noise amplifying circuit. The power amplifying circuit generates differential output signals during a transmitting mode of the transceiver. The first balance-unbalance circuit converts the differential output signals into a single-ended output signal. The switchable matching circuit receives the single-ended output signal on a signal port of the transceiver during the transmitting mode, and converts a single-ended receiving signal on the signal port into a single-ended input signal during a receiving mode of the transceiver. The low-noise amplifying circuit converts the single-ended input signal into a low-noise input signal during the receiving mode.
    Type: Application
    Filed: April 19, 2015
    Publication date: August 13, 2015
    Inventors: Ti-Ku Yu, Sang Won Son, Chia-Hsin Wu, Tsung-Ming Chen, Wei-Chia Chan
  • Patent number: 9042844
    Abstract: A transceiver includes: a power amplifying circuit arranged to generate differential output signals during a transmitting mode of the transceiver; a balance-unbalance circuit arranged to convert the differential output signals into a single-ended output signal; a switchable matching circuit arranged to receive the single-ended output signal on a signal port of the transceiver during the transmitting mode, and to convert a single-ended receiving signal on the signal port into a single-ended input signal during a receiving mode of the transceiver; and a low-noise amplifying circuit arranged to convert the single-ended input signal into a low-noise input signal during the receiving mode. The power amplifying circuit, the Balun, the switchable matching circuit, and the low-noise amplifying circuit are configured as a single chip.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: May 26, 2015
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Ti-Ku Yu, Sang Won Son, Chia-Hsin Wu, Tsung-Ming Chen, Wei-Chia Chan
  • Patent number: 8970427
    Abstract: A phase-arrayed device includes: a signal processing circuit arranged to generate a specific signal; a first phase-arrayed channel arranged to provide a first phase-arrayed signal according to the specific signal; a first conducting path arranged to conduct the specific signal to the first phase-arrayed channel; a second conducting path arranged to conduct the first phase-arrayed signal to the signal processing circuit; and a detecting circuit, arranged to detect a mismatch between the first phase-arrayed signal and a reference signal to generate a detecting signal utilized for calibrating the first phase-arrayed signal.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: March 3, 2015
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Chuan-Kang Liang, Jing-Hong Conan Zhan, Ti-Ku Yu, Zhiming Deng
  • Publication number: 20140199951
    Abstract: A transceiver includes: a power amplifying circuit arranged to generate differential output signals during a transmitting mode of the transceiver; a balance-unbalance circuit arranged to convert the differential output signals into a single-ended output signal; a switchable matching circuit arranged to receive the single-ended output signal on a signal port of the transceiver during the transmitting mode, and to convert a single-ended receiving signal on the signal port into a single-ended input signal during a receiving mode of the transceiver; and a low-noise amplifying circuit arranged to convert the single-ended input signal into a low-noise input signal during the receiving mode. The power amplifying circuit, the Balun, the switchable matching circuit, and the low-noise amplifying circuit are configured as a single chip.
    Type: Application
    Filed: October 2, 2013
    Publication date: July 17, 2014
    Applicant: MediaTek Singapore Pte. Ltd.
    Inventors: Ti-Ku Yu, Sang Won Son, Chia-Hsin Wu, Tsung-Ming Chen, Wei-Chia Chan
  • Publication number: 20120293362
    Abstract: A phase-arrayed device includes: a signal processing circuit arranged to generate a specific signal; a first phase-arrayed channel arranged to provide a first phase-arrayed signal according to the specific signal; a first conducting path arranged to conduct the specific signal to the first phase-arrayed channel; a second conducting path arranged to conduct the first phase-arrayed signal to the signal processing circuit; and a detecting circuit, arranged to detect a mismatch between the first phase-arrayed signal and a reference signal to generate a detecting signal utilized for calibrating the first phase-arrayed signal.
    Type: Application
    Filed: May 16, 2012
    Publication date: November 22, 2012
    Inventors: Chuan-Kang Liang, Jing-Hong Conan Zhan, Ti-Ku Yu, Zhiming Deng
  • Publication number: 20120294338
    Abstract: A phased-array transceiver includes: a plurality of antennas; a plurality of transceiving elements respectively coupled to the plurality of antennas, at least one of the transceiving elements comprising a first transmitting circuit and a first receiving circuit; a signal processing block; and a first distributed network, coupled between the signal processing block and the transceiving elements, wherein the transceiving elements, the signal processing block, and the first distributed network are configured as a single chip, and a first path from the antenna through the first receiving circuit to the signal processing block and a second path from the signal processing block through the first transmitting circuit to the antenna share at least partial signal traces of the phased-array transceiver.
    Type: Application
    Filed: November 22, 2011
    Publication date: November 22, 2012
    Inventors: Jing-Hong Conan Zhan, Chuan-Kang Liang, Ti-Ku Yu, Zhiming Deng