Patents by Inventor Ti-Ku Yu
Ti-Ku Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9473195Abstract: A phased-array transceiver includes: a plurality of antennas; a plurality of transceiving elements respectively coupled to the plurality of antennas; a signal processing block; and a first distributed network, coupled between the signal processing block and the transceiving elements, wherein the transceiving elements, the signal processing block, and the first distributed network are configured as a single chip, and a first transceiving path between one of the plurality of transceiving elements and the signal processing block and a second transceiving path between another of the plurality of transceiving elements and the signal processing block share at least partial signal traces of the first distributed network.Type: GrantFiled: June 17, 2015Date of Patent: October 18, 2016Assignee: MEDIATEK INC.Inventors: Jing-Hong Conan Zhan, Chuan-Kang Liang, Ti-Ku Yu, Zhiming Deng
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Patent number: 9184780Abstract: A transceiver includes a power amplifying circuit, a first balance-unbalance circuit, a switchable matching circuit, and a low-noise amplifying circuit. The power amplifying circuit generates differential output signals during a transmitting mode of the transceiver. The first balance-unbalance circuit converts the differential output signals into a single-ended output signal. The switchable matching circuit receives the single-ended output signal on a signal port of the transceiver during the transmitting mode, and converts a single-ended receiving signal on the signal port into a single-ended input signal during a receiving mode of the transceiver. The low-noise amplifying circuit converts the single-ended input signal into a low-noise input signal during the receiving mode.Type: GrantFiled: April 19, 2015Date of Patent: November 10, 2015Assignee: MediaTek Singapore Pte. Ltd.Inventors: Ti-Ku Yu, Sang Won Son, Chia-Hsin Wu, Tsung-Ming Chen, Wei-Chia Chan
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Publication number: 20150288411Abstract: A phased-array transceiver includes: a plurality of antennas; a plurality of transceiving elements respectively coupled to the plurality of antennas; a signal processing block; and a first distributed network, coupled between the signal processing block and the transceiving elements, wherein the transceiving elements, the signal processing block, and the first distributed network are configured as a single chip, and a first transceiving path between one of the plurality of transceiving elements and the signal processing block and a second transceiving path between another of the plurality of transceiving elements and the signal processing block share at least partial signal traces of the first distributed network.Type: ApplicationFiled: June 17, 2015Publication date: October 8, 2015Inventors: Jing-Hong Conan Zhan, Chuan-Kang Liang, Ti-Ku Yu, Zhiming Deng
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Publication number: 20150229347Abstract: A transceiver includes a power amplifying circuit, a first balance-unbalance circuit, a switchable matching circuit, and a low-noise amplifying circuit. The power amplifying circuit generates differential output signals during a transmitting mode of the transceiver. The first balance-unbalance circuit converts the differential output signals into a single-ended output signal. The switchable matching circuit receives the single-ended output signal on a signal port of the transceiver during the transmitting mode, and converts a single-ended receiving signal on the signal port into a single-ended input signal during a receiving mode of the transceiver. The low-noise amplifying circuit converts the single-ended input signal into a low-noise input signal during the receiving mode.Type: ApplicationFiled: April 19, 2015Publication date: August 13, 2015Inventors: Ti-Ku Yu, Sang Won Son, Chia-Hsin Wu, Tsung-Ming Chen, Wei-Chia Chan
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Patent number: 9042844Abstract: A transceiver includes: a power amplifying circuit arranged to generate differential output signals during a transmitting mode of the transceiver; a balance-unbalance circuit arranged to convert the differential output signals into a single-ended output signal; a switchable matching circuit arranged to receive the single-ended output signal on a signal port of the transceiver during the transmitting mode, and to convert a single-ended receiving signal on the signal port into a single-ended input signal during a receiving mode of the transceiver; and a low-noise amplifying circuit arranged to convert the single-ended input signal into a low-noise input signal during the receiving mode. The power amplifying circuit, the Balun, the switchable matching circuit, and the low-noise amplifying circuit are configured as a single chip.Type: GrantFiled: October 2, 2013Date of Patent: May 26, 2015Assignee: MediaTek Singapore Pte. Ltd.Inventors: Ti-Ku Yu, Sang Won Son, Chia-Hsin Wu, Tsung-Ming Chen, Wei-Chia Chan
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Patent number: 8970427Abstract: A phase-arrayed device includes: a signal processing circuit arranged to generate a specific signal; a first phase-arrayed channel arranged to provide a first phase-arrayed signal according to the specific signal; a first conducting path arranged to conduct the specific signal to the first phase-arrayed channel; a second conducting path arranged to conduct the first phase-arrayed signal to the signal processing circuit; and a detecting circuit, arranged to detect a mismatch between the first phase-arrayed signal and a reference signal to generate a detecting signal utilized for calibrating the first phase-arrayed signal.Type: GrantFiled: May 16, 2012Date of Patent: March 3, 2015Assignee: MediaTek Singapore Pte. Ltd.Inventors: Chuan-Kang Liang, Jing-Hong Conan Zhan, Ti-Ku Yu, Zhiming Deng
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Publication number: 20140199951Abstract: A transceiver includes: a power amplifying circuit arranged to generate differential output signals during a transmitting mode of the transceiver; a balance-unbalance circuit arranged to convert the differential output signals into a single-ended output signal; a switchable matching circuit arranged to receive the single-ended output signal on a signal port of the transceiver during the transmitting mode, and to convert a single-ended receiving signal on the signal port into a single-ended input signal during a receiving mode of the transceiver; and a low-noise amplifying circuit arranged to convert the single-ended input signal into a low-noise input signal during the receiving mode. The power amplifying circuit, the Balun, the switchable matching circuit, and the low-noise amplifying circuit are configured as a single chip.Type: ApplicationFiled: October 2, 2013Publication date: July 17, 2014Applicant: MediaTek Singapore Pte. Ltd.Inventors: Ti-Ku Yu, Sang Won Son, Chia-Hsin Wu, Tsung-Ming Chen, Wei-Chia Chan
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Publication number: 20120293362Abstract: A phase-arrayed device includes: a signal processing circuit arranged to generate a specific signal; a first phase-arrayed channel arranged to provide a first phase-arrayed signal according to the specific signal; a first conducting path arranged to conduct the specific signal to the first phase-arrayed channel; a second conducting path arranged to conduct the first phase-arrayed signal to the signal processing circuit; and a detecting circuit, arranged to detect a mismatch between the first phase-arrayed signal and a reference signal to generate a detecting signal utilized for calibrating the first phase-arrayed signal.Type: ApplicationFiled: May 16, 2012Publication date: November 22, 2012Inventors: Chuan-Kang Liang, Jing-Hong Conan Zhan, Ti-Ku Yu, Zhiming Deng
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Publication number: 20120294338Abstract: A phased-array transceiver includes: a plurality of antennas; a plurality of transceiving elements respectively coupled to the plurality of antennas, at least one of the transceiving elements comprising a first transmitting circuit and a first receiving circuit; a signal processing block; and a first distributed network, coupled between the signal processing block and the transceiving elements, wherein the transceiving elements, the signal processing block, and the first distributed network are configured as a single chip, and a first path from the antenna through the first receiving circuit to the signal processing block and a second path from the signal processing block through the first transmitting circuit to the antenna share at least partial signal traces of the phased-array transceiver.Type: ApplicationFiled: November 22, 2011Publication date: November 22, 2012Inventors: Jing-Hong Conan Zhan, Chuan-Kang Liang, Ti-Ku Yu, Zhiming Deng