Patents by Inventor Timothy R. Paaske

Timothy R. Paaske has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200342091
    Abstract: An apparatus, a method, and a system are presented in which the apparatus includes an interface control circuit that may be configured to receive a message including a cryptographic keyword and a policy value. The policy value may include one or more data bits indicative of one or more policies that define allowable usage of the cryptographic keyword. The apparatus also includes a security circuit that may be configured to extract the cryptographic keyword and the policy value from the message, and to apply at least one policy of the one or more policies to usage of the cryptographic keyword in response to a determination that an authentication of the message succeeded.
    Type: Application
    Filed: July 13, 2020
    Publication date: October 29, 2020
    Inventors: Timothy R. Paaske, Weihua Mao, Shu-Yi Yu
  • Patent number: 10747295
    Abstract: Techniques are disclosed relating a computer system in a power-down state receiving a communication from a remote computer system and performing a task indicated by the communication. The computer system in a power-down state performs the task without transitioning from the power-down state into a power-up state. Exemplary tasks performed in the power-down state include uploading one or more files to a remote computer system, downloading one or more files from a remote computer system, deleting one or more files from the computer system, accessing input/output devices, disabling the computer system, and performing a memory check on the computer system.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: August 18, 2020
    Assignee: Apple Inc.
    Inventors: Timothy R. Paaske, Josh P. de Cesare
  • Patent number: 10713351
    Abstract: An apparatus, a method, and a system are presented in which the apparatus includes an interface control circuit that may be configured to receive a message including a cryptographic keyword and a policy value. The policy value may include one or more data bits indicative of one or more policies that define allowable usage of the cryptographic keyword. The apparatus also includes a security circuit that may be configured to extract the cryptographic keyword and the policy value from the message, and to apply at least one policy of the one or more policies to usage of the cryptographic keyword in response to a determination that an authentication of the message succeeded.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: July 14, 2020
    Assignee: Apple Inc.
    Inventors: Timothy R. Paaske, Weihua Mao, Shu-Yi Yu
  • Publication number: 20200174550
    Abstract: Embodiments of an apparatus and method are disclosed that may allow for managing power of a computing system. The apparatus may include a clock generation circuit, a bus interface unit, and a control circuit. The clock generation circuit may be configured to generate multiple clock signals. Each clock signal may provide a timing reference to different functional blocks within a device coupled to the communication bus. The bus interface unit may be configured to receive messages from the device via the communication bus. The messages may include a latency value and a request to activate a low power mode. The control circuit may be configured to deactivate one or more of the multiple clock signals dependent upon the latency value and multiple threshold values.
    Type: Application
    Filed: February 3, 2020
    Publication date: June 4, 2020
    Inventors: David S. Warren, Inna Levit, Timothy R. Paaske
  • Publication number: 20200081785
    Abstract: A method for verifying program flow during execution of a software program in a computer system is disclosed. Program code of the software program includes multiple program instructions and checkpoint data structures, where a given checkpoint data structure is associated with a given program instruction and is linked to at least one other checkpoint data structure. A fault monitor circuit may receive a particular checkpoint data structure and compare the particular checkpoint data structure to a previously received checkpoint data structure that is associated with another program instruction. Based on results of the comparison, the software fault monitor circuit may signal a program flow error.
    Type: Application
    Filed: September 12, 2018
    Publication date: March 12, 2020
    Inventors: Zhimin Chen, Timothy R. Paaske, Yannick L. Sierra, Anish C. Trivedi
  • Patent number: 10551907
    Abstract: Embodiments of an apparatus and method are disclosed that may allow for managing power of a computing system. The apparatus may include a clock generation circuit, a bus interface unit, and a control circuit. The clock generation circuit may be configured to generate multiple clock signals. Each clock signal may provide a timing reference to different functional blocks within a device coupled to the communication bus. The bus interface unit may be configured to receive messages from the device via the communication bus. The messages may include a latency value and a request to activate a low power mode. The control circuit may be configured to deactivate one or more of the multiple clock signals dependent upon the latency value and multiple threshold values.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: February 4, 2020
    Assignee: Apple Inc.
    Inventors: David S. Warren, Inna Levit, Timothy R. Paaske
  • Patent number: 10536271
    Abstract: Systems and methods are disclosed for generating one or more hardware reference keys (HRK) on a computing device, and for attesting to the validity of the hardware reference keys. An initial hardware reference key can be a silicon attestation key (SIK) generated during manufacture of a computing system, such as a system-on-a-chip. The SIK can comprise an asymmetric key pair based at least in part on an identifier of the processing system type and a unique identifier of the processing system. The SIK can be signed by the computing system and stored thereon. The SIK can be used to generate further HRKs on the computing device that can attest to the processing system type of the computing device and an operating system version that was running when the HRK was generated. The computing device can generate an HRK attestation (HRKA) for each HRK generated on the computing system.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: January 14, 2020
    Assignee: Apple Inc.
    Inventors: Thomas P. Mensch, Conrad Sauerwald, Jerrold V. Hauck, Timothy R. Paaske, Zhimin Chen, Andrew R. Whalley
  • Patent number: 10521596
    Abstract: In an embodiment, a system is provided in which the private key is managed in hardware and is not visible to software. The system may provide hardware support for public key generation, digital signature generation, encryption/decryption, and large random prime number generation without revealing the private key to software. The private key may thus be more secure than software-based versions. In an embodiment, the private key and the hardware that has access to the private key may be integrated onto the same semiconductor substrate as an integrated circuit (e.g. a system on a chip (SOC)). The private key may not be available outside of the integrated circuit, and thus a nefarious third party faces high hurdles in attempting to obtain the private key.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: December 31, 2019
    Assignee: Apple Inc.
    Inventors: Timothy R. Paaske, Mitchell D. Adler, Conrad Sauerwald, Fabrice L. Gautier, Shu-Yi Yu
  • Patent number: 10417429
    Abstract: A method and apparatus for protecting boot variables is disclosed. A computer system includes a main processor and an auxiliary processor. The auxiliary processor includes a non-volatile memory that stores variables associated with boot code that is also stored thereon. The main processor may send a request to the auxiliary processor to alter one of the variables stored in the non-volatile memory. Responsive to receiving the request, the auxiliary processor may execute a security policy to determine if the main processor meets the criteria for altering the variable. If the auxiliary processor determines that the main processor meets the criteria, it may grant permission to alter the variable.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: September 17, 2019
    Assignee: Apple Inc.
    Inventors: Joshua P. de Cesare, Timothy R. Paaske, Xeno S. Kovah, Nikolaj Schlej, Jeffrey R. Wilcox, Hardik K. Doshi, Kevin H. Alderfer, Corey T. Kallenberg
  • Publication number: 20190260799
    Abstract: A system and method for detecting replay attacks on secure data are disclosed. A system on a chip (SOC) includes a security processor. Blocks of data corresponding to sensitive information are stored in off-chip memory. The security processor uses an integrity data structure, such as an integrity tree, for the blocks. The intermediate nodes of the integrity tree use nonces which have been generated independent of any value within a corresponding block. By using only the nonces to generate tags in the root at the top layer stored in on-chip memory and the nodes of the intermediate layers stored in off-chip memory, an amount of storage used is reduced for supporting the integrity tree. When the security processor detects events which create access requests for one or more blocks, the security processor uses the integrity tree to verify a replay attack has not occurred and corrupted data.
    Type: Application
    Filed: February 14, 2019
    Publication date: August 22, 2019
    Inventors: Zhimin Chen, Timothy R. Paaske, Gilbert H. Herbeck
  • Publication number: 20190114433
    Abstract: A method and apparatus for protecting boot variables is disclosed. A computer system includes a main processor and an auxiliary processor. The auxiliary processor is associated with a non-volatile memory that stores variables associated with boot code that is also stored thereon. The main processor may send a request to the auxiliary processor to alter one of the variables stored in the non-volatile memory. Responsive to receiving the request, the auxiliary processor may execute a security policy to determine if the main processor meets the criteria for altering the variable. If the auxiliary processor determines that the main processor meets the criteria, it may grant permission to alter the variable.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 18, 2019
    Inventors: Joshua P. de Cesare, Timothy R. Paaske, Xeno S. Kovah, Nikolaj Schlej, Jeffrey R. Wilcox, Hardik K. Doshi, Kevin H. Alderfer, Corey T. Kallenberg
  • Publication number: 20190116619
    Abstract: A secure ranging system can use a secure processing system to deliver one or more ranging keys to a ranging radio on a device, and the ranging radio can derive locally at the system ranging codes based on the ranging keys. A deterministic random number generator can derive the ranging codes using the ranging key and one or more session parameters, and each device (e.g. a cellular telephone and another device) can independently derive the ranging codes and derive them contemporaneously with their use in ranging operations.
    Type: Application
    Filed: April 14, 2017
    Publication date: April 18, 2019
    Inventors: Jerrold V. HAUCK, Alejandro J. MARQUEZ, Timothy R. PAASKE, Indranil S. SEN, Herve SIBERT, Yannick L. SIERRA, Raman S. THIARA
  • Publication number: 20190102558
    Abstract: A method and apparatus for performing a secure boot of a computer system is disclosed. A computer system according to the disclosure includes an auxiliary processor and a main processor. The boot process includes initially booting the auxiliary processor. The auxiliary processor is associated with a non-volatile memory storing boot code for the main processor. The auxiliary processor may perform a verification of the boot code. Subsequent to verifying the boot code, the main processor may be released from a reset state. Once the main processor is no longer in the reset state, the boot code may be provided thereto. Thereafter, the boot procedure may continue with the main processor executing the boot code.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 4, 2019
    Inventors: Joshua P. de Cesare, Timothy R. Paaske, Xeno S. Kovah, Nikolaj Schlej, Jeffrey R. Wilcox, Ezekiel T. Runyon, Hardik K. Doshi, Kevin H. Alderfer, Corey T. Kallenberg
  • Patent number: 10243990
    Abstract: A system and method for detecting replay attacks on secure data are disclosed. A system on a chip (SOC) includes a security processor. Blocks of data corresponding to sensitive information are stored in off-chip memory. The security processor uses an integrity data structure, such as an integrity tree, for the blocks. The intermediate nodes of the integrity tree use nonces which have been generated independent of any value within a corresponding block. By using only the nonces to generate tags in the root at the top layer stored in on-chip memory and the nodes of the intermediate layers stored in off-chip memory, an amount of storage used is reduced for supporting the integrity tree. When the security processor detects events which create access requests for one or more blocks, the security processor uses the integrity tree to verify a replay attack has not occurred and corrupted data.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: March 26, 2019
    Assignee: Apple Inc.
    Inventors: Zhimin Chen, Timothy R. Paaske, Gilbert H. Herbeck
  • Publication number: 20190018952
    Abstract: An apparatus, a method, and a system are presented in which the apparatus includes an interface control circuit that may be configured to receive a message including a cryptographic keyword and a policy value. The policy value may include one or more data bits indicative of one or more policies that define allowable usage of the cryptographic keyword. The apparatus also includes a security circuit that may be configured to extract the cryptographic keyword and the policy value from the message, and to apply at least one policy of the one or more policies to usage of the cryptographic keyword in response to a determination that an authentication of the message succeeded.
    Type: Application
    Filed: September 17, 2018
    Publication date: January 17, 2019
    Inventors: Timothy R. Paaske, Weihua Mao, Shu-Yi Yu
  • Publication number: 20180349609
    Abstract: A method and apparatus for protecting boot variables is disclosed. A computer system includes a main processor and an auxiliary processor. The auxiliary processor includes a non-volatile memory that stores variables associated with boot code that is also stored thereon. The main processor may send a request to the auxiliary processor to alter one of the variables stored in the non-volatile memory. Responsive to receiving the request, the auxiliary processor may execute a security policy to determine if the main processor meets the criteria for altering the variable. If the auxiliary processor determines that the main processor meets the criteria, it may grant permission to alter the variable.
    Type: Application
    Filed: September 29, 2017
    Publication date: December 6, 2018
    Inventors: Joshua P. de Cesare, Timothy R. Paaske, Xeno S. Kovah, Nikolaj Schlej, Jeffrey R. Wilcox, Hardik K. Doshi, Kevin H. Alderfer, Corey T. Kallenberg
  • Publication number: 20180349608
    Abstract: A method and apparatus for performing a secure boot of a computer system is disclosed. A computer system according to the disclosure includes an auxiliary processor and a main processor. The boot process includes initially booting the auxiliary processor. The auxiliary processor includes a non-volatile memory storing boot code for the main processor. The auxiliary processor may perform a verification of the boot code. Subsequent to verifying the boot code, the main processor may be released from a reset state. Once the main processor is no longer in the reset state, the boot code may be provided thereto. Thereafter, the boot procedure may continue with the main processor executing the boot code.
    Type: Application
    Filed: September 29, 2017
    Publication date: December 6, 2018
    Inventors: Joshua P. de Cesare, Timothy R. Paaske, Xeno S. Kovah, Nikolaj Schlej, Jeffrey R. Wilcox, Ezekiel T. Runyon, Hardik K. Doshi, Kevin H. Alderfer, Corey T. Kallenberg
  • Patent number: 10114956
    Abstract: In an embodiment, a system is provided in which the private key is managed in hardware and is not visible to software. The system may provide hardware support for public key generation, digital signature generation, encryption/decryption, and large random prime number generation without revealing the private key to software. The private key may thus be more secure than software-based versions. In an embodiment, the private key and the hardware that has access to the private key may be integrated onto the same semiconductor substrate as an integrated circuit (e.g. a system on a chip (SOC)). The private key may not be available outside of the integrated circuit, and thus a nefarious third party faces high hurdles in attempting to obtain the private key.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: October 30, 2018
    Assignee: Apple Inc.
    Inventors: Timothy R. Paaske, Mitchell D. Adler, Conrad Sauerwald, Fabrice L. Gautier, Shu-Yi Yu
  • Patent number: 10078749
    Abstract: An apparatus, a method, and a system are presented in which the apparatus includes an interface control circuit that may be configured to receive a message including a cryptographic keyword and a policy value. The policy value may include one or more data bits indicative of one or more policies that define allowable usage of the cryptographic keyword. The apparatus also includes a security circuit that may be configured to extract the cryptographic keyword and the policy value from the message, and to apply at least one policy of the one or more policies to usage of the cryptographic keyword in response to a determination that an authentication of the message succeeded.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: September 18, 2018
    Assignee: Apple Inc.
    Inventors: Timothy R. Paaske, Weihua Mao, Shu-Yi Yu
  • Patent number: 9959124
    Abstract: In an embodiment, a system includes a functional unit that remains powered when the remainder of the system is powered off. The functional unit may, in response to a transition from a first power state to a second power state, retrieve configuration information from a read-only memory. In some embodiments, may be configured to store at least a portion of the configured information in a secure portion of a memory included in the functional unit and then lock the secure portion of the memory. The functional unit may then complete the transition to the second power state.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: May 1, 2018
    Assignee: Apple Inc.
    Inventors: Gilbert H. Herbeck, Manu Gulati, Erik P. Machnicki, Timothy R. Paaske