Patents by Inventor Tin Poay Chuah
Tin Poay Chuah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11942412Abstract: To address the issue of shrinking volume that can be allocated for electrical components, a system can use an interposer with a flexible portion. A first portion of the interposer can electrically connect to a top side of a motherboard. A flexible portion of the interposer, adjacent to the first portion, can wrap around an edge of the motherboard. A peripheral portion of the interposer, adjacent to the flexible portion, can electrically connect to a bottom side of the motherboard. The peripheral portion can be flexible or rigid. The interposer can define a cavity that extends through the first portion of the interposer. A chip package can electrically connect to the first portion of the interposer. The chip package can be coupled to at least one electrical component that extends into the cavity when the chip package is connected to the interposer.Type: GrantFiled: October 13, 2020Date of Patent: March 26, 2024Assignee: Intel CorporationInventors: Bok Eng Cheah, Jackson Chung Peng Kong, Min Suet Lim, Tin Poay Chuah
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Publication number: 20240006786Abstract: The present disclosure is directed to a printed circuit board having a composite upper surface with a first section of a first-type of printed circuit board and a second section of a second-type of printed circuit board, for which the first section of the first-type of printed circuit board and the second section of the second-type of printed circuit board are coupled, respectively, to at least one device that is configured to abridge the first and second sections of the composite upper surface. In an aspect, the second-type of printed circuit board is configured to be embedded in the first-type of printed circuit board and the first-type of printed circuit board is configured to receive the second-type of printed circuit board.Type: ApplicationFiled: July 4, 2022Publication date: January 4, 2024Inventors: Howe Yin LOO, Tin Poay CHUAH, Jenny Shio Yin ONG, Chee Min LOH, Bok Eng CHEAH, Jackson Chung Peng KONG, Seok Ling LIM, Kooi Chi OOI
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Publication number: 20240006399Abstract: An electronic device includes a package substrate; a memory integrated circuit (IC) mounted on the package substrate; a mold layer including one or more chiplets and a base IC die within the mold layer, the one or more chiplets arranged on the base IC die; a top chiplet mounted on a surface of the mold layer, wherein a combined height of the mold layer and the top chiplet substantially matches a height of the memory IC; and a heat spreader having a uniform surface contacting the memory IC and the top chiplet.Type: ApplicationFiled: June 29, 2022Publication date: January 4, 2024Applicant: Intel CorporationInventors: Seok Ling Lim, Chan Kim Lee, Eng Huat Goh, Jenny Shio Yin Ong, Tin Poay Chuah
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Publication number: 20230411385Abstract: An apparatus is provided which comprises: one or more dielectric layers forming a substrate, one or more first conductive contacts on a top surface of the substrate, one or more second conductive contacts on a bottom surface of the substrate opposite of the top surface, and one or more discrete capacitors conductively coupled with one or more of the first and second conductive contacts, the one or more discrete capacitors embedded within the substrate between the top surface and the bottom surface. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: September 5, 2023Publication date: December 21, 2023Applicant: Intel CorporationInventors: Seok Ling LIM, Jenny Shio Yin ONG, Tin Poay CHUAH, Hon Wah CHEW
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Publication number: 20230395480Abstract: A substrate to printed circuit board (PCB) interconnect with liquid metal and surface pins. A thin dielectric sheet with drilled openings is adjacent to the bottom of a system on chip or CPU package substrate. Holes in the dielectric sheet have a liquid metal (LM) therein, the holes correspond to landing metal pads on the package substrate. The PCB includes surface pins in an arrangement to match the LM filled holes. A pick and place assembly of the package substrate to the PCB can be done without needing a reflow step. A magnet ring can be positioned on the polyimide sheet and configured to pair with a metal plate on the PCB. Guideposts around the periphery of the package substrate may be used to assist in alignment during assembly.Type: ApplicationFiled: June 7, 2022Publication date: December 7, 2023Applicant: Intel CorporationInventors: Tin Poay Chuah, Jeff Ku, Min Suet Lim, Yew San Lim, Twan Sing Loo
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Publication number: 20230397323Abstract: Embodiments disclosed herein include a printed circuit board (PCB). In an embodiment, the PCB comprises a substrate with a first surface and a second surface opposite from the first surface. In an embodiment, a first slot is through a thickness of the substrate, and a second slot is through the thickness of the substrate, where the first slot is parallel to the second slot. In an embodiment, a metal plate is provided on the PCB. In an embodiment the metal plate comprises a first portion over the first surface of the substrate between the first slot and the second slot, a second portion connected to the first portion, wherein the second portion is in the first slot, and a third portion connected to the first portion, wherein the third portion is in the second slot.Type: ApplicationFiled: June 7, 2022Publication date: December 7, 2023Inventors: Min Suet LIM, Tin Poay CHUAH, Yew San LIM, Jeff KU, Twan Sing LOO, Poh Boon KHOO, Jiun Hann SIR
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Patent number: 11758662Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a first rigid substrate, a second rigid substrate, a flexible substrate comprising a first portion attached to the first rigid substrate, a second portion attached to the second rigid substrate, a middle portion connecting the first portion to the second portion, wherein the middle portion is bent, and metallic traces therethrough, and a component forming a direct interface with the middle portion of the flexible substrate, the component electrically coupled to the metallic traces. In selected examples, the device further includes a casing.Type: GrantFiled: May 31, 2022Date of Patent: September 12, 2023Assignee: Intel CorporationInventors: Tin Poay Chuah, Bok Eng Cheah, Jackson Chung Peng Kong
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Patent number: 11699664Abstract: According to the various aspects, the present device includes a printed circuit board having a top surface and a bottom surface, with a plurality of semiconductor devices coupled to the top surface and a flexible electromagnetic shield wrap conformally positioned over and between the plurality of semiconductor devices and the top surface of the printed circuit board. The flexible electromagnetic shield wrap is conformally positioned by applying a vacuum and is removable after the vacuum seal is broken.Type: GrantFiled: November 5, 2020Date of Patent: July 11, 2023Assignee: Intel CorporationInventors: Eng Huat Goh, Tin Poay Chuah, Yew San Lim, Min Suet Lim
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Patent number: 11696409Abstract: A printed circuit board (PCB) comprises a blind via and a discrete component vertically embedded within the blind via.Type: GrantFiled: September 30, 2016Date of Patent: July 4, 2023Assignee: Intel CorporationInventors: Tin Poay Chuah, Min Suet Lim, Hoay Tien Teoh, Mooi Ling Chang, Chin Lee Kuan
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Publication number: 20230123645Abstract: There may be provided a fastener arrangement. The fastener arrangement may include a first fastener tape including a first plurality of electrically conductive coupling elements and a first plurality of non-electrically conductive coupling elements. The fastener arrangement may further include a second fastener tape comprising a second plurality of electrically conductive coupling elements and a second plurality of non-electrically conductive coupling element. The fastener arrangement may further include a slider couplable to the first fastener tape and the second fastener tape for reversibly interleaving and interlocking the first plurality of electrically conductive and non-electrically conductive coupling elements with their corresponding second plurality of electrically conductive and non-electrically conductive elements.Type: ApplicationFiled: October 14, 2021Publication date: April 20, 2023Inventors: Tin Poay CHUAH, Jeff KU, Yew San LIM, Boon Ping KOH, Min Suet LIM
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Publication number: 20230108868Abstract: Methods, apparatus, systems, and articles of manufacture to increase rigidity of printed circuit boards are disclosed. An apparatus includes a stack of insulative layers. The stack includes a first face and a second face opposite the first face. The apparatus further includes a plurality of conductive layers. Ones of the conductive layers between adjacent ones of the insulative layers. The apparatus also includes a metal stiffener extending along a perimeter of a first one of the insulative layers. The metal stiffener has a thickness measured in a direction perpendicular to the first face. The thickness is less than a distance between the first and second faces.Type: ApplicationFiled: November 30, 2022Publication date: April 6, 2023Inventors: Jia Yan Go, Tin Poay Chuah, Juha Paavola, Twan Sing Loo, Sami Heinisuo, Kari Mansukoski
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Patent number: 11589460Abstract: A multilayer printed circuit board including a first printed circuit board portion, including a first inserting connector, including a plurality of contacts for creating a first removable bus connection; a second printed circuit board portion, including a second inserting connector, including a plurality of contacts for creating a second removable bus connection; a third printed circuit board portion, connected between the first printed circuit board portion and to the second printed circuit board portion, wherein a rigidity of the third printed circuit board portion is less than a rigidity of each of the first printed circuit board portion and the second printed circuit board portion; wherein the multilayer printed circuit board is foldable along the third printed circuit board portion and, if so folded, the first printed circuit board portion is arranged on top of the second printed circuit board portion.Type: GrantFiled: November 6, 2020Date of Patent: February 21, 2023Assignee: INTEL CORPORATIONInventors: Tin Poay Chuah, Min Suet Lim, Chee Chun Yee, Yew San Lim, Eng Huat Goh
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Publication number: 20230017925Abstract: Circuit apparatus are disclosed. An example circuit apparatus includes a body including a plurality of first traces formed on the body, and a plurality of openings formed through the body and located between respective ones of the first traces. The openings provide airflow to a fan module of an electronic device through the body of the circuit apparatus.Type: ApplicationFiled: September 16, 2022Publication date: January 19, 2023Inventors: Jeff Ku, Min Suet Lim, Tin Poay Chuah, Yew San Lim, Twan Sing Loo
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Patent number: 11556157Abstract: According to the present disclosure, a laptop may be provided with a smaller z-height using a motherboard assembly, including a motherboard having a plurality of components coupled thereon, a thermal transfer unit coupled to one or more component on the motherboard and attachment members for holding the motherboard in a lower compartment of a laptop clamshell casing at an inclining position.Type: GrantFiled: November 5, 2020Date of Patent: January 17, 2023Assignee: INTEL CORPORATIONInventors: Min Suet Lim, Chee Chun Yee, Yew San Lim, Jeff Ku, Tin Poay Chuah
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Patent number: 11521943Abstract: A capacitor loop substrate assembly includes a substrate with a loop shape, one or more capacitors or other electronic components on the substrate, and an opening in the substrate to allow the capacitor loop substrate assembly to be coupled to an integrated circuit package, such as a package including a die. Interconnects and/or contacts for interconnects are formed in an integrated circuit package to couple the capacitor loop substrate assembly to the integrated circuit package.Type: GrantFiled: April 13, 2021Date of Patent: December 6, 2022Assignee: Intel CorporationInventors: Jenny Shio Yin Ong, Tin Poay Chuah, Chin Lee Kuan
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Publication number: 20220369460Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a first rigid substrate, a second rigid substrate, a flexible substrate comprising a first portion attached to the first rigid substrate, a second portion attached to the second rigid substrate, a middle portion connecting the first portion to the second portion, wherein the middle portion is bent, and metallic traces therethrough, and a component forming a direct interface with the middle portion of the flexible substrate, the component electrically coupled to the metallic traces. In selected examples, the device further includes a casing.Type: ApplicationFiled: May 31, 2022Publication date: November 17, 2022Inventors: Tin Poay Chuah, Bok Eng Cheah, Jackson Chung Peng Kong
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Patent number: 11487326Abstract: The present disclosure relates to a docking station including a triangular prism shaped body, and a cradle proximal to a top section of the triangular prism shaped body for detachably receiving a mobile device, wherein the cradle may include a plurality of different connection interfaces to provide a selectable connection with a complementary connection interface of the mobile device.Type: GrantFiled: November 4, 2020Date of Patent: November 1, 2022Assignee: Intel CorporationInventors: Jeff Ku, Tin Poay Chuah, Yew San Lim, Min Suet Lim, Chee Chun Yee
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Patent number: 11481001Abstract: According to the various examples, a dual display system having a first panel having a first display area, a second panel having a second display area, and a connector assembly, attached to the first and second panels, that is configured to enable the first and second panels to rotate around three-directional axes. The connector assembly includes an elongated member and a hinge assembly, which are configured for attachment to the first and second display panels. The present dual display system may have several functional modalities, including use as a desktop computer, a laptop computer, a tablet, and a panoramic display.Type: GrantFiled: November 4, 2020Date of Patent: October 25, 2022Assignee: INTEL CORPORATIONInventors: Chee Chun Yee, Tin Poay Chuah, Yew San Lim, Min Suet Lim, Jeff Ku
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Publication number: 20220302006Abstract: Disclosed herein are via plug resistors for incorporation into electronic substrates, and related methods and devices. Exemplary via plug resistor structures include a resistive element within and on a surface of a via extending at least partially through an electronic substrate and first and second electrodes coupled to the resistive element.Type: ApplicationFiled: March 17, 2021Publication date: September 22, 2022Applicant: Intel CorporationInventors: Santosh Gangal, Tin Poay Chuah
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Publication number: 20220302007Abstract: Disclosed herein are via plug capacitors for incorporation into electronic substrates, and related methods and devices. Exemplary via plug capacitor structures include a capacitive element within a via extending at least partially through an electronic substrate and first and second electrodes coupled to the capacitive element.Type: ApplicationFiled: March 17, 2021Publication date: September 22, 2022Applicant: Intel CorporationInventors: Santosh Gangal, Tin Poay Chuah